Revert "x86: Don't display eiz with no scale"

This reverts commit 04c662e2b66bedd050f97adec19afe0fcfce9ea7.
In my underlying suggestion I neglected the fact that in those
cases (,%eiz,1) is the only visible indication that 32-bit
addressing is in effect.

(cherry picked from commit bf4ba07ca61793a1faf81c0447ba97fdc6639b50)

diff --git a/gas/ChangeLog b/gas/ChangeLog
index e9f57478fc03cc639760273919eac9e1773cc768..9dae1ba0c4354ad7f074020154358b151ef21a8f 100644 (file)
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,10 @@
+2020-10-07  Jan Beulich  <jbeulich@suse.com>
+
+       * testsuite/gas/i386/evex-no-scale-64.d,
+       testsuite/gas/i386/addr32.d,
+       testsuite/gas/i386/x86-64-addr32-intel.d,
+       testsuite/gas/i386/x86-64-addr32.d: Adjust expectations.
+
 2020-10-06  Alex Coplan  <alex.coplan@arm.com>
 
        PR 26699

diff --git a/gas/testsuite/gas/i386/evex-no-scale-64.d b/gas/testsuite/gas/i386/evex-no-scale-64.d
index 6c9f68faf234af5bd43e8236feb348389f85e98e..33623656eefbc6fcc8046bbbffbdff8d598c25a8 100644 (file)
--- a/gas/testsuite/gas/i386/evex-no-scale-64.d
+++ b/gas/testsuite/gas/i386/evex-no-scale-64.d
@@ -10,5 +10,5 @@ Disassembly of section .text:
  +[a-f0-9]+:   62 f1 7c 48 28 04 05 40 00 00 00        vmovaps 0x40\(,%rax,1\),%zmm0
  +[a-f0-9]+:   62 f1 7c 48 28 04 25 40 00 00 00        vmovaps 0x40,%zmm0
  +[a-f0-9]+:   67 62 f1 7c 48 28 04 05 40 00 00 00     vmovaps 0x40\(,%eax,1\),%zmm0
- +[a-f0-9]+:   67 62 f1 7c 48 28 04 25 40 00 00 00     vmovaps 0x40,%zmm0
+ +[a-f0-9]+:   67 62 f1 7c 48 28 04 25 40 00 00 00     vmovaps 0x40\(,%eiz,1\),%zmm0
  +[a-f0-9]+:   62 f1 7c 48 28 04 25 40 00 00 00        vmovaps 0x40,%zmm0

diff --git a/gas/testsuite/gas/i386/x86-64-addr32-intel.d b/gas/testsuite/gas/i386/x86-64-addr32-intel.d
index 7a25d40162c3a332458482822a10573713171cc3..0988457b34c5e4e5691ee59105f17ade3588415d 100644 (file)
--- a/gas/testsuite/gas/i386/x86-64-addr32-intel.d
+++ b/gas/testsuite/gas/i386/x86-64-addr32-intel.d
@@ -11,15 +11,15 @@ Disassembly of section .text:
 [      ]*[a-f0-9]+:    67 48 8d 80 00 00 00 00[        ]+lea[  ]+rax,\[eax\+0x0\].*
 [      ]*[a-f0-9]+:    67 49 8d 80 00 00 00 00[        ]+lea[  ]+rax,\[r8d\+0x0\].*
 [      ]*[a-f0-9]+:    67 48 8d 05 00 00 00 00[        ]+lea[  ]+rax,\[eip\+0x0\].*
-[      ]*[a-f0-9]+:    67 48 8d 04 25 00 00 00 00      lea[ ]+rax,ds:0x0       .*
+[      ]*[a-f0-9]+:    67 48 8d 04 25 00 00 00 00      lea[ ]+rax,\[eiz\*1\+0x0\].*
 [      ]*[a-f0-9]+:    67 a0 98 08 60 00       addr32 mov al,ds:0x600898
 [      ]*[a-f0-9]+:    67 66 a1 98 08 60 00    addr32 mov ax,ds:0x600898
 [      ]*[a-f0-9]+:    67 a1 98 08 60 00       addr32 mov eax,ds:0x600898
 [      ]*[a-f0-9]+:    67 48 a1 98 08 60 00    addr32 mov rax,ds:0x600898
 [      ]*[a-f0-9]+:    67 48 a1 98 08 80 00    addr32 mov rax,ds:0x800898
-[      ]*[a-f0-9]+:    67 48 8b 1c 25 98 08 80 00      mov[ ]+rbx,QWORD PTR ds:0x800898
+[      ]*[a-f0-9]+:    67 48 8b 1c 25 98 08 80 00      mov[ ]+rbx,QWORD PTR \[eiz\*1\+0x800898\]
 [      ]*[a-f0-9]+:    67 48 a1 ef cd ab 89    addr32 mov rax,ds:0x89abcdef
-[      ]*[a-f0-9]+:    67 48 8b 1c 25 ef cd ab 89      mov[ ]+rbx,QWORD PTR ds:0x89abcdef
+[      ]*[a-f0-9]+:    67 48 8b 1c 25 ef cd ab 89      mov[ ]+rbx,QWORD PTR \[eiz\*1\+0x89abcdef\]
 [      ]*[a-f0-9]+:    67 48 b8 ef cd ab 89 00 00 00 00        addr32 movabs rax,0x89abcdef
 [      ]*[a-f0-9]+:    67 48 bb ef cd ab 89 00 00 00 00        addr32 movabs rbx,0x89abcdef
 [      ]*[a-f0-9]+:    67 a2 98 08 60 00       addr32 mov ds:0x600898,al
@@ -27,9 +27,9 @@ Disassembly of section .text:
 [      ]*[a-f0-9]+:    67 a3 98 08 60 00       addr32 mov ds:0x600898,eax
 [      ]*[a-f0-9]+:    67 48 a3 98 08 60 00    addr32 mov ds:0x600898,rax
 [      ]*[a-f0-9]+:    67 48 a3 98 08 80 00    addr32 mov ds:0x800898,rax
-[      ]*[a-f0-9]+:    67 48 89 1c 25 98 08 80 00      mov[ ]+QWORD PTR ds:0x800898,rbx
+[      ]*[a-f0-9]+:    67 48 89 1c 25 98 08 80 00      mov[ ]+QWORD PTR \[eiz\*1\+0x800898\],rbx
 [      ]*[a-f0-9]+:    67 48 a3 ef cd ab 89    addr32 mov ds:0x89abcdef,rax
-[      ]*[a-f0-9]+:    67 48 89 1c 25 ef cd ab 89      mov[ ]+QWORD PTR ds:0x89abcdef,rbx
-[      ]*[a-f0-9]+:    67 89 04 25 11 22 33 ff         mov[ ]+DWORD PTR ds:0xff332211,eax
+[      ]*[a-f0-9]+:    67 48 89 1c 25 ef cd ab 89      mov[ ]+QWORD PTR \[eiz\*1\+0x89abcdef\],rbx
+[      ]*[a-f0-9]+:    67 89 04 25 11 22 33 ff         mov[ ]+DWORD PTR \[eiz\*1\+0xff332211\],eax
 [      ]*[a-f0-9]+:    67 89 04 65 11 22 33 ff         mov[ ]+DWORD PTR \[eiz\*2\+0xff332211\],eax
 #pass

diff --git a/gas/testsuite/gas/i386/x86-64-addr32.d b/gas/testsuite/gas/i386/x86-64-addr32.d
index c513f0dd8e13b2788bbaa360175d336a6476322b..d9481a7439ec363a18ec7050367fba0e485eaff6 100644 (file)
--- a/gas/testsuite/gas/i386/x86-64-addr32.d
+++ b/gas/testsuite/gas/i386/x86-64-addr32.d
@@ -10,15 +10,15 @@ Disassembly of section .text:
 [      ]*[a-f0-9]+:    67 48 8d 80 00 00 00 00[        ]+lea[  ]+0x0\(%eax\),%rax.*
 [      ]*[a-f0-9]+:    67 49 8d 80 00 00 00 00[        ]+lea[  ]+0x0\(%r8d\),%rax.*
 [      ]*[a-f0-9]+:    67 48 8d 05 00 00 00 00[        ]+lea[  ]+0x0\(%eip\),%rax.*
-[      ]*[a-f0-9]+:    67 48 8d 04 25 00 00 00 00[     ]+lea[ ]+0x0,%rax.*
+[      ]*[a-f0-9]+:    67 48 8d 04 25 00 00 00 00[     ]+lea[ ]+0x0\(,%eiz,1\),%rax.*
 [      ]*[a-f0-9]+:    67 a0 98 08 60 00       addr32 mov 0x600898,%al
 [      ]*[a-f0-9]+:    67 66 a1 98 08 60 00    addr32 mov 0x600898,%ax
 [      ]*[a-f0-9]+:    67 a1 98 08 60 00       addr32 mov 0x600898,%eax
 [      ]*[a-f0-9]+:    67 48 a1 98 08 60 00    addr32 mov 0x600898,%rax
 [      ]*[a-f0-9]+:    67 48 a1 98 08 80 00    addr32 mov 0x800898,%rax
-[      ]*[a-f0-9]+:    67 48 8b 1c 25 98 08 80 00      mov[ ]+0x800898,%rbx
+[      ]*[a-f0-9]+:    67 48 8b 1c 25 98 08 80 00      mov[ ]+0x800898\(,%eiz,1\),%rbx
 [      ]*[a-f0-9]+:    67 48 a1 ef cd ab 89    addr32 mov 0x89abcdef,%rax
-[      ]*[a-f0-9]+:    67 48 8b 1c 25 ef cd ab 89      mov[ ]+0x89abcdef,%rbx
+[      ]*[a-f0-9]+:    67 48 8b 1c 25 ef cd ab 89      mov[ ]+0x89abcdef\(,%eiz,1\),%rbx
 [      ]*[a-f0-9]+:    67 48 b8 ef cd ab 89 00 00 00 00        addr32 movabs \$0x89abcdef,%rax
 [      ]*[a-f0-9]+:    67 48 bb ef cd ab 89 00 00 00 00        addr32 movabs \$0x89abcdef,%rbx
 [      ]*[a-f0-9]+:    67 a2 98 08 60 00       addr32 mov %al,0x600898
@@ -26,9 +26,9 @@ Disassembly of section .text:
 [      ]*[a-f0-9]+:    67 a3 98 08 60 00       addr32 mov %eax,0x600898
 [      ]*[a-f0-9]+:    67 48 a3 98 08 60 00    addr32 mov %rax,0x600898
 [      ]*[a-f0-9]+:    67 48 a3 98 08 80 00    addr32 mov %rax,0x800898
-[      ]*[a-f0-9]+:    67 48 89 1c 25 98 08 80 00      mov[ ]+%rbx,0x800898
+[      ]*[a-f0-9]+:    67 48 89 1c 25 98 08 80 00      mov[ ]+%rbx,0x800898\(,%eiz,1\)
 [      ]*[a-f0-9]+:    67 48 a3 ef cd ab 89    addr32 mov %rax,0x89abcdef
-[      ]*[a-f0-9]+:    67 48 89 1c 25 ef cd ab 89      mov[ ]+%rbx,0x89abcdef
-[      ]*[a-f0-9]+:    67 89 04 25 11 22 33 ff         mov[ ]+%eax,0xff332211
+[      ]*[a-f0-9]+:    67 48 89 1c 25 ef cd ab 89      mov[ ]+%rbx,0x89abcdef\(,%eiz,1\)
+[      ]*[a-f0-9]+:    67 89 04 25 11 22 33 ff         mov[ ]+%eax,0xff332211\(,%eiz,1\)
 [      ]*[a-f0-9]+:    67 89 04 65 11 22 33 ff         mov[ ]+%eax,0xff332211\(,%eiz,2\)
 #pass

diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index 6e1fb264f9473e37b97e9f501263f9a2c55b8714..93de78464e05747dc6b281bcf323dbc872fccf51 100644 (file)
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,7 @@
+2020-10-07  Jan Beulich  <jbeulich@suse.com>
+
+       * i386-dis.c (OP_E_memory): Revert previous change.
+
 2020-09-24  Alan Modra  <amodra@gmail.com>
 
        Apply from master

diff --git a/opcodes/i386-dis.c b/opcodes/i386-dis.c
index 8e0b4a1c2b1ad530d7f49abcf83ba467fb80ff05..e0cee46956b2b39477932918917be53fce5784a8 100644 (file)
--- a/opcodes/i386-dis.c
+++ b/opcodes/i386-dis.c
@@ -14190,7 +14190,7 @@ OP_E_memory (int bytemode, int sizeflag)
                  /* Without base nor index registers, zero-extend the
                     lower 32-bit displacement to 64 bits.  */
                  disp = (unsigned int) disp;
-                 needindex = scale;
+                 needindex = 1;
                }
              needaddr32 = 1;
            }