]> git.ipfire.org Git - thirdparty/qemu.git/commitdiff
target/arm: Add support for NMI in arm_phys_excp_target_el()
authorJinjie Ruan <ruanjinjie@huawei.com>
Fri, 19 Apr 2024 13:32:58 +0000 (14:32 +0100)
committerPeter Maydell <peter.maydell@linaro.org>
Thu, 25 Apr 2024 09:21:05 +0000 (10:21 +0100)
According to Arm GIC section 4.6.3 Interrupt superpriority, the interrupt
with superpriority is always IRQ, never FIQ, so handle NMI same as IRQ in
arm_phys_excp_target_el().

Signed-off-by: Jinjie Ruan <ruanjinjie@huawei.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20240407081733.3231820-8-ruanjinjie@huawei.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
target/arm/helper.c

index f61a65d8114c7ace967dff44208c32bf1280d917..4ee59b37059504e4510c1a31882837a9a73aadca 100644 (file)
@@ -10763,6 +10763,7 @@ uint32_t arm_phys_excp_target_el(CPUState *cs, uint32_t excp_idx,
     hcr_el2 = arm_hcr_el2_eff(env);
     switch (excp_idx) {
     case EXCP_IRQ:
+    case EXCP_NMI:
         scr = ((env->cp15.scr_el3 & SCR_IRQ) == SCR_IRQ);
         hcr = hcr_el2 & HCR_IMO;
         break;