ARM: dts: aspeed: ethanolx: Enable CTS/RTS pins on UART1

BMC UART1 is connected to the P0 CPU UART1. As the connection has
CTS and RTS signals, enable these functions on the BMC side.

Signed-off-by: Konstantin Aladyshev <aladyshev22@gmail.com>
Link: https://lore.kernel.org/r/20230111115227.1357-1-aladyshev22@gmail.com
Signed-off-by: Joel Stanley <joel@jms.id.au>

diff --git a/arch/arm/boot/dts/aspeed-bmc-amd-ethanolx.dts b/arch/arm/boot/dts/aspeed-bmc-amd-ethanolx.dts
index e1f97721ada5c20cd07b609b4b48afa356799df5..90feac5ec62815ded9ef065c5fc119728cb91eec 100644 (file)
--- a/arch/arm/boot/dts/aspeed-bmc-amd-ethanolx.dts
+++ b/arch/arm/boot/dts/aspeed-bmc-amd-ethanolx.dts
@@ -80,7 +80,9 @@
        status = "okay";
        pinctrl-names = "default";
        pinctrl-0 = <&pinctrl_txd1_default
-                    &pinctrl_rxd1_default>;
+                    &pinctrl_rxd1_default
+                    &pinctrl_nrts1_default
+                    &pinctrl_ncts1_default>;
 };
 
 &uart5 {