arm64: dts: imx95: Add i3c1 and i3c2

Add i3c1 and i3c2 support.

Signed-off-by: Frank Li <Frank.Li@nxp.com>
Reviewed-by: Daniel Baluta <daniel.baluta@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

diff --git a/arch/arm64/boot/dts/freescale/imx95.dtsi b/arch/arm64/boot/dts/freescale/imx95.dtsi
index 69a4a2db34635dc86dfbe981981967225b52e552..51625bc9154ec0d4f8ebc50d79d1da4da25ec19d 100644 (file)
--- a/arch/arm64/boot/dts/freescale/imx95.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx95.dtsi
@@ -673,6 +673,19 @@
                                status = "disabled";
                        };
 
+                       i3c2: i3c@42520000 {
+                               compatible = "silvaco,i3c-master-v1";
+                               reg = <0x42520000 0x10000>;
+                               interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
+                               #address-cells = <3>;
+                               #size-cells = <0>;
+                               clocks = <&scmi_clk IMX95_CLK_BUSAON>,
+                                        <&scmi_clk IMX95_CLK_I3C2>,
+                                        <&scmi_clk IMX95_CLK_I3C2SLOW>;
+                               clock-names = "pclk", "fast_clk", "slow_clk";
+                               status = "disabled";
+                       };
+
                        lpi2c3: i2c@42530000 {
                                compatible = "fsl,imx95-lpi2c", "fsl,imx7ulp-lpi2c";
                                reg = <0x42530000 0x10000>;
@@ -1245,6 +1258,19 @@
                                status = "disabled";
                        };
 
+                       i3c1: i3c@44330000 {
+                               compatible = "silvaco,i3c-master-v1";
+                               reg = <0x44330000 0x10000>;
+                               interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
+                               #address-cells = <3>;
+                               #size-cells = <0>;
+                               clocks = <&scmi_clk IMX95_CLK_BUSAON>,
+                                        <&scmi_clk IMX95_CLK_I3C1>,
+                                        <&scmi_clk IMX95_CLK_I3C1SLOW>;
+                               clock-names = "pclk", "fast_clk", "slow_clk";
+                               status = "disabled";
+                       };
+
                        lpi2c1: i2c@44340000 {
                                compatible = "fsl,imx95-lpi2c", "fsl,imx7ulp-lpi2c";
                                reg = <0x44340000 0x10000>;