arm64: dts: qcom: sc8180x: Add USB MP controller and phys

The SC8180X platform comes with a multiport DWC3 controller with two
ports, each connected to a pair of HighSpeed and QMP SuperSpeed PHYs.

Describe these blocks.

Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <quic_bjorande@quicinc.com>
Link: https://lore.kernel.org/r/20240730-sc8180x-usb-mp-v2-5-a7dc4265b553@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>

diff --git a/arch/arm64/boot/dts/qcom/sc8180x.dtsi b/arch/arm64/boot/dts/qcom/sc8180x.dtsi
index 23ef8dc239f70c6f0e146fbeb1af6e948c8eb693..0e9429684dd97bc2d93185815b29e9db0fad892b 100644 (file)
--- a/arch/arm64/boot/dts/qcom/sc8180x.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc8180x.dtsi
@@ -2507,6 +2507,34 @@
                        status = "disabled";
                };
 
+               usb_mp_hsphy0: phy@88e4000 {
+                       compatible = "qcom,sc8180x-usb-hs-phy",
+                                    "qcom,usb-snps-hs-7nm-phy";
+                       reg = <0 0x088e4000 0 0x400>;
+                       #phy-cells = <0>;
+
+                       clocks = <&rpmhcc RPMH_CXO_CLK>;
+                       clock-names = "ref";
+
+                       resets = <&gcc GCC_QUSB2PHY_MP0_BCR>;
+
+                       status = "disabled";
+               };
+
+               usb_mp_hsphy1: phy@88e5000 {
+                       compatible = "qcom,sc8180x-usb-hs-phy",
+                                    "qcom,usb-snps-hs-7nm-phy";
+                       reg = <0 0x088e5000 0 0x400>;
+                       #phy-cells = <0>;
+
+                       clocks = <&rpmhcc RPMH_CXO_CLK>;
+                       clock-names = "ref";
+
+                       resets = <&gcc GCC_QUSB2PHY_MP1_BCR>;
+
+                       status = "disabled";
+               };
+
                usb_prim_qmpphy: phy@88e8000 {
                        compatible = "qcom,sc8180x-qmp-usb3-dp-phy";
                        reg = <0 0x088e8000 0 0x3000>;
@@ -2555,6 +2583,60 @@
                        };
                };
 
+               usb_mp_qmpphy0: phy@88eb000 {
+                       compatible = "qcom,sc8180x-qmp-usb3-uni-phy";
+                       reg = <0 0x088eb000 0 0x1000>;
+
+                       clocks = <&gcc GCC_USB3_MP_PHY_AUX_CLK>,
+                                <&gcc GCC_USB3_PRIM_CLKREF_CLK>,
+                                <&gcc GCC_USB3_MP_PHY_COM_AUX_CLK>,
+                                <&gcc GCC_USB3_MP_PHY_PIPE_0_CLK>;
+                       clock-names = "aux",
+                                     "ref",
+                                     "com_aux",
+                                     "pipe";
+
+                       resets = <&gcc GCC_USB3_UNIPHY_MP0_BCR>,
+                                <&gcc GCC_USB3UNIPHY_PHY_MP0_BCR>;
+                       reset-names = "phy", "phy_phy";
+
+                       power-domains = <&gcc USB30_MP_GDSC>;
+
+                       #clock-cells = <0>;
+                       clock-output-names = "usb2_phy0_pipe_clk";
+
+                       #phy-cells = <0>;
+
+                       status = "disabled";
+               };
+
+               usb_mp_qmpphy1: phy@88ec000 {
+                       compatible = "qcom,sc8180x-qmp-usb3-uni-phy";
+                       reg = <0 0x088ec000 0 0x1000>;
+
+                       clocks = <&gcc GCC_USB3_MP_PHY_AUX_CLK>,
+                                <&gcc GCC_USB3_PRIM_CLKREF_CLK>,
+                                <&gcc GCC_USB3_MP_PHY_COM_AUX_CLK>,
+                                <&gcc GCC_USB3_MP_PHY_PIPE_1_CLK>;
+                       clock-names = "aux",
+                                     "ref",
+                                     "com_aux",
+                                     "pipe";
+
+                       resets = <&gcc GCC_USB3_UNIPHY_MP1_BCR>,
+                                <&gcc GCC_USB3UNIPHY_PHY_MP1_BCR>;
+                       reset-names = "phy", "phy_phy";
+
+                       power-domains = <&gcc USB30_MP_GDSC>;
+
+                       #clock-cells = <0>;
+                       clock-output-names = "usb2_phy1_pipe_clk";
+
+                       #phy-cells = <0>;
+
+                       status = "disabled";
+               };
+
                usb_sec_qmpphy: phy@88ee000 {
                        compatible = "qcom,sc8180x-qmp-usb3-dp-phy";
                        reg = <0 0x088ed000 0 0x3000>;
@@ -2622,6 +2704,76 @@
                        qcom,bcm-voters = <&apps_bcm_voter>;
                };
 
+               usb_mp: usb@a4f8800 {
+                       compatible = "qcom,sc8180x-dwc3-mp", "qcom,dwc3";
+                       reg = <0 0x0a4f8800 0 0x400>;
+                       #address-cells = <2>;
+                       #size-cells = <2>;
+                       ranges;
+                       dma-ranges;
+
+                       clocks = <&gcc GCC_CFG_NOC_USB3_MP_AXI_CLK>,
+                                <&gcc GCC_USB30_MP_MASTER_CLK>,
+                                <&gcc GCC_AGGRE_USB3_MP_AXI_CLK>,
+                                <&gcc GCC_USB30_MP_SLEEP_CLK>,
+                                <&gcc GCC_USB30_MP_MOCK_UTMI_CLK>,
+                                <&gcc GCC_USB3_SEC_CLKREF_CLK>;
+                       clock-names = "cfg_noc",
+                                     "core",
+                                     "iface",
+                                     "sleep",
+                                     "mock_utmi",
+                                     "xo";
+
+                       interconnects = <&aggre1_noc MASTER_USB3_2 0 &mc_virt SLAVE_EBI_CH0 0>,
+                                       <&gem_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_USB3_2 0>;
+                       interconnect-names = "usb-ddr", "apps-usb";
+
+                       assigned-clocks = <&gcc GCC_USB30_MP_MOCK_UTMI_CLK>,
+                                         <&gcc GCC_USB30_MP_MASTER_CLK>;
+                       assigned-clock-rates = <19200000>, <200000000>;
+
+                       interrupts-extended = <&intc GIC_SPI 656 IRQ_TYPE_LEVEL_HIGH>,
+                                             <&intc GIC_SPI 655 IRQ_TYPE_LEVEL_HIGH>,
+                                             <&intc GIC_SPI 658 IRQ_TYPE_LEVEL_HIGH>,
+                                             <&intc GIC_SPI 657 IRQ_TYPE_LEVEL_HIGH>,
+                                             <&pdc 59 IRQ_TYPE_EDGE_BOTH>,
+                                             <&pdc 46 IRQ_TYPE_EDGE_BOTH>,
+                                             <&pdc 71 IRQ_TYPE_EDGE_BOTH>,
+                                             <&pdc 68 IRQ_TYPE_EDGE_BOTH>,
+                                             <&pdc 7 IRQ_TYPE_LEVEL_HIGH>,
+                                             <&pdc 30 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupt-names = "pwr_event_1", "pwr_event_2",
+                                         "hs_phy_1",    "hs_phy_2",
+                                         "dp_hs_phy_1", "dm_hs_phy_1",
+                                         "dp_hs_phy_2", "dm_hs_phy_2",
+                                         "ss_phy_1",    "ss_phy_2";
+
+                       power-domains = <&gcc USB30_MP_GDSC>;
+
+                       resets = <&gcc GCC_USB30_MP_BCR>;
+
+                       status = "disabled";
+
+                       usb_mp_dwc3: usb@a400000 {
+                               compatible = "snps,dwc3";
+                               reg = <0 0x0a400000 0 0xcd00>;
+                               interrupts = <GIC_SPI 654 IRQ_TYPE_LEVEL_HIGH>;
+                               iommus = <&apps_smmu 0x60 0>;
+                               snps,dis_u2_susphy_quirk;
+                               snps,dis_enblslpm_quirk;
+                               phys = <&usb_mp_hsphy0>,
+                                      <&usb_mp_qmpphy0>,
+                                      <&usb_mp_hsphy1>,
+                                      <&usb_mp_qmpphy1>;
+                               phy-names = "usb2-0",
+                                           "usb3-0",
+                                           "usb2-1",
+                                           "usb3-1";
+                               dr_mode = "host";
+                       };
+               };
+
                usb_prim: usb@a6f8800 {
                        compatible = "qcom,sc8180x-dwc3", "qcom,dwc3";
                        reg = <0 0x0a6f8800 0 0x400>;