]> git.ipfire.org Git - thirdparty/kernel/stable.git/commitdiff
net/mlx5: Extract MTCTR register read logic into helper function
authorCarolina Jubran <cjubran@nvidia.com>
Tue, 12 Aug 2025 14:17:07 +0000 (17:17 +0300)
committerPaolo Abeni <pabeni@redhat.com>
Tue, 9 Sep 2025 07:33:24 +0000 (09:33 +0200)
Refactor the MTCTR register reading logic into a dedicated helper to
lay the groundwork for the next patch.

Signed-off-by: Carolina Jubran <cjubran@nvidia.com>
Reviewed-by: Dragos Tatulea <dtatulea@nvidia.com>
Signed-off-by: Tariq Toukan <tariqt@nvidia.com>
Link: https://patch.msgid.link/1755008228-88881-3-git-send-email-tariqt@nvidia.com
Signed-off-by: Paolo Abeni <pabeni@redhat.com>
drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

index 214d732d18e9012e1444571323ad81791aecf43a..9b49bdc339add1e32f7edf83bfa24196eb76588d 100644 (file)
@@ -247,27 +247,24 @@ static bool mlx5_is_ptm_source_time_available(struct mlx5_core_dev *dev)
        return !!MLX5_GET(mtptm_reg, out, psta);
 }
 
-static int mlx5_mtctr_syncdevicetime(ktime_t *device_time,
-                                    struct system_counterval_t *sys_counterval,
-                                    void *ctx)
+static int mlx5_mtctr_read(struct mlx5_core_dev *mdev,
+                          bool real_time_mode,
+                          struct system_counterval_t *sys_counterval,
+                          u64 *device)
 {
        u32 out[MLX5_ST_SZ_DW(mtctr_reg)] = {0};
        u32 in[MLX5_ST_SZ_DW(mtctr_reg)] = {0};
-       struct mlx5_core_dev *mdev = ctx;
-       bool real_time_mode;
-       u64 host, device;
+       u64 host;
        int err;
 
-       real_time_mode = mlx5_real_time_mode(mdev);
-
        MLX5_SET(mtctr_reg, in, first_clock_timestamp_request,
                 MLX5_MTCTR_REQUEST_PTM_ROOT_CLOCK);
        MLX5_SET(mtctr_reg, in, second_clock_timestamp_request,
                 real_time_mode ? MLX5_MTCTR_REQUEST_REAL_TIME_CLOCK :
-                MLX5_MTCTR_REQUEST_FREE_RUNNING_COUNTER);
+                                 MLX5_MTCTR_REQUEST_FREE_RUNNING_COUNTER);
 
-       err = mlx5_core_access_reg(mdev, in, sizeof(in), out, sizeof(out), MLX5_REG_MTCTR,
-                                  0, 0);
+       err = mlx5_core_access_reg(mdev, in, sizeof(in), out, sizeof(out),
+                                  MLX5_REG_MTCTR, 0, 0);
        if (err)
                return err;
 
@@ -281,8 +278,26 @@ static int mlx5_mtctr_syncdevicetime(ktime_t *device_time,
                        .cs_id = CSID_X86_ART,
                        .use_nsecs = true,
        };
+       *device = MLX5_GET64(mtctr_reg, out, second_clock_timestamp);
+
+       return 0;
+}
+
+static int mlx5_mtctr_syncdevicetime(ktime_t *device_time,
+                                    struct system_counterval_t *sys_counterval,
+                                    void *ctx)
+{
+       struct mlx5_core_dev *mdev = ctx;
+       bool real_time_mode;
+       u64 device;
+       int err;
+
+       real_time_mode = mlx5_real_time_mode(mdev);
+
+       err = mlx5_mtctr_read(mdev, real_time_mode, sys_counterval, &device);
+       if (err)
+               return err;
 
-       device = MLX5_GET64(mtctr_reg, out, second_clock_timestamp);
        if (real_time_mode)
                *device_time = ns_to_ktime(REAL_TIME_TO_NS(device >> 32, device & U32_MAX));
        else