RISC-V: Fix a bug that is the CMO builtins are missing parameter

We changed builtins format about zicbom and zicboz subextensions and modified test cases.

diff with the previous version:
1.We modified the FUNCTION_TYPE from RISCV_VOID_FTYPE_SI/DI to RISCV_VOID_FTYPE_VOID_PTR.
2.We added a new RISCV_ATYPE_VOID_PTR in riscv-builtins.cc and a new DEF_RISCV_FTYPE (1, (VOID, VOID_PTR)) in riscv-ftypes.def.
3.We deleted DEF_RISCV_FTYPE (1, (VOID, SI/DI)).
4.We modified the input parameters of the test cases.

Thanks, Simon and Kito.

gcc/ChangeLog:

	* config/riscv/riscv-builtins.cc (RISCV_ATYPE_VOID_PTR): New.
	* config/riscv/riscv-cmo.def (RISCV_BUILTIN): Changed the FUNCTION_TYPE
	of RISCV_BUILTIN.
	* config/riscv/riscv-ftypes.def (0): Remove unused.
	(1): New.

gcc/testsuite/ChangeLog:

	* gcc.target/riscv/cmo-zicbom-1.c: modified the input parameters.
	* gcc.target/riscv/cmo-zicbom-2.c: modified the input parameters.
	* gcc.target/riscv/cmo-zicboz-1.c: modified the input parameters.
	* gcc.target/riscv/cmo-zicboz-2.c: modified the input parameters.

diff --git a/gcc/config/riscv/riscv-builtins.cc b/gcc/config/riscv/riscv-builtins.cc
index 795132a0c164b3cbcba918808d0a51c69fac82da..1218fdfc67d0bf2de6d9d06fe1ca7255c209f239 100644 (file)
--- a/gcc/config/riscv/riscv-builtins.cc
+++ b/gcc/config/riscv/riscv-builtins.cc
@@ -133,6 +133,7 @@ AVAIL (prefetchi64, TARGET_ZICBOP && TARGET_64BIT)
 #define RISCV_ATYPE_USI unsigned_intSI_type_node
 #define RISCV_ATYPE_SI intSI_type_node
 #define RISCV_ATYPE_DI intDI_type_node
+#define RISCV_ATYPE_VOID_PTR ptr_type_node
 
 /* RISCV_FTYPE_ATYPESN takes N RISCV_FTYPES-like type codes and lists
    their associated RISCV_ATYPEs.  */

diff --git a/gcc/config/riscv/riscv-cmo.def b/gcc/config/riscv/riscv-cmo.def
index b30ecf96ec13537e3e55ba2439866ca56c384224..9fe5094ce1a783748e001334a0efe04caedf0612 100644 (file)
--- a/gcc/config/riscv/riscv-cmo.def
+++ b/gcc/config/riscv/riscv-cmo.def
@@ -1,16 +1,16 @@
 // zicbom
-RISCV_BUILTIN (clean_si, "zicbom_cbo_clean", RISCV_BUILTIN_DIRECT, RISCV_SI_FTYPE, clean32),
-RISCV_BUILTIN (clean_di, "zicbom_cbo_clean", RISCV_BUILTIN_DIRECT, RISCV_DI_FTYPE, clean64),
+RISCV_BUILTIN (clean_si, "zicbom_cbo_clean", RISCV_BUILTIN_DIRECT_NO_TARGET, RISCV_VOID_FTYPE_VOID_PTR, clean32),
+RISCV_BUILTIN (clean_di, "zicbom_cbo_clean", RISCV_BUILTIN_DIRECT_NO_TARGET, RISCV_VOID_FTYPE_VOID_PTR, clean64),
 
-RISCV_BUILTIN (flush_si, "zicbom_cbo_flush", RISCV_BUILTIN_DIRECT, RISCV_SI_FTYPE, flush32),
-RISCV_BUILTIN (flush_di, "zicbom_cbo_flush", RISCV_BUILTIN_DIRECT, RISCV_DI_FTYPE, flush64),
+RISCV_BUILTIN (flush_si, "zicbom_cbo_flush", RISCV_BUILTIN_DIRECT_NO_TARGET, RISCV_VOID_FTYPE_VOID_PTR, flush32),
+RISCV_BUILTIN (flush_di, "zicbom_cbo_flush", RISCV_BUILTIN_DIRECT_NO_TARGET, RISCV_VOID_FTYPE_VOID_PTR, flush64),
 
-RISCV_BUILTIN (inval_si, "zicbom_cbo_inval", RISCV_BUILTIN_DIRECT, RISCV_SI_FTYPE, inval32),
-RISCV_BUILTIN (inval_di, "zicbom_cbo_inval", RISCV_BUILTIN_DIRECT, RISCV_DI_FTYPE, inval64),
+RISCV_BUILTIN (inval_si, "zicbom_cbo_inval", RISCV_BUILTIN_DIRECT_NO_TARGET, RISCV_VOID_FTYPE_VOID_PTR, inval32),
+RISCV_BUILTIN (inval_di, "zicbom_cbo_inval", RISCV_BUILTIN_DIRECT_NO_TARGET, RISCV_VOID_FTYPE_VOID_PTR, inval64),
 
 // zicboz
-RISCV_BUILTIN (zero_si, "zicboz_cbo_zero", RISCV_BUILTIN_DIRECT, RISCV_SI_FTYPE, zero32),
-RISCV_BUILTIN (zero_di, "zicboz_cbo_zero", RISCV_BUILTIN_DIRECT, RISCV_DI_FTYPE, zero64),
+RISCV_BUILTIN (zero_si, "zicboz_cbo_zero", RISCV_BUILTIN_DIRECT_NO_TARGET, RISCV_VOID_FTYPE_VOID_PTR, zero32),
+RISCV_BUILTIN (zero_di, "zicboz_cbo_zero", RISCV_BUILTIN_DIRECT_NO_TARGET, RISCV_VOID_FTYPE_VOID_PTR, zero64),
 
 // zicbop
 RISCV_BUILTIN (prefetchi_si, "zicbop_cbo_prefetchi", RISCV_BUILTIN_DIRECT, RISCV_SI_FTYPE_SI, prefetchi32),

diff --git a/gcc/config/riscv/riscv-ftypes.def b/gcc/config/riscv/riscv-ftypes.def
index 62421292ce760312e8e3475115305d271c810c70..c2b45c63ea172d2e8c1f731da9915bf6d3e5b9d0 100644 (file)
--- a/gcc/config/riscv/riscv-ftypes.def
+++ b/gcc/config/riscv/riscv-ftypes.def
@@ -28,7 +28,6 @@ along with GCC; see the file COPYING3.  If not see
 
 DEF_RISCV_FTYPE (0, (USI))
 DEF_RISCV_FTYPE (1, (VOID, USI))
-DEF_RISCV_FTYPE (0, (SI))
-DEF_RISCV_FTYPE (0, (DI))
+DEF_RISCV_FTYPE (1, (VOID, VOID_PTR))
 DEF_RISCV_FTYPE (1, (SI, SI))
 DEF_RISCV_FTYPE (1, (DI, DI))

diff --git a/gcc/testsuite/gcc.target/riscv/cmo-zicbom-1.c b/gcc/testsuite/gcc.target/riscv/cmo-zicbom-1.c
index e2ba21835116c79b3dee2e0a695c7342125af432..6341f7874d3efe5135453932385d8fb3f304d091 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/cmo-zicbom-1.c
+++ b/gcc/testsuite/gcc.target/riscv/cmo-zicbom-1.c
@@ -1,21 +1,29 @@
 /* { dg-do compile } */
 /* { dg-options "-march=rv64gc_zicbom -mabi=lp64" } */
 
-int foo1()
+int var;
+
+void foo1()
 {
-    return __builtin_riscv_zicbom_cbo_clean();
+    __builtin_riscv_zicbom_cbo_clean(0);
+    __builtin_riscv_zicbom_cbo_clean(&var);
+    __builtin_riscv_zicbom_cbo_clean((void*)0x111);
 }
 
-int foo2()
+void foo2()
 {
-    return __builtin_riscv_zicbom_cbo_flush();
+    __builtin_riscv_zicbom_cbo_flush(0);
+    __builtin_riscv_zicbom_cbo_flush(&var);
+    __builtin_riscv_zicbom_cbo_flush((void*)0x111);
 }
 
-int foo3()
+void foo3()
 {
-    return __builtin_riscv_zicbom_cbo_inval();
+    __builtin_riscv_zicbom_cbo_inval(0);
+    __builtin_riscv_zicbom_cbo_inval(&var);
+    __builtin_riscv_zicbom_cbo_inval((void*)0x111);
 }
 
-/* { dg-final { scan-assembler-times "cbo.clean" 1 } } */
-/* { dg-final { scan-assembler-times "cbo.flush" 1 } } */
-/* { dg-final { scan-assembler-times "cbo.inval" 1 } } */
+/* { dg-final { scan-assembler-times "cbo.clean" 3 } } */
+/* { dg-final { scan-assembler-times "cbo.flush" 3 } } */
+/* { dg-final { scan-assembler-times "cbo.inval" 3 } } */

diff --git a/gcc/testsuite/gcc.target/riscv/cmo-zicbom-2.c b/gcc/testsuite/gcc.target/riscv/cmo-zicbom-2.c
index a605e8b1bdc1799805e154f71cc728f940b9d238..a04f106c8b0ebc52031e7c769dcb072bb12d44f7 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/cmo-zicbom-2.c
+++ b/gcc/testsuite/gcc.target/riscv/cmo-zicbom-2.c
@@ -1,21 +1,29 @@
 /* { dg-do compile } */
 /* { dg-options "-march=rv32gc_zicbom -mabi=ilp32" } */
 
-int foo1()
+int var;
+
+void foo1()
 {
-    return __builtin_riscv_zicbom_cbo_clean();
+    __builtin_riscv_zicbom_cbo_clean(0);
+    __builtin_riscv_zicbom_cbo_clean(&var);
+    __builtin_riscv_zicbom_cbo_clean((void*)0x111);
 }
 
-int foo2()
+void foo2()
 {
-    return __builtin_riscv_zicbom_cbo_flush();
+    __builtin_riscv_zicbom_cbo_flush(0);
+    __builtin_riscv_zicbom_cbo_flush(&var);
+    __builtin_riscv_zicbom_cbo_flush((void*)0x111);
 }
 
-int foo3()
+void foo3()
 {
-    return __builtin_riscv_zicbom_cbo_inval();
+    __builtin_riscv_zicbom_cbo_inval(0);
+    __builtin_riscv_zicbom_cbo_inval(&var);
+    __builtin_riscv_zicbom_cbo_inval((void*)0x111);
 }
 
-/* { dg-final { scan-assembler-times "cbo.clean" 1 } } */
-/* { dg-final { scan-assembler-times "cbo.flush" 1 } } */
-/* { dg-final { scan-assembler-times "cbo.inval" 1 } } */
+/* { dg-final { scan-assembler-times "cbo.clean" 3 } } */
+/* { dg-final { scan-assembler-times "cbo.flush" 3 } } */
+/* { dg-final { scan-assembler-times "cbo.inval" 3 } } */

diff --git a/gcc/testsuite/gcc.target/riscv/cmo-zicboz-1.c b/gcc/testsuite/gcc.target/riscv/cmo-zicboz-1.c
index 96c1674ef2d180ff6696c2e555590cbfdeb8c5f7..5eb78ab94b5a5b21e8993c903786485b4be0c588 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/cmo-zicboz-1.c
+++ b/gcc/testsuite/gcc.target/riscv/cmo-zicboz-1.c
@@ -1,9 +1,13 @@
 /* { dg-do compile } */
 /* { dg-options "-march=rv64gc_zicboz -mabi=lp64" } */
 
-int foo1()
+int var;
+
+void foo1()
 {
-    return __builtin_riscv_zicboz_cbo_zero();
+    __builtin_riscv_zicboz_cbo_zero(0);
+    __builtin_riscv_zicboz_cbo_zero(&var);
+    __builtin_riscv_zicboz_cbo_zero((void*)0x121);
 }
 
-/* { dg-final { scan-assembler-times "cbo.zero" 1 } } */ 
+/* { dg-final { scan-assembler-times "cbo.zero" 3 } } */ 

diff --git a/gcc/testsuite/gcc.target/riscv/cmo-zicboz-2.c b/gcc/testsuite/gcc.target/riscv/cmo-zicboz-2.c
index 9d99839b1e71b62353ed62dc71ff909847257faf..fdc9c719669c7935eeb9b8584e99a13813c77381 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/cmo-zicboz-2.c
+++ b/gcc/testsuite/gcc.target/riscv/cmo-zicboz-2.c
@@ -1,9 +1,13 @@
 /* { dg-do compile } */
 /* { dg-options "-march=rv32gc_zicboz -mabi=ilp32" } */
 
-int foo1()
+int var;
+
+void foo1()
 {
-    return __builtin_riscv_zicboz_cbo_zero();
+    __builtin_riscv_zicboz_cbo_zero(0);
+    __builtin_riscv_zicboz_cbo_zero(&var);
+    __builtin_riscv_zicboz_cbo_zero((void*)0x121);
 }
 
-/* { dg-final { scan-assembler-times "cbo.zero" 1 } } */
+/* { dg-final { scan-assembler-times "cbo.zero" 3 } } */