- | *t0* = *t1* ? ctz(*t1*) : *t2*
- * - ctpop_i32/i64 *t0*, *t1*
+ * - ctpop *t0*, *t1*
- | *t0* = number of bits set in *t1*
|
- | With *ctpop* short for "count population", matching
- | the function name used in ``include/qemu/host-utils.h``.
+ | The name *ctpop* is short for "count population", and matches
+ the function name used in ``include/qemu/host-utils.h``.
Shifts/Rotates
DEF(and, 1, 2, 0, TCG_OPF_INT)
DEF(andc, 1, 2, 0, TCG_OPF_INT)
DEF(clz, 1, 2, 0, TCG_OPF_INT)
+DEF(ctpop, 1, 1, 0, TCG_OPF_INT)
DEF(ctz, 1, 2, 0, TCG_OPF_INT)
DEF(divs, 1, 2, 0, TCG_OPF_INT)
DEF(divs2, 2, 3, 0, TCG_OPF_INT)
DEF(bswap16_i32, 1, 1, 1, 0)
DEF(bswap32_i32, 1, 1, 1, 0)
-DEF(ctpop_i32, 1, 1, 0, 0)
DEF(setcond_i64, 1, 2, 1, 0)
DEF(negsetcond_i64, 1, 2, 1, 0)
DEF(bswap16_i64, 1, 1, 1, 0)
DEF(bswap32_i64, 1, 1, 1, 0)
DEF(bswap64_i64, 1, 1, 1, 0)
-DEF(ctpop_i64, 1, 1, 0, 0)
DEF(add2_i64, 2, 4, 0, 0)
DEF(sub2_i64, 2, 4, 0, 0)
}
return x ? ctz64(x) : y;
- case INDEX_op_ctpop_i32:
- return ctpop32(x);
-
- case INDEX_op_ctpop_i64:
- return ctpop64(x);
+ case INDEX_op_ctpop:
+ return type == TCG_TYPE_I32 ? ctpop32(x) : ctpop64(x);
CASE_OP_32_64(bswap16):
x = bswap16(x);
case INDEX_op_ctz:
done = fold_count_zeros(&ctx, op);
break;
- CASE_OP_32_64(ctpop):
+ case INDEX_op_ctpop:
done = fold_ctpop(&ctx, op);
break;
CASE_OP_32_64(deposit):
tcg_temp_free_i64(t2);
return;
}
- if (tcg_op_supported(INDEX_op_ctpop_i32, TCG_TYPE_I32, 0) ||
- tcg_op_supported(INDEX_op_ctpop_i64, TCG_TYPE_I64, 0)) {
+ if (tcg_op_supported(INDEX_op_ctpop, TCG_TYPE_REG, 0)) {
t = tcg_temp_ebb_new_i32();
tcg_gen_subi_i32(t, arg1, 1);
tcg_gen_andc_i32(t, t, arg1);
{
if (arg2 == 32
&& !tcg_op_supported(INDEX_op_ctz, TCG_TYPE_I32, 0)
- && tcg_op_supported(INDEX_op_ctpop_i32, TCG_TYPE_I32, 0)) {
+ && tcg_op_supported(INDEX_op_ctpop, TCG_TYPE_REG, 0)) {
/* This equivalence has the advantage of not requiring a fixup. */
TCGv_i32 t = tcg_temp_ebb_new_i32();
tcg_gen_subi_i32(t, arg1, 1);
void tcg_gen_ctpop_i32(TCGv_i32 ret, TCGv_i32 arg1)
{
- if (tcg_op_supported(INDEX_op_ctpop_i32, TCG_TYPE_I32, 0)) {
- tcg_gen_op2_i32(INDEX_op_ctpop_i32, ret, arg1);
- } else if (tcg_op_supported(INDEX_op_ctpop_i64, TCG_TYPE_I64, 0)) {
+ if (tcg_op_supported(INDEX_op_ctpop, TCG_TYPE_I32, 0)) {
+ tcg_gen_op2_i32(INDEX_op_ctpop, ret, arg1);
+ } else if (tcg_op_supported(INDEX_op_ctpop, TCG_TYPE_I64, 0)) {
TCGv_i64 t = tcg_temp_ebb_new_i64();
tcg_gen_extu_i32_i64(t, arg1);
tcg_gen_ctpop_i64(t, t);
tcg_gen_op3_i64(INDEX_op_ctz, ret, arg1, arg2);
return;
}
- if (tcg_op_supported(INDEX_op_ctpop_i64, TCG_TYPE_I64, 0)) {
+ if (tcg_op_supported(INDEX_op_ctpop, TCG_TYPE_I64, 0)) {
t = tcg_temp_ebb_new_i64();
tcg_gen_subi_i64(t, arg1, 1);
tcg_gen_andc_i64(t, t, arg1);
tcg_temp_free_i32(t32);
} else if (arg2 == 64
&& !tcg_op_supported(INDEX_op_ctz, TCG_TYPE_I64, 0)
- && tcg_op_supported(INDEX_op_ctpop_i64, TCG_TYPE_I64, 0)) {
+ && tcg_op_supported(INDEX_op_ctpop, TCG_TYPE_I64, 0)) {
/* This equivalence has the advantage of not requiring a fixup. */
TCGv_i64 t = tcg_temp_ebb_new_i64();
tcg_gen_subi_i64(t, arg1, 1);
void tcg_gen_ctpop_i64(TCGv_i64 ret, TCGv_i64 arg1)
{
if (TCG_TARGET_REG_BITS == 64) {
- if (tcg_op_supported(INDEX_op_ctpop_i64, TCG_TYPE_I64, 0)) {
- tcg_gen_op2_i64(INDEX_op_ctpop_i64, ret, arg1);
+ if (tcg_op_supported(INDEX_op_ctpop, TCG_TYPE_I64, 0)) {
+ tcg_gen_op2_i64(INDEX_op_ctpop, ret, arg1);
return;
}
} else {
- if (tcg_op_supported(INDEX_op_ctpop_i32, TCG_TYPE_I32, 0)) {
+ if (tcg_op_supported(INDEX_op_ctpop, TCG_TYPE_I32, 0)) {
tcg_gen_ctpop_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1));
tcg_gen_ctpop_i32(TCGV_LOW(ret), TCGV_LOW(arg1));
tcg_gen_add_i32(TCGV_LOW(ret), TCGV_LOW(ret), TCGV_HIGH(ret));
OUTOP(INDEX_op_and, TCGOutOpBinary, outop_and),
OUTOP(INDEX_op_andc, TCGOutOpBinary, outop_andc),
OUTOP(INDEX_op_clz, TCGOutOpBinary, outop_clz),
- OUTOP(INDEX_op_ctpop_i32, TCGOutOpUnary, outop_ctpop),
- OUTOP(INDEX_op_ctpop_i64, TCGOutOpUnary, outop_ctpop),
+ OUTOP(INDEX_op_ctpop, TCGOutOpUnary, outop_ctpop),
OUTOP(INDEX_op_ctz, TCGOutOpBinary, outop_ctz),
OUTOP(INDEX_op_divs, TCGOutOpBinary, outop_divs),
OUTOP(INDEX_op_divu, TCGOutOpBinary, outop_divu),
}
break;
- case INDEX_op_ctpop_i32:
- case INDEX_op_ctpop_i64:
+ case INDEX_op_ctpop:
case INDEX_op_neg:
case INDEX_op_not:
{
tci_args_rr(insn, &r0, &r1);
regs[r0] = ~regs[r1];
break;
- case INDEX_op_ctpop_i32:
- case INDEX_op_ctpop_i64:
+ case INDEX_op_ctpop:
tci_args_rr(insn, &r0, &r1);
regs[r0] = ctpop_tr(regs[r1]);
break;
op_name, str_r(r0), str_r(r1), s2);
break;
+ case INDEX_op_ctpop:
case INDEX_op_mov:
case INDEX_op_neg:
case INDEX_op_not:
case INDEX_op_bswap32_i32:
case INDEX_op_bswap32_i64:
case INDEX_op_bswap64_i64:
- case INDEX_op_ctpop_i32:
- case INDEX_op_ctpop_i64:
tci_args_rr(insn, &r0, &r1);
info->fprintf_func(info->stream, "%-12s %s, %s",
op_name, str_r(r0), str_r(r1));
static void tgen_ctpop(TCGContext *s, TCGType type, TCGReg a0, TCGReg a1)
{
- tcg_out_op_rr(s, glue(INDEX_op_ctpop_i,TCG_TARGET_REG_BITS), a0, a1);
+ tcg_out_op_rr(s, INDEX_op_ctpop, a0, a1);
}
static TCGConstraintSetIndex cset_ctpop(TCGType type, unsigned flags)