5.17-stable patches

added patches:
	arm-iop32x-offset-irq-numbers-by-1.patch
	asoc-mediatek-mt6358-add-missing-export_symbols.patch
	asoc-rockchip-i2s_tdm-fixup-config-for-snd_soc_daifmt_dsp_a-b.patch
	block-fix-the-maximum-minor-value-is-blk_alloc_ext_minor.patch
	block-restore-the-old-set_task_ioprio-behaviour-wrt-pf_exiting.patch
	net-sparx5-uses-depends-on-bridge-or-bridge.patch
	pinctrl-nuvoton-npcm7xx-rename-ds-macro-to-dstr.patch
	pinctrl-nuvoton-npcm7xx-use-zu-printk-format-for-array_size.patch
	revert-virtio-pci-harden-intx-interrupts.patch
	revert-virtio_pci-harden-msi-x-interrupts.patch
	ubi-fix-race-condition-between-ctrl_cdev_ioctl-and-ubi_cdev_ioctl.patch
	virtio-use-virtio_device_ready-in-virtio_device_restore.patch
	watchdog-rti-wdt-add-missing-pm_runtime_disable-in-probe-function.patch

diff --git a/queue-5.17/arm-iop32x-offset-irq-numbers-by-1.patch b/queue-5.17/arm-iop32x-offset-irq-numbers-by-1.patch
new file mode 100644 (file)
index 0000000..d85570a
--- /dev/null
+++ b/queue-5.17/arm-iop32x-offset-irq-numbers-by-1.patch
@@ -0,0 +1,152 @@
+From 9d67412f24cc3a2c05f35f7c856addb07a2960ce Mon Sep 17 00:00:00 2001
+From: Arnd Bergmann <arnd@arndb.de>
+Date: Tue, 30 Nov 2021 11:16:41 +0100
+Subject: ARM: iop32x: offset IRQ numbers by 1
+
+From: Arnd Bergmann <arnd@arndb.de>
+
+commit 9d67412f24cc3a2c05f35f7c856addb07a2960ce upstream.
+
+iop32x is one of the last platforms to use IRQ 0, and this has apparently
+stopped working in a 2014 cleanup without anyone noticing. This interrupt
+is used for the DMA engine, so most likely this has not actually worked
+in the past 7 years, but it's also not essential for using this board.
+
+I'm splitting out this change from my GENERIC_IRQ_MULTI_HANDLER
+conversion so it can be backported if anyone cares.
+
+Fixes: a71b092a9c68 ("ARM: Convert handle_IRQ to use __handle_domain_irq")
+Signed-off-by: Arnd Bergmann <arnd@arndb.de>
+[ardb: take +1 offset into account in mask/unmask and init as well]
+Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
+Tested-by: Marc Zyngier <maz@kernel.org>
+Tested-by: Vladimir Murzin <vladimir.murzin@arm.com> # ARMv7M
+Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ arch/arm/mach-iop32x/include/mach/entry-macro.S |    2 
+ arch/arm/mach-iop32x/include/mach/irqs.h        |    2 
+ arch/arm/mach-iop32x/irq.c                      |    6 +-
+ arch/arm/mach-iop32x/irqs.h                     |   60 ++++++++++++------------
+ 4 files changed, 37 insertions(+), 33 deletions(-)
+
+--- a/arch/arm/mach-iop32x/include/mach/entry-macro.S
++++ b/arch/arm/mach-iop32x/include/mach/entry-macro.S
+@@ -20,7 +20,7 @@
+       mrc     p6, 0, \irqstat, c8, c0, 0      @ Read IINTSRC
+       cmp     \irqstat, #0
+       clzne   \irqnr, \irqstat
+-      rsbne   \irqnr, \irqnr, #31
++      rsbne   \irqnr, \irqnr, #32
+       .endm
+ 
+       .macro arch_ret_to_user, tmp1, tmp2
+--- a/arch/arm/mach-iop32x/include/mach/irqs.h
++++ b/arch/arm/mach-iop32x/include/mach/irqs.h
+@@ -9,6 +9,6 @@
+ #ifndef __IRQS_H
+ #define __IRQS_H
+ 
+-#define NR_IRQS                       32
++#define NR_IRQS                       33
+ 
+ #endif
+--- a/arch/arm/mach-iop32x/irq.c
++++ b/arch/arm/mach-iop32x/irq.c
+@@ -32,14 +32,14 @@ static void intstr_write(u32 val)
+ static void
+ iop32x_irq_mask(struct irq_data *d)
+ {
+-      iop32x_mask &= ~(1 << d->irq);
++      iop32x_mask &= ~(1 << (d->irq - 1));
+       intctl_write(iop32x_mask);
+ }
+ 
+ static void
+ iop32x_irq_unmask(struct irq_data *d)
+ {
+-      iop32x_mask |= 1 << d->irq;
++      iop32x_mask |= 1 << (d->irq - 1);
+       intctl_write(iop32x_mask);
+ }
+ 
+@@ -65,7 +65,7 @@ void __init iop32x_init_irq(void)
+           machine_is_em7210())
+               *IOP3XX_PCIIRSR = 0x0f;
+ 
+-      for (i = 0; i < NR_IRQS; i++) {
++      for (i = 1; i < NR_IRQS; i++) {
+               irq_set_chip_and_handler(i, &ext_chip, handle_level_irq);
+               irq_clear_status_flags(i, IRQ_NOREQUEST | IRQ_NOPROBE);
+       }
+--- a/arch/arm/mach-iop32x/irqs.h
++++ b/arch/arm/mach-iop32x/irqs.h
+@@ -7,36 +7,40 @@
+ #ifndef __IOP32X_IRQS_H
+ #define __IOP32X_IRQS_H
+ 
++/* Interrupts in Linux start at 1, hardware starts at 0 */
++
++#define IOP_IRQ(x) ((x) + 1)
++
+ /*
+  * IOP80321 chipset interrupts
+  */
+-#define IRQ_IOP32X_DMA0_EOT   0
+-#define IRQ_IOP32X_DMA0_EOC   1
+-#define IRQ_IOP32X_DMA1_EOT   2
+-#define IRQ_IOP32X_DMA1_EOC   3
+-#define IRQ_IOP32X_AA_EOT     6
+-#define IRQ_IOP32X_AA_EOC     7
+-#define IRQ_IOP32X_CORE_PMON  8
+-#define IRQ_IOP32X_TIMER0     9
+-#define IRQ_IOP32X_TIMER1     10
+-#define IRQ_IOP32X_I2C_0      11
+-#define IRQ_IOP32X_I2C_1      12
+-#define IRQ_IOP32X_MESSAGING  13
+-#define IRQ_IOP32X_ATU_BIST   14
+-#define IRQ_IOP32X_PERFMON    15
+-#define IRQ_IOP32X_CORE_PMU   16
+-#define IRQ_IOP32X_BIU_ERR    17
+-#define IRQ_IOP32X_ATU_ERR    18
+-#define IRQ_IOP32X_MCU_ERR    19
+-#define IRQ_IOP32X_DMA0_ERR   20
+-#define IRQ_IOP32X_DMA1_ERR   21
+-#define IRQ_IOP32X_AA_ERR     23
+-#define IRQ_IOP32X_MSG_ERR    24
+-#define IRQ_IOP32X_SSP                25
+-#define IRQ_IOP32X_XINT0      27
+-#define IRQ_IOP32X_XINT1      28
+-#define IRQ_IOP32X_XINT2      29
+-#define IRQ_IOP32X_XINT3      30
+-#define IRQ_IOP32X_HPI                31
++#define IRQ_IOP32X_DMA0_EOT   IOP_IRQ(0)
++#define IRQ_IOP32X_DMA0_EOC   IOP_IRQ(1)
++#define IRQ_IOP32X_DMA1_EOT   IOP_IRQ(2)
++#define IRQ_IOP32X_DMA1_EOC   IOP_IRQ(3)
++#define IRQ_IOP32X_AA_EOT     IOP_IRQ(6)
++#define IRQ_IOP32X_AA_EOC     IOP_IRQ(7)
++#define IRQ_IOP32X_CORE_PMON  IOP_IRQ(8)
++#define IRQ_IOP32X_TIMER0     IOP_IRQ(9)
++#define IRQ_IOP32X_TIMER1     IOP_IRQ(10)
++#define IRQ_IOP32X_I2C_0      IOP_IRQ(11)
++#define IRQ_IOP32X_I2C_1      IOP_IRQ(12)
++#define IRQ_IOP32X_MESSAGING  IOP_IRQ(13)
++#define IRQ_IOP32X_ATU_BIST   IOP_IRQ(14)
++#define IRQ_IOP32X_PERFMON    IOP_IRQ(15)
++#define IRQ_IOP32X_CORE_PMU   IOP_IRQ(16)
++#define IRQ_IOP32X_BIU_ERR    IOP_IRQ(17)
++#define IRQ_IOP32X_ATU_ERR    IOP_IRQ(18)
++#define IRQ_IOP32X_MCU_ERR    IOP_IRQ(19)
++#define IRQ_IOP32X_DMA0_ERR   IOP_IRQ(20)
++#define IRQ_IOP32X_DMA1_ERR   IOP_IRQ(21)
++#define IRQ_IOP32X_AA_ERR     IOP_IRQ(23)
++#define IRQ_IOP32X_MSG_ERR    IOP_IRQ(24)
++#define IRQ_IOP32X_SSP                IOP_IRQ(25)
++#define IRQ_IOP32X_XINT0      IOP_IRQ(27)
++#define IRQ_IOP32X_XINT1      IOP_IRQ(28)
++#define IRQ_IOP32X_XINT2      IOP_IRQ(29)
++#define IRQ_IOP32X_XINT3      IOP_IRQ(30)
++#define IRQ_IOP32X_HPI                IOP_IRQ(31)
+ 
+ #endif

diff --git a/queue-5.17/asoc-mediatek-mt6358-add-missing-export_symbols.patch b/queue-5.17/asoc-mediatek-mt6358-add-missing-export_symbols.patch
new file mode 100644 (file)
index 0000000..8724c2d
--- /dev/null
+++ b/queue-5.17/asoc-mediatek-mt6358-add-missing-export_symbols.patch
@@ -0,0 +1,60 @@
+From a7663c89f4193dbf717572e46e5a3251940dbdc8 Mon Sep 17 00:00:00 2001
+From: Jiaxin Yu <jiaxin.yu@mediatek.com>
+Date: Sat, 19 Mar 2022 20:03:25 +0800
+Subject: ASoC: mediatek: mt6358: add missing EXPORT_SYMBOLs
+
+From: Jiaxin Yu <jiaxin.yu@mediatek.com>
+
+commit a7663c89f4193dbf717572e46e5a3251940dbdc8 upstream.
+
+Fixes the following build errors when mt6358 is configured as module:
+
+>> ERROR: modpost: "mt6358_set_mtkaif_protocol"
+>> [sound/soc/mediatek/mt8186/mt8186-mt6366-rt1019-rt5682s.ko] undefined!
+>> ERROR: modpost: "mt6358_set_mtkaif_protocol"
+>> [sound/soc/mediatek/mt8186/mt8186-mt6366-da7219-max98357.ko] undefined!
+
+Fixes: 6a8d4198ca80 ("ASoC: mediatek: mt6358: add codec driver")
+Signed-off-by: Jiaxin Yu <jiaxin.yu@mediatek.com>
+Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
+Link: https://lore.kernel.org/r/20220319120325.11882-1-jiaxin.yu@mediatek.com
+Signed-off-by: Mark Brown <broonie@kernel.org>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ sound/soc/codecs/mt6358.c |    4 ++++
+ 1 file changed, 4 insertions(+)
+
+--- a/sound/soc/codecs/mt6358.c
++++ b/sound/soc/codecs/mt6358.c
+@@ -107,6 +107,7 @@ int mt6358_set_mtkaif_protocol(struct sn
+       priv->mtkaif_protocol = mtkaif_protocol;
+       return 0;
+ }
++EXPORT_SYMBOL_GPL(mt6358_set_mtkaif_protocol);
+ 
+ static void playback_gpio_set(struct mt6358_priv *priv)
+ {
+@@ -273,6 +274,7 @@ int mt6358_mtkaif_calibration_enable(str
+                          1 << RG_AUD_PAD_TOP_DAT_MISO_LOOPBACK_SFT);
+       return 0;
+ }
++EXPORT_SYMBOL_GPL(mt6358_mtkaif_calibration_enable);
+ 
+ int mt6358_mtkaif_calibration_disable(struct snd_soc_component *cmpnt)
+ {
+@@ -296,6 +298,7 @@ int mt6358_mtkaif_calibration_disable(st
+       capture_gpio_reset(priv);
+       return 0;
+ }
++EXPORT_SYMBOL_GPL(mt6358_mtkaif_calibration_disable);
+ 
+ int mt6358_set_mtkaif_calibration_phase(struct snd_soc_component *cmpnt,
+                                       int phase_1, int phase_2)
+@@ -310,6 +313,7 @@ int mt6358_set_mtkaif_calibration_phase(
+                          phase_2 << RG_AUD_PAD_TOP_PHASE_MODE2_SFT);
+       return 0;
+ }
++EXPORT_SYMBOL_GPL(mt6358_set_mtkaif_calibration_phase);
+ 
+ /* dl pga gain */
+ enum {

diff --git a/queue-5.17/asoc-rockchip-i2s_tdm-fixup-config-for-snd_soc_daifmt_dsp_a-b.patch b/queue-5.17/asoc-rockchip-i2s_tdm-fixup-config-for-snd_soc_daifmt_dsp_a-b.patch
new file mode 100644 (file)
index 0000000..f8f6cfd
--- /dev/null
+++ b/queue-5.17/asoc-rockchip-i2s_tdm-fixup-config-for-snd_soc_daifmt_dsp_a-b.patch
@@ -0,0 +1,44 @@
+From 2f45a4e2897793cc6ae25f5fe78b485ce7fd01d0 Mon Sep 17 00:00:00 2001
+From: Meng Tang <tangmeng@uniontech.com>
+Date: Fri, 18 Mar 2022 18:01:46 +0800
+Subject: ASoC: rockchip: i2s_tdm: Fixup config for SND_SOC_DAIFMT_DSP_A/B
+
+From: Meng Tang <tangmeng@uniontech.com>
+
+commit 2f45a4e2897793cc6ae25f5fe78b485ce7fd01d0 upstream.
+
+SND_SOC_DAIFMT_DSP_A: PCM delay 1 bit mode, L data MSB after FRM LRC
+SND_SOC_DAIFMT_DSP_B: PCM no delay mode, L data MSB during FRM LRC
+
+Fixes: 081068fd64140 (ASoC: rockchip: add support for i2s-tdm controller)
+
+Signed-off-by: Meng Tang <tangmeng@uniontech.com>
+Link: https://lore.kernel.org/r/20220318100146.23991-1-tangmeng@uniontech.com
+Signed-off-by: Mark Brown <broonie@kernel.org>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ sound/soc/rockchip/rockchip_i2s_tdm.c |   10 +++++-----
+ 1 file changed, 5 insertions(+), 5 deletions(-)
+
+--- a/sound/soc/rockchip/rockchip_i2s_tdm.c
++++ b/sound/soc/rockchip/rockchip_i2s_tdm.c
+@@ -469,14 +469,14 @@ static int rockchip_i2s_tdm_set_fmt(stru
+               txcr_val = I2S_TXCR_IBM_NORMAL;
+               rxcr_val = I2S_RXCR_IBM_NORMAL;
+               break;
+-      case SND_SOC_DAIFMT_DSP_A: /* PCM no delay mode */
+-              txcr_val = I2S_TXCR_TFS_PCM;
+-              rxcr_val = I2S_RXCR_TFS_PCM;
+-              break;
+-      case SND_SOC_DAIFMT_DSP_B: /* PCM delay 1 mode */
++      case SND_SOC_DAIFMT_DSP_A: /* PCM delay 1 mode */
+               txcr_val = I2S_TXCR_TFS_PCM | I2S_TXCR_PBM_MODE(1);
+               rxcr_val = I2S_RXCR_TFS_PCM | I2S_RXCR_PBM_MODE(1);
+               break;
++      case SND_SOC_DAIFMT_DSP_B: /* PCM no delay mode */
++              txcr_val = I2S_TXCR_TFS_PCM;
++              rxcr_val = I2S_RXCR_TFS_PCM;
++              break;
+       default:
+               ret = -EINVAL;
+               goto err_pm_put;

diff --git a/queue-5.17/block-fix-the-maximum-minor-value-is-blk_alloc_ext_minor.patch b/queue-5.17/block-fix-the-maximum-minor-value-is-blk_alloc_ext_minor.patch
new file mode 100644 (file)
index 0000000..6c13d62
--- /dev/null
+++ b/queue-5.17/block-fix-the-maximum-minor-value-is-blk_alloc_ext_minor.patch
@@ -0,0 +1,41 @@
+From d1868328dec5ae2cf210111025fcbc71f78dd5ca Mon Sep 17 00:00:00 2001
+From: Christophe JAILLET <christophe.jaillet@wanadoo.fr>
+Date: Sat, 26 Mar 2022 15:50:46 +0100
+Subject: block: Fix the maximum minor value is blk_alloc_ext_minor()
+
+From: Christophe JAILLET <christophe.jaillet@wanadoo.fr>
+
+commit d1868328dec5ae2cf210111025fcbc71f78dd5ca upstream.
+
+ida_alloc_range(..., min, max, ...) returns values from min to max,
+inclusive.
+
+So, NR_EXT_DEVT is a valid idx returned by blk_alloc_ext_minor().
+
+This is an issue because in device_add_disk(), this value is used in:
+   ddev->devt = MKDEV(disk->major, disk->first_minor);
+and NR_EXT_DEVT is '(1 << MINORBITS)'.
+
+So, should 'disk->first_minor' be NR_EXT_DEVT, it would overflow.
+
+Fixes: 22ae8ce8b892 ("block: simplify bdev/disk lookup in blkdev_get")
+Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr>
+Reviewed-by: Jan Kara <jack@suse.cz>
+Link: https://lore.kernel.org/r/cc17199798312406b90834e433d2cefe8266823d.1648306232.git.christophe.jaillet@wanadoo.fr
+Signed-off-by: Jens Axboe <axboe@kernel.dk>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ block/genhd.c |    2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/block/genhd.c
++++ b/block/genhd.c
+@@ -330,7 +330,7 @@ int blk_alloc_ext_minor(void)
+ {
+       int idx;
+ 
+-      idx = ida_alloc_range(&ext_devt_ida, 0, NR_EXT_DEVT, GFP_KERNEL);
++      idx = ida_alloc_range(&ext_devt_ida, 0, NR_EXT_DEVT - 1, GFP_KERNEL);
+       if (idx == -ENOSPC)
+               return -EBUSY;
+       return idx;

diff --git a/queue-5.17/block-restore-the-old-set_task_ioprio-behaviour-wrt-pf_exiting.patch b/queue-5.17/block-restore-the-old-set_task_ioprio-behaviour-wrt-pf_exiting.patch
new file mode 100644 (file)
index 0000000..d901cfa
--- /dev/null
+++ b/queue-5.17/block-restore-the-old-set_task_ioprio-behaviour-wrt-pf_exiting.patch
@@ -0,0 +1,66 @@
+From 15583a563cd5a7358e975599b7de7caacd9e9ce9 Mon Sep 17 00:00:00 2001
+From: Jiri Slaby <jslaby@suse.cz>
+Date: Mon, 28 Mar 2022 10:59:28 +0200
+Subject: block: restore the old set_task_ioprio() behaviour wrt PF_EXITING
+
+From: Jiri Slaby <jslaby@suse.cz>
+
+commit 15583a563cd5a7358e975599b7de7caacd9e9ce9 upstream.
+
+PF_EXITING tasks were silently ignored before the below commits.
+Continue doing so. Otherwise python-psutil tests fail:
+  ERROR: psutil.tests.test_process.TestProcess.test_zombie_process
+  ----------------------------------------------------------------------
+  Traceback (most recent call last):
+    File "/home/abuild/rpmbuild/BUILD/psutil-5.9.0/build/lib.linux-x86_64-3.9/psutil/_pslinux.py", line 1661, in wrapper
+      return fun(self, *args, **kwargs)
+    File "/home/abuild/rpmbuild/BUILD/psutil-5.9.0/build/lib.linux-x86_64-3.9/psutil/_pslinux.py", line 2133, in ionice_set
+      return cext.proc_ioprio_set(self.pid, ioclass, value)
+  ProcessLookupError: [Errno 3] No such process
+
+  During handling of the above exception, another exception occurred:
+
+  Traceback (most recent call last):
+    File "/home/abuild/rpmbuild/BUILD/psutil-5.9.0/psutil/tests/test_process.py", line 1313, in test_zombie_process
+      succeed_or_zombie_p_exc(fun)
+    File "/home/abuild/rpmbuild/BUILD/psutil-5.9.0/psutil/tests/test_process.py", line 1288, in succeed_or_zombie_p_exc
+      return fun()
+    File "/home/abuild/rpmbuild/BUILD/psutil-5.9.0/build/lib.linux-x86_64-3.9/psutil/__init__.py", line 792, in ionice
+      return self._proc.ionice_set(ioclass, value)
+    File "/home/abuild/rpmbuild/BUILD/psutil-5.9.0/build/lib.linux-x86_64-3.9/psutil/_pslinux.py", line 1665, in wrapper
+      raise NoSuchProcess(self.pid, self._name)
+  psutil.NoSuchProcess: process no longer exists (pid=2057)
+
+Cc: Christoph Hellwig <hch@lst.de>
+Cc: Jan Kara <jack@suse.cz>
+Cc: Jens Axboe <axboe@kernel.dk>
+Fixes: 5fc11eebb4 (block: open code create_task_io_context in set_task_ioprio)
+Fixes: a957b61254 (block: fix error in handling dead task for ioprio setting)
+Signed-off-by: Jiri Slaby <jslaby@suse.cz>
+Reviewed-by: Jan Kara <jack@suse.cz>
+Link: https://lore.kernel.org/r/20220328085928.7899-1-jslaby@suse.cz
+Signed-off-by: Jens Axboe <axboe@kernel.dk>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ block/blk-ioc.c |    3 +--
+ 1 file changed, 1 insertion(+), 2 deletions(-)
+
+--- a/block/blk-ioc.c
++++ b/block/blk-ioc.c
+@@ -280,7 +280,6 @@ int set_task_ioprio(struct task_struct *
+ 
+               task_lock(task);
+               if (task->flags & PF_EXITING) {
+-                      err = -ESRCH;
+                       kmem_cache_free(iocontext_cachep, ioc);
+                       goto out;
+               }
+@@ -292,7 +291,7 @@ int set_task_ioprio(struct task_struct *
+       task->io_context->ioprio = ioprio;
+ out:
+       task_unlock(task);
+-      return err;
++      return 0;
+ }
+ EXPORT_SYMBOL_GPL(set_task_ioprio);
+ 

diff --git a/queue-5.17/net-sparx5-uses-depends-on-bridge-or-bridge.patch b/queue-5.17/net-sparx5-uses-depends-on-bridge-or-bridge.patch
new file mode 100644 (file)
index 0000000..a429b26
--- /dev/null
+++ b/queue-5.17/net-sparx5-uses-depends-on-bridge-or-bridge.patch
@@ -0,0 +1,41 @@
+From f9512d654f62604664251dedd437a22fe484974a Mon Sep 17 00:00:00 2001
+From: Randy Dunlap <rdunlap@infradead.org>
+Date: Tue, 29 Mar 2022 18:20:25 -0700
+Subject: net: sparx5: uses, depends on BRIDGE or !BRIDGE
+
+From: Randy Dunlap <rdunlap@infradead.org>
+
+commit f9512d654f62604664251dedd437a22fe484974a upstream.
+
+Fix build errors when BRIDGE=m and SPARX5_SWITCH=y:
+
+riscv64-linux-ld: drivers/net/ethernet/microchip/sparx5/sparx5_switchdev.o: in function `.L305':
+sparx5_switchdev.c:(.text+0xdb0): undefined reference to `br_vlan_enabled'
+riscv64-linux-ld: drivers/net/ethernet/microchip/sparx5/sparx5_switchdev.o: in function `.L283':
+sparx5_switchdev.c:(.text+0xee0): undefined reference to `br_vlan_enabled'
+
+Fixes: 3cfa11bac9bb ("net: sparx5: add the basic sparx5 driver")
+Signed-off-by: Randy Dunlap <rdunlap@infradead.org>
+Reported-by: kernel test robot <lkp@intel.com>
+Cc: Horatiu Vultur <horatiu.vultur@microchip.com>
+Cc: Lars Povlsen <lars.povlsen@microchip.com>
+Cc: Steen Hegelund <Steen.Hegelund@microchip.com>
+Cc: UNGLinuxDriver@microchip.com
+Cc: Paolo Abeni <pabeni@redhat.com>
+Link: https://lore.kernel.org/r/20220330012025.29560-1-rdunlap@infradead.org
+Signed-off-by: Jakub Kicinski <kuba@kernel.org>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/net/ethernet/microchip/sparx5/Kconfig |    1 +
+ 1 file changed, 1 insertion(+)
+
+--- a/drivers/net/ethernet/microchip/sparx5/Kconfig
++++ b/drivers/net/ethernet/microchip/sparx5/Kconfig
+@@ -5,6 +5,7 @@ config SPARX5_SWITCH
+       depends on OF
+       depends on ARCH_SPARX5 || COMPILE_TEST
+       depends on PTP_1588_CLOCK_OPTIONAL
++      depends on BRIDGE || BRIDGE=n
+       select PHYLINK
+       select PHY_SPARX5_SERDES
+       select RESET_CONTROLLER

diff --git a/queue-5.17/pinctrl-nuvoton-npcm7xx-rename-ds-macro-to-dstr.patch b/queue-5.17/pinctrl-nuvoton-npcm7xx-rename-ds-macro-to-dstr.patch
new file mode 100644 (file)
index 0000000..7f041b2
--- /dev/null
+++ b/queue-5.17/pinctrl-nuvoton-npcm7xx-rename-ds-macro-to-dstr.patch
@@ -0,0 +1,283 @@
+From 603501c16431c56f74eaef1ee1390f60a30c2187 Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?Jonathan=20Neusch=C3=A4fer?= <j.neuschaefer@gmx.net>
+Date: Sat, 5 Feb 2022 16:53:31 +0100
+Subject: pinctrl: nuvoton: npcm7xx: Rename DS() macro to DSTR()
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+From: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
+
+commit 603501c16431c56f74eaef1ee1390f60a30c2187 upstream.
+
+The name "DS" is defined in arch/x86/um/shared/sysdep/ptrace_64.h,
+which results in a compiler warning when build-testing on ARCH=um.
+Rename this driver's "DS" macro to DSTR so avoid this collision.
+
+Reported-by: kernel test robot <lkp@intel.com>
+Fixes: 3b588e43ee5c7 ("pinctrl: nuvoton: add NPCM7xx pinctrl and GPIO driver")
+Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
+Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
+Link: https://lore.kernel.org/r/20220205155332.1308899-3-j.neuschaefer@gmx.net
+Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/pinctrl/nuvoton/pinctrl-npcm7xx.c |  156 +++++++++++++++---------------
+ 1 file changed, 78 insertions(+), 78 deletions(-)
+
+--- a/drivers/pinctrl/nuvoton/pinctrl-npcm7xx.c
++++ b/drivers/pinctrl/nuvoton/pinctrl-npcm7xx.c
+@@ -904,7 +904,7 @@ static struct npcm7xx_func npcm7xx_funcs
+ #define DRIVE_STRENGTH_HI_SHIFT               12
+ #define DRIVE_STRENGTH_MASK           0x0000FF00
+ 
+-#define DS(lo, hi)    (((lo) << DRIVE_STRENGTH_LO_SHIFT) | \
++#define DSTR(lo, hi)  (((lo) << DRIVE_STRENGTH_LO_SHIFT) | \
+                        ((hi) << DRIVE_STRENGTH_HI_SHIFT))
+ #define DSLO(x)               (((x) >> DRIVE_STRENGTH_LO_SHIFT) & 0xF)
+ #define DSHI(x)               (((x) >> DRIVE_STRENGTH_HI_SHIFT) & 0xF)
+@@ -924,31 +924,31 @@ struct npcm7xx_pincfg {
+ static const struct npcm7xx_pincfg pincfg[] = {
+       /*              PIN       FUNCTION 1               FUNCTION 2             FUNCTION 3        FLAGS */
+       NPCM7XX_PINCFG(0,        iox1, MFSEL1, 30,        none, NONE, 0,        none, NONE, 0,       0),
+-      NPCM7XX_PINCFG(1,        iox1, MFSEL1, 30,        none, NONE, 0,        none, NONE, 0,       DS(8, 12)),
+-      NPCM7XX_PINCFG(2,        iox1, MFSEL1, 30,        none, NONE, 0,        none, NONE, 0,       DS(8, 12)),
++      NPCM7XX_PINCFG(1,        iox1, MFSEL1, 30,        none, NONE, 0,        none, NONE, 0,       DSTR(8, 12)),
++      NPCM7XX_PINCFG(2,        iox1, MFSEL1, 30,        none, NONE, 0,        none, NONE, 0,       DSTR(8, 12)),
+       NPCM7XX_PINCFG(3,        iox1, MFSEL1, 30,        none, NONE, 0,        none, NONE, 0,       0),
+       NPCM7XX_PINCFG(4,        iox2, MFSEL3, 14,       smb1d, I2CSEGSEL, 7,   none, NONE, 0,       SLEW),
+       NPCM7XX_PINCFG(5,        iox2, MFSEL3, 14,       smb1d, I2CSEGSEL, 7,   none, NONE, 0,       SLEW),
+       NPCM7XX_PINCFG(6,        iox2, MFSEL3, 14,       smb2d, I2CSEGSEL, 10,  none, NONE, 0,       SLEW),
+       NPCM7XX_PINCFG(7,        iox2, MFSEL3, 14,       smb2d, I2CSEGSEL, 10,  none, NONE, 0,       SLEW),
+-      NPCM7XX_PINCFG(8,      lkgpo1, FLOCKR1, 4,        none, NONE, 0,        none, NONE, 0,       DS(8, 12)),
+-      NPCM7XX_PINCFG(9,      lkgpo2, FLOCKR1, 8,        none, NONE, 0,        none, NONE, 0,       DS(8, 12)),
+-      NPCM7XX_PINCFG(10,       ioxh, MFSEL3, 18,        none, NONE, 0,        none, NONE, 0,       DS(8, 12)),
+-      NPCM7XX_PINCFG(11,       ioxh, MFSEL3, 18,        none, NONE, 0,        none, NONE, 0,       DS(8, 12)),
++      NPCM7XX_PINCFG(8,      lkgpo1, FLOCKR1, 4,        none, NONE, 0,        none, NONE, 0,       DSTR(8, 12)),
++      NPCM7XX_PINCFG(9,      lkgpo2, FLOCKR1, 8,        none, NONE, 0,        none, NONE, 0,       DSTR(8, 12)),
++      NPCM7XX_PINCFG(10,       ioxh, MFSEL3, 18,        none, NONE, 0,        none, NONE, 0,       DSTR(8, 12)),
++      NPCM7XX_PINCFG(11,       ioxh, MFSEL3, 18,        none, NONE, 0,        none, NONE, 0,       DSTR(8, 12)),
+       NPCM7XX_PINCFG(12,       gspi, MFSEL1, 24,       smb5b, I2CSEGSEL, 19,  none, NONE, 0,       SLEW),
+       NPCM7XX_PINCFG(13,       gspi, MFSEL1, 24,       smb5b, I2CSEGSEL, 19,  none, NONE, 0,       SLEW),
+       NPCM7XX_PINCFG(14,       gspi, MFSEL1, 24,       smb5c, I2CSEGSEL, 20,  none, NONE, 0,       SLEW),
+       NPCM7XX_PINCFG(15,       gspi, MFSEL1, 24,       smb5c, I2CSEGSEL, 20,  none, NONE, 0,       SLEW),
+-      NPCM7XX_PINCFG(16,     lkgpo0, FLOCKR1, 0,        none, NONE, 0,        none, NONE, 0,       DS(8, 12)),
+-      NPCM7XX_PINCFG(17,      pspi2, MFSEL3, 13,     smb4den, I2CSEGSEL, 23,  none, NONE, 0,       DS(8, 12)),
+-      NPCM7XX_PINCFG(18,      pspi2, MFSEL3, 13,       smb4b, I2CSEGSEL, 14,  none, NONE, 0,       DS(8, 12)),
+-      NPCM7XX_PINCFG(19,      pspi2, MFSEL3, 13,       smb4b, I2CSEGSEL, 14,  none, NONE, 0,       DS(8, 12)),
++      NPCM7XX_PINCFG(16,     lkgpo0, FLOCKR1, 0,        none, NONE, 0,        none, NONE, 0,       DSTR(8, 12)),
++      NPCM7XX_PINCFG(17,      pspi2, MFSEL3, 13,     smb4den, I2CSEGSEL, 23,  none, NONE, 0,       DSTR(8, 12)),
++      NPCM7XX_PINCFG(18,      pspi2, MFSEL3, 13,       smb4b, I2CSEGSEL, 14,  none, NONE, 0,       DSTR(8, 12)),
++      NPCM7XX_PINCFG(19,      pspi2, MFSEL3, 13,       smb4b, I2CSEGSEL, 14,  none, NONE, 0,       DSTR(8, 12)),
+       NPCM7XX_PINCFG(20,      smb4c, I2CSEGSEL, 15,    smb15, MFSEL3, 8,      none, NONE, 0,       0),
+       NPCM7XX_PINCFG(21,      smb4c, I2CSEGSEL, 15,    smb15, MFSEL3, 8,      none, NONE, 0,       0),
+       NPCM7XX_PINCFG(22,      smb4d, I2CSEGSEL, 16,    smb14, MFSEL3, 7,      none, NONE, 0,       0),
+       NPCM7XX_PINCFG(23,      smb4d, I2CSEGSEL, 16,    smb14, MFSEL3, 7,      none, NONE, 0,       0),
+-      NPCM7XX_PINCFG(24,       ioxh, MFSEL3, 18,        none, NONE, 0,        none, NONE, 0,       DS(8, 12)),
+-      NPCM7XX_PINCFG(25,       ioxh, MFSEL3, 18,        none, NONE, 0,        none, NONE, 0,       DS(8, 12)),
++      NPCM7XX_PINCFG(24,       ioxh, MFSEL3, 18,        none, NONE, 0,        none, NONE, 0,       DSTR(8, 12)),
++      NPCM7XX_PINCFG(25,       ioxh, MFSEL3, 18,        none, NONE, 0,        none, NONE, 0,       DSTR(8, 12)),
+       NPCM7XX_PINCFG(26,       smb5, MFSEL1, 2,         none, NONE, 0,        none, NONE, 0,       0),
+       NPCM7XX_PINCFG(27,       smb5, MFSEL1, 2,         none, NONE, 0,        none, NONE, 0,       0),
+       NPCM7XX_PINCFG(28,       smb4, MFSEL1, 1,         none, NONE, 0,        none, NONE, 0,       0),
+@@ -964,12 +964,12 @@ static const struct npcm7xx_pincfg pincf
+       NPCM7XX_PINCFG(39,      smb3b, I2CSEGSEL, 11,     none, NONE, 0,        none, NONE, 0,       SLEW),
+       NPCM7XX_PINCFG(40,      smb3b, I2CSEGSEL, 11,     none, NONE, 0,        none, NONE, 0,       SLEW),
+       NPCM7XX_PINCFG(41,  bmcuart0a, MFSEL1, 9,         none, NONE, 0,        none, NONE, 0,       0),
+-      NPCM7XX_PINCFG(42,  bmcuart0a, MFSEL1, 9,         none, NONE, 0,        none, NONE, 0,       DS(2, 4) | GPO),
++      NPCM7XX_PINCFG(42,  bmcuart0a, MFSEL1, 9,         none, NONE, 0,        none, NONE, 0,       DSTR(2, 4) | GPO),
+       NPCM7XX_PINCFG(43,      uart1, MFSEL1, 10,       jtag2, MFSEL4, 0,  bmcuart1, MFSEL3, 24,    0),
+       NPCM7XX_PINCFG(44,      uart1, MFSEL1, 10,       jtag2, MFSEL4, 0,  bmcuart1, MFSEL3, 24,    0),
+       NPCM7XX_PINCFG(45,      uart1, MFSEL1, 10,       jtag2, MFSEL4, 0,      none, NONE, 0,       0),
+-      NPCM7XX_PINCFG(46,      uart1, MFSEL1, 10,       jtag2, MFSEL4, 0,      none, NONE, 0,       DS(2, 8)),
+-      NPCM7XX_PINCFG(47,      uart1, MFSEL1, 10,       jtag2, MFSEL4, 0,      none, NONE, 0,       DS(2, 8)),
++      NPCM7XX_PINCFG(46,      uart1, MFSEL1, 10,       jtag2, MFSEL4, 0,      none, NONE, 0,       DSTR(2, 8)),
++      NPCM7XX_PINCFG(47,      uart1, MFSEL1, 10,       jtag2, MFSEL4, 0,      none, NONE, 0,       DSTR(2, 8)),
+       NPCM7XX_PINCFG(48,      uart2, MFSEL1, 11,   bmcuart0b, MFSEL4, 1,      none, NONE, 0,       GPO),
+       NPCM7XX_PINCFG(49,      uart2, MFSEL1, 11,   bmcuart0b, MFSEL4, 1,      none, NONE, 0,       0),
+       NPCM7XX_PINCFG(50,      uart2, MFSEL1, 11,        none, NONE, 0,        none, NONE, 0,       0),
+@@ -979,8 +979,8 @@ static const struct npcm7xx_pincfg pincf
+       NPCM7XX_PINCFG(54,      uart2, MFSEL1, 11,        none, NONE, 0,        none, NONE, 0,       0),
+       NPCM7XX_PINCFG(55,      uart2, MFSEL1, 11,        none, NONE, 0,        none, NONE, 0,       0),
+       NPCM7XX_PINCFG(56,      r1err, MFSEL1, 12,        none, NONE, 0,        none, NONE, 0,       0),
+-      NPCM7XX_PINCFG(57,       r1md, MFSEL1, 13,        none, NONE, 0,        none, NONE, 0,       DS(2, 4)),
+-      NPCM7XX_PINCFG(58,       r1md, MFSEL1, 13,        none, NONE, 0,        none, NONE, 0,       DS(2, 4)),
++      NPCM7XX_PINCFG(57,       r1md, MFSEL1, 13,        none, NONE, 0,        none, NONE, 0,       DSTR(2, 4)),
++      NPCM7XX_PINCFG(58,       r1md, MFSEL1, 13,        none, NONE, 0,        none, NONE, 0,       DSTR(2, 4)),
+       NPCM7XX_PINCFG(59,      smb3d, I2CSEGSEL, 13,     none, NONE, 0,        none, NONE, 0,       0),
+       NPCM7XX_PINCFG(60,      smb3d, I2CSEGSEL, 13,     none, NONE, 0,        none, NONE, 0,       0),
+       NPCM7XX_PINCFG(61,      uart1, MFSEL1, 10,        none, NONE, 0,        none, NONE, 0,     GPO),
+@@ -1003,19 +1003,19 @@ static const struct npcm7xx_pincfg pincf
+       NPCM7XX_PINCFG(77,    fanin13, MFSEL2, 13,        none, NONE, 0,        none, NONE, 0,       0),
+       NPCM7XX_PINCFG(78,    fanin14, MFSEL2, 14,        none, NONE, 0,        none, NONE, 0,       0),
+       NPCM7XX_PINCFG(79,    fanin15, MFSEL2, 15,        none, NONE, 0,        none, NONE, 0,       0),
+-      NPCM7XX_PINCFG(80,       pwm0, MFSEL2, 16,        none, NONE, 0,        none, NONE, 0,       DS(4, 8)),
+-      NPCM7XX_PINCFG(81,       pwm1, MFSEL2, 17,        none, NONE, 0,        none, NONE, 0,       DS(4, 8)),
+-      NPCM7XX_PINCFG(82,       pwm2, MFSEL2, 18,        none, NONE, 0,        none, NONE, 0,       DS(4, 8)),
+-      NPCM7XX_PINCFG(83,       pwm3, MFSEL2, 19,        none, NONE, 0,        none, NONE, 0,       DS(4, 8)),
+-      NPCM7XX_PINCFG(84,         r2, MFSEL1, 14,        none, NONE, 0,        none, NONE, 0,       DS(8, 12) | SLEW),
+-      NPCM7XX_PINCFG(85,         r2, MFSEL1, 14,        none, NONE, 0,        none, NONE, 0,       DS(8, 12) | SLEW),
+-      NPCM7XX_PINCFG(86,         r2, MFSEL1, 14,        none, NONE, 0,        none, NONE, 0,       DS(8, 12) | SLEW),
++      NPCM7XX_PINCFG(80,       pwm0, MFSEL2, 16,        none, NONE, 0,        none, NONE, 0,       DSTR(4, 8)),
++      NPCM7XX_PINCFG(81,       pwm1, MFSEL2, 17,        none, NONE, 0,        none, NONE, 0,       DSTR(4, 8)),
++      NPCM7XX_PINCFG(82,       pwm2, MFSEL2, 18,        none, NONE, 0,        none, NONE, 0,       DSTR(4, 8)),
++      NPCM7XX_PINCFG(83,       pwm3, MFSEL2, 19,        none, NONE, 0,        none, NONE, 0,       DSTR(4, 8)),
++      NPCM7XX_PINCFG(84,         r2, MFSEL1, 14,        none, NONE, 0,        none, NONE, 0,       DSTR(8, 12) | SLEW),
++      NPCM7XX_PINCFG(85,         r2, MFSEL1, 14,        none, NONE, 0,        none, NONE, 0,       DSTR(8, 12) | SLEW),
++      NPCM7XX_PINCFG(86,         r2, MFSEL1, 14,        none, NONE, 0,        none, NONE, 0,       DSTR(8, 12) | SLEW),
+       NPCM7XX_PINCFG(87,         r2, MFSEL1, 14,        none, NONE, 0,        none, NONE, 0,       0),
+       NPCM7XX_PINCFG(88,         r2, MFSEL1, 14,        none, NONE, 0,        none, NONE, 0,       0),
+       NPCM7XX_PINCFG(89,         r2, MFSEL1, 14,        none, NONE, 0,        none, NONE, 0,       0),
+       NPCM7XX_PINCFG(90,      r2err, MFSEL1, 15,        none, NONE, 0,        none, NONE, 0,       0),
+-      NPCM7XX_PINCFG(91,       r2md, MFSEL1, 16,        none, NONE, 0,        none, NONE, 0,       DS(2, 4)),
+-      NPCM7XX_PINCFG(92,       r2md, MFSEL1, 16,        none, NONE, 0,        none, NONE, 0,       DS(2, 4)),
++      NPCM7XX_PINCFG(91,       r2md, MFSEL1, 16,        none, NONE, 0,        none, NONE, 0,       DSTR(2, 4)),
++      NPCM7XX_PINCFG(92,       r2md, MFSEL1, 16,        none, NONE, 0,        none, NONE, 0,       DSTR(2, 4)),
+       NPCM7XX_PINCFG(93,    ga20kbc, MFSEL1, 17,       smb5d, I2CSEGSEL, 21,  none, NONE, 0,       0),
+       NPCM7XX_PINCFG(94,    ga20kbc, MFSEL1, 17,       smb5d, I2CSEGSEL, 21,  none, NONE, 0,       0),
+       NPCM7XX_PINCFG(95,        lpc, NONE, 0,           espi, MFSEL4, 8,      gpio, MFSEL1, 26,    0),
+@@ -1061,34 +1061,34 @@ static const struct npcm7xx_pincfg pincf
+       NPCM7XX_PINCFG(133,     smb10, MFSEL4, 13,        none, NONE, 0,        none, NONE, 0,       0),
+       NPCM7XX_PINCFG(134,     smb11, MFSEL4, 14,        none, NONE, 0,        none, NONE, 0,       0),
+       NPCM7XX_PINCFG(135,     smb11, MFSEL4, 14,        none, NONE, 0,        none, NONE, 0,       0),
+-      NPCM7XX_PINCFG(136,       sd1, MFSEL3, 12,        none, NONE, 0,        none, NONE, 0,       DS(8, 12) | SLEW),
+-      NPCM7XX_PINCFG(137,       sd1, MFSEL3, 12,        none, NONE, 0,        none, NONE, 0,       DS(8, 12) | SLEW),
+-      NPCM7XX_PINCFG(138,       sd1, MFSEL3, 12,        none, NONE, 0,        none, NONE, 0,       DS(8, 12) | SLEW),
+-      NPCM7XX_PINCFG(139,       sd1, MFSEL3, 12,        none, NONE, 0,        none, NONE, 0,       DS(8, 12) | SLEW),
+-      NPCM7XX_PINCFG(140,       sd1, MFSEL3, 12,        none, NONE, 0,        none, NONE, 0,       DS(8, 12) | SLEW),
++      NPCM7XX_PINCFG(136,       sd1, MFSEL3, 12,        none, NONE, 0,        none, NONE, 0,       DSTR(8, 12) | SLEW),
++      NPCM7XX_PINCFG(137,       sd1, MFSEL3, 12,        none, NONE, 0,        none, NONE, 0,       DSTR(8, 12) | SLEW),
++      NPCM7XX_PINCFG(138,       sd1, MFSEL3, 12,        none, NONE, 0,        none, NONE, 0,       DSTR(8, 12) | SLEW),
++      NPCM7XX_PINCFG(139,       sd1, MFSEL3, 12,        none, NONE, 0,        none, NONE, 0,       DSTR(8, 12) | SLEW),
++      NPCM7XX_PINCFG(140,       sd1, MFSEL3, 12,        none, NONE, 0,        none, NONE, 0,       DSTR(8, 12) | SLEW),
+       NPCM7XX_PINCFG(141,       sd1, MFSEL3, 12,        none, NONE, 0,        none, NONE, 0,       0),
+-      NPCM7XX_PINCFG(142,       sd1, MFSEL3, 12,        none, NONE, 0,        none, NONE, 0,       DS(8, 12) | SLEW),
++      NPCM7XX_PINCFG(142,       sd1, MFSEL3, 12,        none, NONE, 0,        none, NONE, 0,       DSTR(8, 12) | SLEW),
+       NPCM7XX_PINCFG(143,       sd1, MFSEL3, 12,      sd1pwr, MFSEL4, 5,      none, NONE, 0,       0),
+-      NPCM7XX_PINCFG(144,      pwm4, MFSEL2, 20,        none, NONE, 0,        none, NONE, 0,       DS(4, 8)),
+-      NPCM7XX_PINCFG(145,      pwm5, MFSEL2, 21,        none, NONE, 0,        none, NONE, 0,       DS(4, 8)),
+-      NPCM7XX_PINCFG(146,      pwm6, MFSEL2, 22,        none, NONE, 0,        none, NONE, 0,       DS(4, 8)),
+-      NPCM7XX_PINCFG(147,      pwm7, MFSEL2, 23,        none, NONE, 0,        none, NONE, 0,       DS(4, 8)),
+-      NPCM7XX_PINCFG(148,      mmc8, MFSEL3, 11,        none, NONE, 0,        none, NONE, 0,       DS(8, 12) | SLEW),
+-      NPCM7XX_PINCFG(149,      mmc8, MFSEL3, 11,        none, NONE, 0,        none, NONE, 0,       DS(8, 12) | SLEW),
+-      NPCM7XX_PINCFG(150,      mmc8, MFSEL3, 11,        none, NONE, 0,        none, NONE, 0,       DS(8, 12) | SLEW),
+-      NPCM7XX_PINCFG(151,      mmc8, MFSEL3, 11,        none, NONE, 0,        none, NONE, 0,       DS(8, 12) | SLEW),
+-      NPCM7XX_PINCFG(152,       mmc, MFSEL3, 10,        none, NONE, 0,        none, NONE, 0,       DS(8, 12) | SLEW),
++      NPCM7XX_PINCFG(144,      pwm4, MFSEL2, 20,        none, NONE, 0,        none, NONE, 0,       DSTR(4, 8)),
++      NPCM7XX_PINCFG(145,      pwm5, MFSEL2, 21,        none, NONE, 0,        none, NONE, 0,       DSTR(4, 8)),
++      NPCM7XX_PINCFG(146,      pwm6, MFSEL2, 22,        none, NONE, 0,        none, NONE, 0,       DSTR(4, 8)),
++      NPCM7XX_PINCFG(147,      pwm7, MFSEL2, 23,        none, NONE, 0,        none, NONE, 0,       DSTR(4, 8)),
++      NPCM7XX_PINCFG(148,      mmc8, MFSEL3, 11,        none, NONE, 0,        none, NONE, 0,       DSTR(8, 12) | SLEW),
++      NPCM7XX_PINCFG(149,      mmc8, MFSEL3, 11,        none, NONE, 0,        none, NONE, 0,       DSTR(8, 12) | SLEW),
++      NPCM7XX_PINCFG(150,      mmc8, MFSEL3, 11,        none, NONE, 0,        none, NONE, 0,       DSTR(8, 12) | SLEW),
++      NPCM7XX_PINCFG(151,      mmc8, MFSEL3, 11,        none, NONE, 0,        none, NONE, 0,       DSTR(8, 12) | SLEW),
++      NPCM7XX_PINCFG(152,       mmc, MFSEL3, 10,        none, NONE, 0,        none, NONE, 0,       DSTR(8, 12) | SLEW),
+       NPCM7XX_PINCFG(153,     mmcwp, FLOCKR1, 24,       none, NONE, 0,        none, NONE, 0,       0),  /* Z1/A1 */
+-      NPCM7XX_PINCFG(154,       mmc, MFSEL3, 10,        none, NONE, 0,        none, NONE, 0,       DS(8, 12) | SLEW),
++      NPCM7XX_PINCFG(154,       mmc, MFSEL3, 10,        none, NONE, 0,        none, NONE, 0,       DSTR(8, 12) | SLEW),
+       NPCM7XX_PINCFG(155,     mmccd, MFSEL3, 25,      mmcrst, MFSEL4, 6,      none, NONE, 0,       0),  /* Z1/A1 */
+-      NPCM7XX_PINCFG(156,       mmc, MFSEL3, 10,        none, NONE, 0,        none, NONE, 0,       DS(8, 12) | SLEW),
+-      NPCM7XX_PINCFG(157,       mmc, MFSEL3, 10,        none, NONE, 0,        none, NONE, 0,       DS(8, 12) | SLEW),
+-      NPCM7XX_PINCFG(158,       mmc, MFSEL3, 10,        none, NONE, 0,        none, NONE, 0,       DS(8, 12) | SLEW),
+-      NPCM7XX_PINCFG(159,       mmc, MFSEL3, 10,        none, NONE, 0,        none, NONE, 0,       DS(8, 12) | SLEW),
+-
+-      NPCM7XX_PINCFG(160,    clkout, MFSEL1, 21,        none, NONE, 0,        none, NONE, 0,       DS(8, 12) | SLEW),
+-      NPCM7XX_PINCFG(161,       lpc, NONE, 0,           espi, MFSEL4, 8,      gpio, MFSEL1, 26,    DS(8, 12)),
+-      NPCM7XX_PINCFG(162,    serirq, NONE, 0,           gpio, MFSEL1, 31,     none, NONE, 0,       DS(8, 12)),
++      NPCM7XX_PINCFG(156,       mmc, MFSEL3, 10,        none, NONE, 0,        none, NONE, 0,       DSTR(8, 12) | SLEW),
++      NPCM7XX_PINCFG(157,       mmc, MFSEL3, 10,        none, NONE, 0,        none, NONE, 0,       DSTR(8, 12) | SLEW),
++      NPCM7XX_PINCFG(158,       mmc, MFSEL3, 10,        none, NONE, 0,        none, NONE, 0,       DSTR(8, 12) | SLEW),
++      NPCM7XX_PINCFG(159,       mmc, MFSEL3, 10,        none, NONE, 0,        none, NONE, 0,       DSTR(8, 12) | SLEW),
++
++      NPCM7XX_PINCFG(160,    clkout, MFSEL1, 21,        none, NONE, 0,        none, NONE, 0,       DSTR(8, 12) | SLEW),
++      NPCM7XX_PINCFG(161,       lpc, NONE, 0,           espi, MFSEL4, 8,      gpio, MFSEL1, 26,    DSTR(8, 12)),
++      NPCM7XX_PINCFG(162,    serirq, NONE, 0,           gpio, MFSEL1, 31,     none, NONE, 0,       DSTR(8, 12)),
+       NPCM7XX_PINCFG(163,       lpc, NONE, 0,           espi, MFSEL4, 8,      gpio, MFSEL1, 26,    0),
+       NPCM7XX_PINCFG(164,       lpc, NONE, 0,           espi, MFSEL4, 8,      gpio, MFSEL1, 26,    SLEWLPC),
+       NPCM7XX_PINCFG(165,       lpc, NONE, 0,           espi, MFSEL4, 8,      gpio, MFSEL1, 26,    SLEWLPC),
+@@ -1101,25 +1101,25 @@ static const struct npcm7xx_pincfg pincf
+       NPCM7XX_PINCFG(172,      smb6, MFSEL3, 1,         none, NONE, 0,        none, NONE, 0,       0),
+       NPCM7XX_PINCFG(173,      smb7, MFSEL3, 2,         none, NONE, 0,        none, NONE, 0,       0),
+       NPCM7XX_PINCFG(174,      smb7, MFSEL3, 2,         none, NONE, 0,        none, NONE, 0,       0),
+-      NPCM7XX_PINCFG(175,     pspi1, MFSEL3, 4,       faninx, MFSEL3, 3,      none, NONE, 0,       DS(8, 12)),
+-      NPCM7XX_PINCFG(176,     pspi1, MFSEL3, 4,       faninx, MFSEL3, 3,      none, NONE, 0,       DS(8, 12)),
+-      NPCM7XX_PINCFG(177,     pspi1, MFSEL3, 4,       faninx, MFSEL3, 3,      none, NONE, 0,       DS(8, 12)),
+-      NPCM7XX_PINCFG(178,        r1, MFSEL3, 9,         none, NONE, 0,        none, NONE, 0,       DS(8, 12) | SLEW),
+-      NPCM7XX_PINCFG(179,        r1, MFSEL3, 9,         none, NONE, 0,        none, NONE, 0,       DS(8, 12) | SLEW),
+-      NPCM7XX_PINCFG(180,        r1, MFSEL3, 9,         none, NONE, 0,        none, NONE, 0,       DS(8, 12) | SLEW),
++      NPCM7XX_PINCFG(175,     pspi1, MFSEL3, 4,       faninx, MFSEL3, 3,      none, NONE, 0,       DSTR(8, 12)),
++      NPCM7XX_PINCFG(176,     pspi1, MFSEL3, 4,       faninx, MFSEL3, 3,      none, NONE, 0,       DSTR(8, 12)),
++      NPCM7XX_PINCFG(177,     pspi1, MFSEL3, 4,       faninx, MFSEL3, 3,      none, NONE, 0,       DSTR(8, 12)),
++      NPCM7XX_PINCFG(178,        r1, MFSEL3, 9,         none, NONE, 0,        none, NONE, 0,       DSTR(8, 12) | SLEW),
++      NPCM7XX_PINCFG(179,        r1, MFSEL3, 9,         none, NONE, 0,        none, NONE, 0,       DSTR(8, 12) | SLEW),
++      NPCM7XX_PINCFG(180,        r1, MFSEL3, 9,         none, NONE, 0,        none, NONE, 0,       DSTR(8, 12) | SLEW),
+       NPCM7XX_PINCFG(181,        r1, MFSEL3, 9,         none, NONE, 0,        none, NONE, 0,       0),
+       NPCM7XX_PINCFG(182,        r1, MFSEL3, 9,         none, NONE, 0,        none, NONE, 0,       0),
+-      NPCM7XX_PINCFG(183,     spi3, MFSEL4, 16,         none, NONE, 0,        none, NONE, 0,       DS(8, 12) | SLEW),
+-      NPCM7XX_PINCFG(184,     spi3, MFSEL4, 16,         none, NONE, 0,        none, NONE, 0,       DS(8, 12) | SLEW | GPO),
+-      NPCM7XX_PINCFG(185,     spi3, MFSEL4, 16,         none, NONE, 0,        none, NONE, 0,       DS(8, 12) | SLEW | GPO),
+-      NPCM7XX_PINCFG(186,     spi3, MFSEL4, 16,         none, NONE, 0,        none, NONE, 0,       DS(8, 12)),
+-      NPCM7XX_PINCFG(187,   spi3cs1, MFSEL4, 17,        none, NONE, 0,        none, NONE, 0,       DS(8, 12)),
+-      NPCM7XX_PINCFG(188,  spi3quad, MFSEL4, 20,     spi3cs2, MFSEL4, 18,     none, NONE, 0,    DS(8, 12) | SLEW),
+-      NPCM7XX_PINCFG(189,  spi3quad, MFSEL4, 20,     spi3cs3, MFSEL4, 19,     none, NONE, 0,    DS(8, 12) | SLEW),
+-      NPCM7XX_PINCFG(190,      gpio, FLOCKR1, 20,   nprd_smi, NONE, 0,        none, NONE, 0,       DS(2, 4)),
+-      NPCM7XX_PINCFG(191,      none, NONE, 0,           none, NONE, 0,        none, NONE, 0,       DS(8, 12)),  /* XX */
++      NPCM7XX_PINCFG(183,     spi3, MFSEL4, 16,         none, NONE, 0,        none, NONE, 0,       DSTR(8, 12) | SLEW),
++      NPCM7XX_PINCFG(184,     spi3, MFSEL4, 16,         none, NONE, 0,        none, NONE, 0,       DSTR(8, 12) | SLEW | GPO),
++      NPCM7XX_PINCFG(185,     spi3, MFSEL4, 16,         none, NONE, 0,        none, NONE, 0,       DSTR(8, 12) | SLEW | GPO),
++      NPCM7XX_PINCFG(186,     spi3, MFSEL4, 16,         none, NONE, 0,        none, NONE, 0,       DSTR(8, 12)),
++      NPCM7XX_PINCFG(187,   spi3cs1, MFSEL4, 17,        none, NONE, 0,        none, NONE, 0,       DSTR(8, 12)),
++      NPCM7XX_PINCFG(188,  spi3quad, MFSEL4, 20,     spi3cs2, MFSEL4, 18,     none, NONE, 0,    DSTR(8, 12) | SLEW),
++      NPCM7XX_PINCFG(189,  spi3quad, MFSEL4, 20,     spi3cs3, MFSEL4, 19,     none, NONE, 0,    DSTR(8, 12) | SLEW),
++      NPCM7XX_PINCFG(190,      gpio, FLOCKR1, 20,   nprd_smi, NONE, 0,        none, NONE, 0,       DSTR(2, 4)),
++      NPCM7XX_PINCFG(191,      none, NONE, 0,           none, NONE, 0,        none, NONE, 0,       DSTR(8, 12)),  /* XX */
+ 
+-      NPCM7XX_PINCFG(192,      none, NONE, 0,           none, NONE, 0,        none, NONE, 0,       DS(8, 12)),  /* XX */
++      NPCM7XX_PINCFG(192,      none, NONE, 0,           none, NONE, 0,        none, NONE, 0,       DSTR(8, 12)),  /* XX */
+       NPCM7XX_PINCFG(193,        r1, MFSEL3, 9,         none, NONE, 0,        none, NONE, 0,       0),
+       NPCM7XX_PINCFG(194,     smb0b, I2CSEGSEL, 0,      none, NONE, 0,        none, NONE, 0,       0),
+       NPCM7XX_PINCFG(195,     smb0b, I2CSEGSEL, 0,      none, NONE, 0,        none, NONE, 0,       0),
+@@ -1130,11 +1130,11 @@ static const struct npcm7xx_pincfg pincf
+       NPCM7XX_PINCFG(200,        r2, MFSEL1, 14,        none, NONE, 0,        none, NONE, 0,       0),
+       NPCM7XX_PINCFG(201,        r1, MFSEL3, 9,         none, NONE, 0,        none, NONE, 0,       0),
+       NPCM7XX_PINCFG(202,     smb0c, I2CSEGSEL, 1,      none, NONE, 0,        none, NONE, 0,       0),
+-      NPCM7XX_PINCFG(203,    faninx, MFSEL3, 3,         none, NONE, 0,        none, NONE, 0,       DS(8, 12)),
++      NPCM7XX_PINCFG(203,    faninx, MFSEL3, 3,         none, NONE, 0,        none, NONE, 0,       DSTR(8, 12)),
+       NPCM7XX_PINCFG(204,       ddc, NONE, 0,           gpio, MFSEL3, 22,     none, NONE, 0,       SLEW),
+       NPCM7XX_PINCFG(205,       ddc, NONE, 0,           gpio, MFSEL3, 22,     none, NONE, 0,       SLEW),
+-      NPCM7XX_PINCFG(206,       ddc, NONE, 0,           gpio, MFSEL3, 22,     none, NONE, 0,       DS(4, 8)),
+-      NPCM7XX_PINCFG(207,       ddc, NONE, 0,           gpio, MFSEL3, 22,     none, NONE, 0,       DS(4, 8)),
++      NPCM7XX_PINCFG(206,       ddc, NONE, 0,           gpio, MFSEL3, 22,     none, NONE, 0,       DSTR(4, 8)),
++      NPCM7XX_PINCFG(207,       ddc, NONE, 0,           gpio, MFSEL3, 22,     none, NONE, 0,       DSTR(4, 8)),
+       NPCM7XX_PINCFG(208,       rg2, MFSEL4, 24,         ddr, MFSEL3, 26,     none, NONE, 0,       0),
+       NPCM7XX_PINCFG(209,       rg2, MFSEL4, 24,         ddr, MFSEL3, 26,     none, NONE, 0,       0),
+       NPCM7XX_PINCFG(210,       rg2, MFSEL4, 24,         ddr, MFSEL3, 26,     none, NONE, 0,       0),
+@@ -1146,20 +1146,20 @@ static const struct npcm7xx_pincfg pincf
+       NPCM7XX_PINCFG(216,   rg2mdio, MFSEL4, 23,         ddr, MFSEL3, 26,     none, NONE, 0,       0),
+       NPCM7XX_PINCFG(217,   rg2mdio, MFSEL4, 23,         ddr, MFSEL3, 26,     none, NONE, 0,       0),
+       NPCM7XX_PINCFG(218,     wdog1, MFSEL3, 19,        none, NONE, 0,        none, NONE, 0,       0),
+-      NPCM7XX_PINCFG(219,     wdog2, MFSEL3, 20,        none, NONE, 0,        none, NONE, 0,       DS(4, 8)),
++      NPCM7XX_PINCFG(219,     wdog2, MFSEL3, 20,        none, NONE, 0,        none, NONE, 0,       DSTR(4, 8)),
+       NPCM7XX_PINCFG(220,     smb12, MFSEL3, 5,         none, NONE, 0,        none, NONE, 0,       0),
+       NPCM7XX_PINCFG(221,     smb12, MFSEL3, 5,         none, NONE, 0,        none, NONE, 0,       0),
+       NPCM7XX_PINCFG(222,     smb13, MFSEL3, 6,         none, NONE, 0,        none, NONE, 0,       0),
+       NPCM7XX_PINCFG(223,     smb13, MFSEL3, 6,         none, NONE, 0,        none, NONE, 0,       0),
+ 
+       NPCM7XX_PINCFG(224,      spix, MFSEL4, 27,        none, NONE, 0,        none, NONE, 0,       SLEW),
+-      NPCM7XX_PINCFG(225,      spix, MFSEL4, 27,        none, NONE, 0,        none, NONE, 0,       DS(8, 12) | SLEW | GPO),
+-      NPCM7XX_PINCFG(226,      spix, MFSEL4, 27,        none, NONE, 0,        none, NONE, 0,       DS(8, 12) | SLEW | GPO),
+-      NPCM7XX_PINCFG(227,      spix, MFSEL4, 27,        none, NONE, 0,        none, NONE, 0,       DS(8, 12) | SLEW),
+-      NPCM7XX_PINCFG(228,   spixcs1, MFSEL4, 28,        none, NONE, 0,        none, NONE, 0,       DS(8, 12) | SLEW),
+-      NPCM7XX_PINCFG(229,      spix, MFSEL4, 27,        none, NONE, 0,        none, NONE, 0,       DS(8, 12) | SLEW),
+-      NPCM7XX_PINCFG(230,      spix, MFSEL4, 27,        none, NONE, 0,        none, NONE, 0,       DS(8, 12) | SLEW),
+-      NPCM7XX_PINCFG(231,    clkreq, MFSEL4, 9,         none, NONE, 0,        none, NONE, 0,       DS(8, 12)),
++      NPCM7XX_PINCFG(225,      spix, MFSEL4, 27,        none, NONE, 0,        none, NONE, 0,       DSTR(8, 12) | SLEW | GPO),
++      NPCM7XX_PINCFG(226,      spix, MFSEL4, 27,        none, NONE, 0,        none, NONE, 0,       DSTR(8, 12) | SLEW | GPO),
++      NPCM7XX_PINCFG(227,      spix, MFSEL4, 27,        none, NONE, 0,        none, NONE, 0,       DSTR(8, 12) | SLEW),
++      NPCM7XX_PINCFG(228,   spixcs1, MFSEL4, 28,        none, NONE, 0,        none, NONE, 0,       DSTR(8, 12) | SLEW),
++      NPCM7XX_PINCFG(229,      spix, MFSEL4, 27,        none, NONE, 0,        none, NONE, 0,       DSTR(8, 12) | SLEW),
++      NPCM7XX_PINCFG(230,      spix, MFSEL4, 27,        none, NONE, 0,        none, NONE, 0,       DSTR(8, 12) | SLEW),
++      NPCM7XX_PINCFG(231,    clkreq, MFSEL4, 9,         none, NONE, 0,        none, NONE, 0,       DSTR(8, 12)),
+       NPCM7XX_PINCFG(253,      none, NONE, 0,           none, NONE, 0,        none, NONE, 0,       GPI), /* SDHC1 power */
+       NPCM7XX_PINCFG(254,      none, NONE, 0,           none, NONE, 0,        none, NONE, 0,       GPI), /* SDHC2 power */
+       NPCM7XX_PINCFG(255,      none, NONE, 0,           none, NONE, 0,        none, NONE, 0,       GPI), /* DACOSEL */

diff --git a/queue-5.17/pinctrl-nuvoton-npcm7xx-use-zu-printk-format-for-array_size.patch b/queue-5.17/pinctrl-nuvoton-npcm7xx-use-zu-printk-format-for-array_size.patch
new file mode 100644 (file)
index 0000000..f944d4c
--- /dev/null
+++ b/queue-5.17/pinctrl-nuvoton-npcm7xx-use-zu-printk-format-for-array_size.patch
@@ -0,0 +1,38 @@
+From 9d0f18bca3b557ae5d2128661ac06d33b3f45c0a Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?Jonathan=20Neusch=C3=A4fer?= <j.neuschaefer@gmx.net>
+Date: Sat, 5 Feb 2022 16:53:30 +0100
+Subject: pinctrl: nuvoton: npcm7xx: Use %zu printk format for ARRAY_SIZE()
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+From: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
+
+commit 9d0f18bca3b557ae5d2128661ac06d33b3f45c0a upstream.
+
+When compile-testing on 64-bit architectures, GCC complains about the
+mismatch of types between the %d format specifier and value returned by
+ARRAY_LENGTH(). Use %zu, which is correct everywhere.
+
+Reported-by: kernel test robot <lkp@intel.com>
+Fixes: 3b588e43ee5c7 ("pinctrl: nuvoton: add NPCM7xx pinctrl and GPIO driver")
+Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
+Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
+Link: https://lore.kernel.org/r/20220205155332.1308899-2-j.neuschaefer@gmx.net
+Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/pinctrl/nuvoton/pinctrl-npcm7xx.c |    2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/drivers/pinctrl/nuvoton/pinctrl-npcm7xx.c
++++ b/drivers/pinctrl/nuvoton/pinctrl-npcm7xx.c
+@@ -1560,7 +1560,7 @@ static int npcm7xx_get_groups_count(stru
+ {
+       struct npcm7xx_pinctrl *npcm = pinctrl_dev_get_drvdata(pctldev);
+ 
+-      dev_dbg(npcm->dev, "group size: %d\n", ARRAY_SIZE(npcm7xx_groups));
++      dev_dbg(npcm->dev, "group size: %zu\n", ARRAY_SIZE(npcm7xx_groups));
+       return ARRAY_SIZE(npcm7xx_groups);
+ }
+ 

diff --git a/queue-5.17/revert-virtio-pci-harden-intx-interrupts.patch b/queue-5.17/revert-virtio-pci-harden-intx-interrupts.patch
new file mode 100644 (file)
index 0000000..59de967
--- /dev/null
+++ b/queue-5.17/revert-virtio-pci-harden-intx-interrupts.patch
@@ -0,0 +1,81 @@
+From 7b79edfb862d6b1ecc66479419ae67a7db2d02e3 Mon Sep 17 00:00:00 2001
+From: Jason Wang <jasowang@redhat.com>
+Date: Wed, 23 Mar 2022 11:15:23 +0800
+Subject: Revert "virtio-pci: harden INTX interrupts"
+
+From: Jason Wang <jasowang@redhat.com>
+
+commit 7b79edfb862d6b1ecc66479419ae67a7db2d02e3 upstream.
+
+This reverts commit 080cd7c3ac8701081d143a15ba17dd9475313188. Since
+the MSI-X interrupts hardening will be reverted in the next patch. We
+will rework the interrupt hardening in the future.
+
+Fixes: 080cd7c3ac87 ("virtio-pci: harden INTX interrupts")
+Signed-off-by: Jason Wang <jasowang@redhat.com>
+Link: https://lore.kernel.org/r/20220323031524.6555-1-jasowang@redhat.com
+Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/virtio/virtio_pci_common.c |   23 ++---------------------
+ drivers/virtio/virtio_pci_common.h |    1 -
+ 2 files changed, 2 insertions(+), 22 deletions(-)
+
+--- a/drivers/virtio/virtio_pci_common.c
++++ b/drivers/virtio/virtio_pci_common.c
+@@ -30,16 +30,8 @@ void vp_disable_cbs(struct virtio_device
+       struct virtio_pci_device *vp_dev = to_vp_device(vdev);
+       int i;
+ 
+-      if (vp_dev->intx_enabled) {
+-              /*
+-               * The below synchronize() guarantees that any
+-               * interrupt for this line arriving after
+-               * synchronize_irq() has completed is guaranteed to see
+-               * intx_soft_enabled == false.
+-               */
+-              WRITE_ONCE(vp_dev->intx_soft_enabled, false);
++      if (vp_dev->intx_enabled)
+               synchronize_irq(vp_dev->pci_dev->irq);
+-      }
+ 
+       for (i = 0; i < vp_dev->msix_vectors; ++i)
+               disable_irq(pci_irq_vector(vp_dev->pci_dev, i));
+@@ -51,16 +43,8 @@ void vp_enable_cbs(struct virtio_device
+       struct virtio_pci_device *vp_dev = to_vp_device(vdev);
+       int i;
+ 
+-      if (vp_dev->intx_enabled) {
+-              disable_irq(vp_dev->pci_dev->irq);
+-              /*
+-               * The above disable_irq() provides TSO ordering and
+-               * as such promotes the below store to store-release.
+-               */
+-              WRITE_ONCE(vp_dev->intx_soft_enabled, true);
+-              enable_irq(vp_dev->pci_dev->irq);
++      if (vp_dev->intx_enabled)
+               return;
+-      }
+ 
+       for (i = 0; i < vp_dev->msix_vectors; ++i)
+               enable_irq(pci_irq_vector(vp_dev->pci_dev, i));
+@@ -113,9 +97,6 @@ static irqreturn_t vp_interrupt(int irq,
+       struct virtio_pci_device *vp_dev = opaque;
+       u8 isr;
+ 
+-      if (!READ_ONCE(vp_dev->intx_soft_enabled))
+-              return IRQ_NONE;
+-
+       /* reading the ISR has the effect of also clearing it so it's very
+        * important to save off the value. */
+       isr = ioread8(vp_dev->isr);
+--- a/drivers/virtio/virtio_pci_common.h
++++ b/drivers/virtio/virtio_pci_common.h
+@@ -63,7 +63,6 @@ struct virtio_pci_device {
+       /* MSI-X support */
+       int msix_enabled;
+       int intx_enabled;
+-      bool intx_soft_enabled;
+       cpumask_var_t *msix_affinity_masks;
+       /* Name strings for interrupts. This size should be enough,
+        * and I'm too lazy to allocate each name separately. */

diff --git a/queue-5.17/revert-virtio_pci-harden-msi-x-interrupts.patch b/queue-5.17/revert-virtio_pci-harden-msi-x-interrupts.patch
new file mode 100644 (file)
index 0000000..eac5873
--- /dev/null
+++ b/queue-5.17/revert-virtio_pci-harden-msi-x-interrupts.patch
@@ -0,0 +1,159 @@
+From eb4cecb453a19b34d5454b49532e09e9cb0c1529 Mon Sep 17 00:00:00 2001
+From: Jason Wang <jasowang@redhat.com>
+Date: Wed, 23 Mar 2022 11:15:24 +0800
+Subject: Revert "virtio_pci: harden MSI-X interrupts"
+
+From: Jason Wang <jasowang@redhat.com>
+
+commit eb4cecb453a19b34d5454b49532e09e9cb0c1529 upstream.
+
+This reverts commit 9e35276a5344f74d4a3600fc4100b3dd251d5c56. Issue
+were reported for the drivers that are using affinity managed IRQ
+where manually toggling IRQ status is not expected. And we forget to
+enable the interrupts in the restore path as well.
+
+In the future, we will rework on the interrupt hardening.
+
+Fixes: 9e35276a5344 ("virtio_pci: harden MSI-X interrupts")
+Reported-by: Marc Zyngier <maz@kernel.org>
+Reported-by: Stefano Garzarella <sgarzare@redhat.com>
+Signed-off-by: Jason Wang <jasowang@redhat.com>
+Link: https://lore.kernel.org/r/20220323031524.6555-2-jasowang@redhat.com
+Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/virtio/virtio_pci_common.c |   27 ++++++---------------------
+ drivers/virtio/virtio_pci_common.h |    6 ++----
+ drivers/virtio/virtio_pci_legacy.c |    5 ++---
+ drivers/virtio/virtio_pci_modern.c |    6 ++----
+ 4 files changed, 12 insertions(+), 32 deletions(-)
+
+--- a/drivers/virtio/virtio_pci_common.c
++++ b/drivers/virtio/virtio_pci_common.c
+@@ -24,8 +24,8 @@ MODULE_PARM_DESC(force_legacy,
+                "Force legacy mode for transitional virtio 1 devices");
+ #endif
+ 
+-/* disable irq handlers */
+-void vp_disable_cbs(struct virtio_device *vdev)
++/* wait for pending irq handlers */
++void vp_synchronize_vectors(struct virtio_device *vdev)
+ {
+       struct virtio_pci_device *vp_dev = to_vp_device(vdev);
+       int i;
+@@ -34,20 +34,7 @@ void vp_disable_cbs(struct virtio_device
+               synchronize_irq(vp_dev->pci_dev->irq);
+ 
+       for (i = 0; i < vp_dev->msix_vectors; ++i)
+-              disable_irq(pci_irq_vector(vp_dev->pci_dev, i));
+-}
+-
+-/* enable irq handlers */
+-void vp_enable_cbs(struct virtio_device *vdev)
+-{
+-      struct virtio_pci_device *vp_dev = to_vp_device(vdev);
+-      int i;
+-
+-      if (vp_dev->intx_enabled)
+-              return;
+-
+-      for (i = 0; i < vp_dev->msix_vectors; ++i)
+-              enable_irq(pci_irq_vector(vp_dev->pci_dev, i));
++              synchronize_irq(pci_irq_vector(vp_dev->pci_dev, i));
+ }
+ 
+ /* the notify function used when creating a virt queue */
+@@ -154,8 +141,7 @@ static int vp_request_msix_vectors(struc
+       snprintf(vp_dev->msix_names[v], sizeof *vp_dev->msix_names,
+                "%s-config", name);
+       err = request_irq(pci_irq_vector(vp_dev->pci_dev, v),
+-                        vp_config_changed, IRQF_NO_AUTOEN,
+-                        vp_dev->msix_names[v],
++                        vp_config_changed, 0, vp_dev->msix_names[v],
+                         vp_dev);
+       if (err)
+               goto error;
+@@ -174,8 +160,7 @@ static int vp_request_msix_vectors(struc
+               snprintf(vp_dev->msix_names[v], sizeof *vp_dev->msix_names,
+                        "%s-virtqueues", name);
+               err = request_irq(pci_irq_vector(vp_dev->pci_dev, v),
+-                                vp_vring_interrupt, IRQF_NO_AUTOEN,
+-                                vp_dev->msix_names[v],
++                                vp_vring_interrupt, 0, vp_dev->msix_names[v],
+                                 vp_dev);
+               if (err)
+                       goto error;
+@@ -352,7 +337,7 @@ static int vp_find_vqs_msix(struct virti
+                        "%s-%s",
+                        dev_name(&vp_dev->vdev.dev), names[i]);
+               err = request_irq(pci_irq_vector(vp_dev->pci_dev, msix_vec),
+-                                vring_interrupt, IRQF_NO_AUTOEN,
++                                vring_interrupt, 0,
+                                 vp_dev->msix_names[msix_vec],
+                                 vqs[i]);
+               if (err)
+--- a/drivers/virtio/virtio_pci_common.h
++++ b/drivers/virtio/virtio_pci_common.h
+@@ -101,10 +101,8 @@ static struct virtio_pci_device *to_vp_d
+       return container_of(vdev, struct virtio_pci_device, vdev);
+ }
+ 
+-/* disable irq handlers */
+-void vp_disable_cbs(struct virtio_device *vdev);
+-/* enable irq handlers */
+-void vp_enable_cbs(struct virtio_device *vdev);
++/* wait for pending irq handlers */
++void vp_synchronize_vectors(struct virtio_device *vdev);
+ /* the notify function used when creating a virt queue */
+ bool vp_notify(struct virtqueue *vq);
+ /* the config->del_vqs() implementation */
+--- a/drivers/virtio/virtio_pci_legacy.c
++++ b/drivers/virtio/virtio_pci_legacy.c
+@@ -98,8 +98,8 @@ static void vp_reset(struct virtio_devic
+       /* Flush out the status write, and flush in device writes,
+        * including MSi-X interrupts, if any. */
+       vp_legacy_get_status(&vp_dev->ldev);
+-      /* Disable VQ/configuration callbacks. */
+-      vp_disable_cbs(vdev);
++      /* Flush pending VQ/configuration callbacks. */
++      vp_synchronize_vectors(vdev);
+ }
+ 
+ static u16 vp_config_vector(struct virtio_pci_device *vp_dev, u16 vector)
+@@ -185,7 +185,6 @@ static void del_vq(struct virtio_pci_vq_
+ }
+ 
+ static const struct virtio_config_ops virtio_pci_config_ops = {
+-      .enable_cbs     = vp_enable_cbs,
+       .get            = vp_get,
+       .set            = vp_set,
+       .get_status     = vp_get_status,
+--- a/drivers/virtio/virtio_pci_modern.c
++++ b/drivers/virtio/virtio_pci_modern.c
+@@ -172,8 +172,8 @@ static void vp_reset(struct virtio_devic
+        */
+       while (vp_modern_get_status(mdev))
+               msleep(1);
+-      /* Disable VQ/configuration callbacks. */
+-      vp_disable_cbs(vdev);
++      /* Flush pending VQ/configuration callbacks. */
++      vp_synchronize_vectors(vdev);
+ }
+ 
+ static u16 vp_config_vector(struct virtio_pci_device *vp_dev, u16 vector)
+@@ -380,7 +380,6 @@ static bool vp_get_shm_region(struct vir
+ }
+ 
+ static const struct virtio_config_ops virtio_pci_config_nodev_ops = {
+-      .enable_cbs     = vp_enable_cbs,
+       .get            = NULL,
+       .set            = NULL,
+       .generation     = vp_generation,
+@@ -398,7 +397,6 @@ static const struct virtio_config_ops vi
+ };
+ 
+ static const struct virtio_config_ops virtio_pci_config_ops = {
+-      .enable_cbs     = vp_enable_cbs,
+       .get            = vp_get,
+       .set            = vp_set,
+       .generation     = vp_generation,

diff --git a/queue-5.17/series b/queue-5.17/series
index 1f835a98350fb57cf17380e3f731e604f12367c0..40ba8d51fe27d94f718919357aae5fa7cb2c9c3e 100644 (file)
--- a/queue-5.17/series
+++ b/queue-5.17/series
@@ -1039,3 +1039,16 @@ crypto-x86-poly1305-fixup-sls.patch
 crypto-arm-aes-neonbs-cbc-select-generic-cbc-and-aes.patch
 watch_queue-free-the-page-array-when-watch_queue-is-dismantled.patch
 pinctrl-pinconf-generic-print-arguments-for-bias-pull.patch
+watchdog-rti-wdt-add-missing-pm_runtime_disable-in-probe-function.patch
+net-sparx5-uses-depends-on-bridge-or-bridge.patch
+pinctrl-nuvoton-npcm7xx-rename-ds-macro-to-dstr.patch
+pinctrl-nuvoton-npcm7xx-use-zu-printk-format-for-array_size.patch
+asoc-rockchip-i2s_tdm-fixup-config-for-snd_soc_daifmt_dsp_a-b.patch
+asoc-mediatek-mt6358-add-missing-export_symbols.patch
+ubi-fix-race-condition-between-ctrl_cdev_ioctl-and-ubi_cdev_ioctl.patch
+arm-iop32x-offset-irq-numbers-by-1.patch
+block-fix-the-maximum-minor-value-is-blk_alloc_ext_minor.patch
+block-restore-the-old-set_task_ioprio-behaviour-wrt-pf_exiting.patch
+revert-virtio-pci-harden-intx-interrupts.patch
+revert-virtio_pci-harden-msi-x-interrupts.patch
+virtio-use-virtio_device_ready-in-virtio_device_restore.patch

diff --git a/queue-5.17/ubi-fix-race-condition-between-ctrl_cdev_ioctl-and-ubi_cdev_ioctl.patch b/queue-5.17/ubi-fix-race-condition-between-ctrl_cdev_ioctl-and-ubi_cdev_ioctl.patch
new file mode 100644 (file)
index 0000000..158f1db
--- /dev/null
+++ b/queue-5.17/ubi-fix-race-condition-between-ctrl_cdev_ioctl-and-ubi_cdev_ioctl.patch
@@ -0,0 +1,192 @@
+From 3cbf0e392f173ba0ce425968c8374a6aa3e90f2e Mon Sep 17 00:00:00 2001
+From: Baokun Li <libaokun1@huawei.com>
+Date: Fri, 5 Nov 2021 17:30:22 +0800
+Subject: ubi: Fix race condition between ctrl_cdev_ioctl and ubi_cdev_ioctl
+
+From: Baokun Li <libaokun1@huawei.com>
+
+commit 3cbf0e392f173ba0ce425968c8374a6aa3e90f2e upstream.
+
+Hulk Robot reported a KASAN report about use-after-free:
+ ==================================================================
+ BUG: KASAN: use-after-free in __list_del_entry_valid+0x13d/0x160
+ Read of size 8 at addr ffff888035e37d98 by task ubiattach/1385
+ [...]
+ Call Trace:
+  klist_dec_and_del+0xa7/0x4a0
+  klist_put+0xc7/0x1a0
+  device_del+0x4d4/0xed0
+  cdev_device_del+0x1a/0x80
+  ubi_attach_mtd_dev+0x2951/0x34b0 [ubi]
+  ctrl_cdev_ioctl+0x286/0x2f0 [ubi]
+
+ Allocated by task 1414:
+  device_add+0x60a/0x18b0
+  cdev_device_add+0x103/0x170
+  ubi_create_volume+0x1118/0x1a10 [ubi]
+  ubi_cdev_ioctl+0xb7f/0x1ba0 [ubi]
+
+ Freed by task 1385:
+  cdev_device_del+0x1a/0x80
+  ubi_remove_volume+0x438/0x6c0 [ubi]
+  ubi_cdev_ioctl+0xbf4/0x1ba0 [ubi]
+ [...]
+ ==================================================================
+
+The lock held by ctrl_cdev_ioctl is ubi_devices_mutex, but the lock held
+by ubi_cdev_ioctl is ubi->device_mutex. Therefore, the two locks can be
+concurrent.
+
+ctrl_cdev_ioctl contains two operations: ubi_attach and ubi_detach.
+ubi_detach is bug-free because it uses reference counting to prevent
+concurrency. However, uif_init and uif_close in ubi_attach may race with
+ubi_cdev_ioctl.
+
+uif_init will race with ubi_cdev_ioctl as in the following stack.
+           cpu1                   cpu2                  cpu3
+_______________________|________________________|______________________
+ctrl_cdev_ioctl
+ ubi_attach_mtd_dev
+  uif_init
+                           ubi_cdev_ioctl
+                            ubi_create_volume
+                             cdev_device_add
+   ubi_add_volume
+   // sysfs exist
+   kill_volumes
+                                                    ubi_cdev_ioctl
+                                                     ubi_remove_volume
+                                                      cdev_device_del
+                                                       // first free
+    ubi_free_volume
+     cdev_del
+     // double free
+   cdev_device_del
+
+And uif_close will race with ubi_cdev_ioctl as in the following stack.
+           cpu1                   cpu2                  cpu3
+_______________________|________________________|______________________
+ctrl_cdev_ioctl
+ ubi_attach_mtd_dev
+  uif_init
+                           ubi_cdev_ioctl
+                            ubi_create_volume
+                             cdev_device_add
+  ubi_debugfs_init_dev
+  //error goto out_uif;
+  uif_close
+   kill_volumes
+                                                    ubi_cdev_ioctl
+                                                     ubi_remove_volume
+                                                      cdev_device_del
+                                                       // first free
+    ubi_free_volume
+    // double free
+
+The cause of this problem is that commit 714fb87e8bc0 make device
+"available" before it becomes accessible via sysfs. Therefore, we
+roll back the modification. We will fix the race condition between
+ubi device creation and udev by removing ubi_get_device in
+vol_attribute_show and dev_attribute_show.This avoids accessing
+uninitialized ubi_devices[ubi_num].
+
+ubi_get_device is used to prevent devices from being deleted during
+sysfs execution. However, now kernfs ensures that devices will not
+be deleted before all reference counting are released.
+The key process is shown in the following stack.
+
+device_del
+  device_remove_attrs
+    device_remove_groups
+      sysfs_remove_groups
+        sysfs_remove_group
+          remove_files
+            kernfs_remove_by_name
+              kernfs_remove_by_name_ns
+                __kernfs_remove
+                  kernfs_drain
+
+Fixes: 714fb87e8bc0 ("ubi: Fix race condition between ubi device creation and udev")
+Reported-by: Hulk Robot <hulkci@huawei.com>
+Signed-off-by: Baokun Li <libaokun1@huawei.com>
+Signed-off-by: Richard Weinberger <richard@nod.at>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/mtd/ubi/build.c |    9 +--------
+ drivers/mtd/ubi/vmt.c   |    8 +-------
+ 2 files changed, 2 insertions(+), 15 deletions(-)
+
+--- a/drivers/mtd/ubi/build.c
++++ b/drivers/mtd/ubi/build.c
+@@ -351,9 +351,6 @@ static ssize_t dev_attribute_show(struct
+        * we still can use 'ubi->ubi_num'.
+        */
+       ubi = container_of(dev, struct ubi_device, dev);
+-      ubi = ubi_get_device(ubi->ubi_num);
+-      if (!ubi)
+-              return -ENODEV;
+ 
+       if (attr == &dev_eraseblock_size)
+               ret = sprintf(buf, "%d\n", ubi->leb_size);
+@@ -382,7 +379,6 @@ static ssize_t dev_attribute_show(struct
+       else
+               ret = -EINVAL;
+ 
+-      ubi_put_device(ubi);
+       return ret;
+ }
+ 
+@@ -979,9 +975,6 @@ int ubi_attach_mtd_dev(struct mtd_info *
+                       goto out_detach;
+       }
+ 
+-      /* Make device "available" before it becomes accessible via sysfs */
+-      ubi_devices[ubi_num] = ubi;
+-
+       err = uif_init(ubi);
+       if (err)
+               goto out_detach;
+@@ -1026,6 +1019,7 @@ int ubi_attach_mtd_dev(struct mtd_info *
+       wake_up_process(ubi->bgt_thread);
+       spin_unlock(&ubi->wl_lock);
+ 
++      ubi_devices[ubi_num] = ubi;
+       ubi_notify_all(ubi, UBI_VOLUME_ADDED, NULL);
+       return ubi_num;
+ 
+@@ -1034,7 +1028,6 @@ out_debugfs:
+ out_uif:
+       uif_close(ubi);
+ out_detach:
+-      ubi_devices[ubi_num] = NULL;
+       ubi_wl_close(ubi);
+       ubi_free_all_volumes(ubi);
+       vfree(ubi->vtbl);
+--- a/drivers/mtd/ubi/vmt.c
++++ b/drivers/mtd/ubi/vmt.c
+@@ -56,16 +56,11 @@ static ssize_t vol_attribute_show(struct
+ {
+       int ret;
+       struct ubi_volume *vol = container_of(dev, struct ubi_volume, dev);
+-      struct ubi_device *ubi;
+-
+-      ubi = ubi_get_device(vol->ubi->ubi_num);
+-      if (!ubi)
+-              return -ENODEV;
++      struct ubi_device *ubi = vol->ubi;
+ 
+       spin_lock(&ubi->volumes_lock);
+       if (!ubi->volumes[vol->vol_id]) {
+               spin_unlock(&ubi->volumes_lock);
+-              ubi_put_device(ubi);
+               return -ENODEV;
+       }
+       /* Take a reference to prevent volume removal */
+@@ -103,7 +98,6 @@ static ssize_t vol_attribute_show(struct
+       vol->ref_count -= 1;
+       ubi_assert(vol->ref_count >= 0);
+       spin_unlock(&ubi->volumes_lock);
+-      ubi_put_device(ubi);
+       return ret;
+ }
+ 

diff --git a/queue-5.17/virtio-use-virtio_device_ready-in-virtio_device_restore.patch b/queue-5.17/virtio-use-virtio_device_ready-in-virtio_device_restore.patch
new file mode 100644 (file)
index 0000000..a18603d
--- /dev/null
+++ b/queue-5.17/virtio-use-virtio_device_ready-in-virtio_device_restore.patch
@@ -0,0 +1,78 @@
+From 8d65bc9a5be3f23c5e2ab36b6b8ef40095165b18 Mon Sep 17 00:00:00 2001
+From: Stefano Garzarella <sgarzare@redhat.com>
+Date: Tue, 22 Mar 2022 12:43:13 +0100
+Subject: virtio: use virtio_device_ready() in virtio_device_restore()
+
+From: Stefano Garzarella <sgarzare@redhat.com>
+
+commit 8d65bc9a5be3f23c5e2ab36b6b8ef40095165b18 upstream.
+
+After waking up a suspended VM, the kernel prints the following trace
+for virtio drivers which do not directly call virtio_device_ready() in
+the .restore:
+
+    PM: suspend exit
+    irq 22: nobody cared (try booting with the "irqpoll" option)
+    Call Trace:
+     <IRQ>
+     dump_stack_lvl+0x38/0x49
+     dump_stack+0x10/0x12
+     __report_bad_irq+0x3a/0xaf
+     note_interrupt.cold+0xb/0x60
+     handle_irq_event+0x71/0x80
+     handle_fasteoi_irq+0x95/0x1e0
+     __common_interrupt+0x6b/0x110
+     common_interrupt+0x63/0xe0
+     asm_common_interrupt+0x1e/0x40
+     ? __do_softirq+0x75/0x2f3
+     irq_exit_rcu+0x93/0xe0
+     sysvec_apic_timer_interrupt+0xac/0xd0
+     </IRQ>
+     <TASK>
+     asm_sysvec_apic_timer_interrupt+0x12/0x20
+     arch_cpu_idle+0x12/0x20
+     default_idle_call+0x39/0xf0
+     do_idle+0x1b5/0x210
+     cpu_startup_entry+0x20/0x30
+     start_secondary+0xf3/0x100
+     secondary_startup_64_no_verify+0xc3/0xcb
+     </TASK>
+    handlers:
+    [<000000008f9bac49>] vp_interrupt
+    [<000000008f9bac49>] vp_interrupt
+    Disabling IRQ #22
+
+This happens because we don't invoke .enable_cbs callback in
+virtio_device_restore(). That callback is used by some transports
+(e.g. virtio-pci) to enable interrupts.
+
+Let's fix it, by calling virtio_device_ready() as we do in
+virtio_dev_probe(). This function calls .enable_cts callback and sets
+DRIVER_OK status bit.
+
+This fix also avoids setting DRIVER_OK twice for those drivers that
+call virtio_device_ready() in the .restore.
+
+Fixes: d50497eb4e55 ("virtio_config: introduce a new .enable_cbs method")
+Signed-off-by: Stefano Garzarella <sgarzare@redhat.com>
+Link: https://lore.kernel.org/r/20220322114313.116516-1-sgarzare@redhat.com
+Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/virtio/virtio.c |    5 +++--
+ 1 file changed, 3 insertions(+), 2 deletions(-)
+
+--- a/drivers/virtio/virtio.c
++++ b/drivers/virtio/virtio.c
+@@ -526,8 +526,9 @@ int virtio_device_restore(struct virtio_
+                       goto err;
+       }
+ 
+-      /* Finally, tell the device we're all set */
+-      virtio_add_status(dev, VIRTIO_CONFIG_S_DRIVER_OK);
++      /* If restore didn't do it, mark device DRIVER_OK ourselves. */
++      if (!(dev->config->get_status(dev) & VIRTIO_CONFIG_S_DRIVER_OK))
++              virtio_device_ready(dev);
+ 
+       virtio_config_enable(dev);
+ 

diff --git a/queue-5.17/watchdog-rti-wdt-add-missing-pm_runtime_disable-in-probe-function.patch b/queue-5.17/watchdog-rti-wdt-add-missing-pm_runtime_disable-in-probe-function.patch
new file mode 100644 (file)
index 0000000..3dccfdb
--- /dev/null
+++ b/queue-5.17/watchdog-rti-wdt-add-missing-pm_runtime_disable-in-probe-function.patch
@@ -0,0 +1,33 @@
+From d055ef3a2c6919cff504ae3b710c96318d545fd2 Mon Sep 17 00:00:00 2001
+From: Miaoqian Lin <linmq006@gmail.com>
+Date: Wed, 5 Jan 2022 09:21:13 +0000
+Subject: watchdog: rti-wdt: Add missing pm_runtime_disable() in probe function
+
+From: Miaoqian Lin <linmq006@gmail.com>
+
+commit d055ef3a2c6919cff504ae3b710c96318d545fd2 upstream.
+
+If the probe fails, we should use pm_runtime_disable() to balance
+pm_runtime_enable().
+
+Fixes: 2d63908bdbfb ("watchdog: Add K3 RTI watchdog support")
+Signed-off-by: Miaoqian Lin <linmq006@gmail.com>
+Reviewed-by: Guenter Roeck <linux@roeck-us.net>
+Link: https://lore.kernel.org/r/20220105092114.23932-1-linmq006@gmail.com
+Signed-off-by: Guenter Roeck <linux@roeck-us.net>
+Signed-off-by: Wim Van Sebroeck <wim@linux-watchdog.org>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/watchdog/rti_wdt.c |    1 +
+ 1 file changed, 1 insertion(+)
+
+--- a/drivers/watchdog/rti_wdt.c
++++ b/drivers/watchdog/rti_wdt.c
+@@ -228,6 +228,7 @@ static int rti_wdt_probe(struct platform
+       ret = pm_runtime_get_sync(dev);
+       if (ret) {
+               pm_runtime_put_noidle(dev);
++              pm_runtime_disable(&pdev->dev);
+               return dev_err_probe(dev, ret, "runtime pm failed\n");
+       }
+