ARM: gemini: add device tree for edimax NS2502

The edimax NS2502 is a NAS box running a SL3516 SoC.

Signed-off-by: Corentin Labbe <clabbe@baylibre.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 7e0934180724d86c704768e46600daaa828dc2c9..2e79ed07602a280b0fe2fac4c4b7354153870236 100644 (file)
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -219,6 +219,7 @@ dtb-$(CONFIG_ARCH_GEMINI) += \
        gemini-dlink-dir-685.dtb \
        gemini-dlink-dns-313.dtb \
        gemini-nas4220b.dtb \
+       gemini-ns2502.dtb \
        gemini-rut1xx.dtb \
        gemini-sl93512r.dtb \
        gemini-sq201.dtb \

diff --git a/arch/arm/boot/dts/gemini-ns2502.dts b/arch/arm/boot/dts/gemini-ns2502.dts
new file mode 100644 (file)
index 0000000..704abd2
--- /dev/null
+++ b/arch/arm/boot/dts/gemini-ns2502.dts
@@ -0,0 +1,148 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2021 Corentin Labbe <clabbe@baylibre.com>
+ * Device Tree file for Edimax NS 2502
+ */
+
+/dts-v1/;
+
+#include "gemini.dtsi"
+
+/ {
+       model = "Edimax NS-2502";
+       compatible = "edimax,ns-2502", "cortina,gemini";
+       #address-cells = <1>;
+       #size-cells = <1>;
+
+       memory@0 {
+               /* 128 MB */
+               device_type = "memory";
+               reg = <0x00000000 0x8000000>;
+       };
+
+       aliases {
+               mdio-gpio0 = &mdio0;
+       };
+
+       chosen {
+               bootargs = "console=ttyS0,19200n8";
+               stdout-path = &uart0;
+       };
+
+       mdio0: mdio {
+               compatible = "virtual,mdio-gpio";
+               gpios = <&gpio0 22 GPIO_ACTIVE_HIGH>, /* MDC */
+                       <&gpio0 21 GPIO_ACTIVE_HIGH>; /* MDIO */
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               phy0: ethernet-phy@1 {
+                       reg = <1>;
+                       device_type = "ethernet-phy";
+                       /* We lack the knowledge of necessary GPIO to achieve
+                        * Gigabit
+                        */
+                       max-speed = <100>;
+               };
+       };
+};
+
+&ethernet {
+       status = "okay";
+       ethernet-port@0 {
+               phy-mode = "rgmii";
+               phy-handle = <&phy0>;
+       };
+};
+
+&flash {
+       status = "okay";
+       /* 8MB of flash */
+       reg = <0x30000000 0x00800000>;
+
+       pinctrl-names = "enabled", "disabled";
+       pinctrl-0 = <&pflash_default_pins>;
+       pinctrl-1 = <&pflash_disabled_pins>;
+
+       partitions {
+               compatible = "fixed-partitions";
+               #address-cells = <1>;
+               #size-cells = <1>;
+
+               partition@0 {
+                       label = "RedBoot";
+                       reg = <0x00000000 0x00020000>;
+               };
+               partition@20000 {
+                       label = "kernel";
+                       reg = <0x00020000 0x00700000>;
+               };
+               partition@720000 {
+                       label = "VCTL";
+                       reg = <0x00720000 0x00020000>;
+               };
+               partition@740000 {
+                       label = "CurConf";
+                       reg = <0x00740000 0x000a0000>;
+               };
+               partition@7e0000 {
+                       label = "FIS";
+                       reg = <0x007e0000 0x00010000>;
+               };
+       };
+};
+
+&gpio0 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&gpio0_default_pins>;
+};
+
+&ide0 {
+       status = "okay";
+};
+
+&ide1 {
+       status = "okay";
+};
+
+&sata {
+       cortina,gemini-ata-muxmode = <3>;
+       cortina,gemini-enable-sata-bridge;
+       status = "okay";
+};
+
+&syscon {
+       pinctrl {
+               /*
+                * gpio0agrp cover line 0-4
+                * gpio0bgrp cover line 5
+                */
+               gpio0_default_pins: pinctrl-gpio0 {
+                           mux {
+                                   function = "gpio0";
+                                   groups = "gpio0agrp", "gpio0bgrp", "gpio0hgrp";
+                           };
+               };
+               pflash_disabled_pins: pinctrl-pflash-disabled {
+                       mux {
+                               function = "gpio0";
+                               groups = "gpio0ggrp", "gpio0igrp", "gpio0jgrp",
+                                        "gpio0kgrp";
+                       };
+               };
+               pinctrl-gmii {
+                       mux {
+                               function = "gmii";
+                               groups = "gmii_gmac0_grp";
+                               };
+               };
+       };
+};
+
+&usb0 {
+       status = "okay";
+};
+
+&usb1 {
+       status = "okay";
+};