--- /dev/null
+From c4abe6234246c75cdc43326415d9cff88b7cf06c Mon Sep 17 00:00:00 2001
+From: Heiko Carstens <hca@linux.ibm.com>
+Date: Mon, 19 May 2025 18:07:11 +0200
+Subject: s390/pci: Fix __pcilg_mio_inuser() inline assembly
+
+From: Heiko Carstens <hca@linux.ibm.com>
+
+commit c4abe6234246c75cdc43326415d9cff88b7cf06c upstream.
+
+Use "a" constraint for the shift operand of the __pcilg_mio_inuser() inline
+assembly. The used "d" constraint allows the compiler to use any general
+purpose register for the shift operand, including register zero.
+
+If register zero is used this my result in incorrect code generation:
+
+ 8f6: a7 0a ff f8 ahi %r0,-8
+ 8fa: eb 32 00 00 00 0c srlg %r3,%r2,0 <----
+
+If register zero is selected to contain the shift value, the srlg
+instruction ignores the contents of the register and always shifts zero
+bits. Therefore use the "a" constraint which does not permit to select
+register zero.
+
+Fixes: f058599e22d5 ("s390/pci: Fix s390_mmio_read/write with MIO")
+Cc: stable@vger.kernel.org
+Reported-by: Niklas Schnelle <schnelle@linux.ibm.com>
+Reviewed-by: Niklas Schnelle <schnelle@linux.ibm.com>
+Signed-off-by: Heiko Carstens <hca@linux.ibm.com>
+Signed-off-by: Niklas Schnelle <schnelle@linux.ibm.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ arch/s390/pci/pci_mmio.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/arch/s390/pci/pci_mmio.c
++++ b/arch/s390/pci/pci_mmio.c
+@@ -228,7 +228,7 @@ static inline int __pcilg_mio_inuser(
+ [ioaddr_len] "+&d" (ioaddr_len.pair),
+ [cc] "+d" (cc), [val] "=d" (val),
+ [dst] "+a" (dst), [cnt] "+d" (cnt), [tmp] "=d" (tmp),
+- [shift] "+d" (shift)
++ [shift] "+a" (shift)
+ :: "cc", "memory");
+
+ /* did we write everything to the user space buffer? */