]> git.ipfire.org Git - thirdparty/linux.git/commitdiff
irqchip/gic-v3: Fix GICD_CTLR register naming
authorZenghui Yu <yuzenghui@huawei.com>
Wed, 9 Jul 2025 13:00:46 +0000 (21:00 +0800)
committerThomas Gleixner <tglx@linutronix.de>
Fri, 18 Jul 2025 12:56:39 +0000 (14:56 +0200)
It was incorrectly named as GICD_CTRL in a pr_info() and comments. Fix
them.

Signed-off-by: Zenghui Yu <yuzenghui@huawei.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Acked-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/all/20250709130046.1354-1-yuzenghui@huawei.com
drivers/irqchip/irq-gic-v3.c

index efc791c43d4415e5daf3a62d697f6a3dab9bee3b..dbeb85677b08cbe4313087a18efa47443fa3556d 100644 (file)
@@ -190,12 +190,12 @@ static void __init gic_prio_init(void)
 
        /*
         * How priority values are used by the GIC depends on two things:
-        * the security state of the GIC (controlled by the GICD_CTRL.DS bit)
+        * the security state of the GIC (controlled by the GICD_CTLR.DS bit)
         * and if Group 0 interrupts can be delivered to Linux in the non-secure
         * world as FIQs (controlled by the SCR_EL3.FIQ bit). These affect the
         * way priorities are presented in ICC_PMR_EL1 and in the distributor:
         *
-        * GICD_CTRL.DS | SCR_EL3.FIQ | ICC_PMR_EL1 | Distributor
+        * GICD_CTLR.DS | SCR_EL3.FIQ | ICC_PMR_EL1 | Distributor
         * -------------------------------------------------------
         *      1       |      -      |  unchanged  |  unchanged
         * -------------------------------------------------------
@@ -223,7 +223,7 @@ static void __init gic_prio_init(void)
                dist_prio_nmi = __gicv3_prio_to_ns(dist_prio_nmi);
        }
 
-       pr_info("GICD_CTRL.DS=%d, SCR_EL3.FIQ=%d\n",
+       pr_info("GICD_CTLR.DS=%d, SCR_EL3.FIQ=%d\n",
                cpus_have_security_disabled,
                !cpus_have_group0);
 }