]> git.ipfire.org Git - thirdparty/qemu.git/commitdiff
hw/arm/npcm8xx_boards: Correct valid_cpu_types setting of NPCM8XX SoC
authorTim Lee <timlee660101@gmail.com>
Mon, 28 Apr 2025 02:29:34 +0000 (10:29 +0800)
committerPeter Maydell <peter.maydell@linaro.org>
Tue, 6 May 2025 14:01:22 +0000 (15:01 +0100)
NPCM8XX SoC is the successor of the NPCM7XX. It features quad-core
Cortex-A35 (Armv8, 64-bit) CPUs and some additional peripherals.
Correct the `valid_cpu_types` setting to match the NPCM8XX SoC.

Cc: qemu-stable@nongnu.org
Fixes: 7e70eb3cad7c83 ("hw/arm: Add NPCM845 Evaluation board")
Signed-off-by: Tim Lee <timlee660101@gmail.com>
Message-id: 20250428022934.3081139-1-timlee660101@gmail.com
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Tyrone Ting <kfting@nuvoton.com>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
hw/arm/npcm8xx_boards.c

index 9d9f6d0c9a6dc44051e913258e163ac2bc45f41b..3bf3e1f8f16886242c4e3c714ed3be4fb466bf2b 100644 (file)
@@ -213,7 +213,7 @@ static void npcm8xx_machine_class_init(ObjectClass *oc, const void *data)
 {
     MachineClass *mc = MACHINE_CLASS(oc);
     static const char * const valid_cpu_types[] = {
-        ARM_CPU_TYPE_NAME("cortex-a9"),
+        ARM_CPU_TYPE_NAME("cortex-a35"),
         NULL
     };