drm/i915/psr: Set SU area width as pipe src width

Currently SU area width is set as MAX_INT. This is causing
problems. Instead set it as pipe src width.

Fixes: 86b26b6aeac7 ("drm/i915/psr: Carry su area in crtc_state")
Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
Reviewed-by: Mika Kahola <mika.kahola@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240618053026.3268759-2-jouni.hogander@intel.com

diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
index 920186c2264dcff27824a571b6c2c9eb07e80d11..3f36b94020ffe2194c497b5aba681260ce7e090e 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -2316,7 +2316,7 @@ int intel_psr2_sel_fetch_update(struct intel_atomic_state *state,
 
        crtc_state->psr2_su_area.x1 = 0;
        crtc_state->psr2_su_area.y1 = -1;
-       crtc_state->psr2_su_area.x2 = INT_MAX;
+       crtc_state->psr2_su_area.x2 = drm_rect_width(&crtc_state->pipe_src);
        crtc_state->psr2_su_area.y2 = -1;
 
        /*