ARM: tegra: Add DSI-A and DSI-B nodes on Tegra124

Bind DSI devices and MIPI calibration.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Link: https://lore.kernel.org/r/20250226105615.61087-6-clamor95@gmail.com
Signed-off-by: Thierry Reding <treding@nvidia.com>

diff --git a/arch/arm/boot/dts/nvidia/tegra124.dtsi b/arch/arm/boot/dts/nvidia/tegra124.dtsi
index 8f1fff373461b781121d23752dacbef9034a9f44..ec4f0e346b2bf0ddb97ef62ac4a9be61681a3d04 100644 (file)
--- a/arch/arm/boot/dts/nvidia/tegra124.dtsi
+++ b/arch/arm/boot/dts/nvidia/tegra124.dtsi
@@ -165,6 +165,22 @@
                        status = "disabled";
                };
 
+               dsia: dsi@54300000 {
+                       compatible = "nvidia,tegra124-dsi";
+                       reg = <0x0 0x54300000 0x0 0x00040000>;
+                       clocks = <&tegra_car TEGRA124_CLK_DSIA>,
+                                <&tegra_car TEGRA124_CLK_DSIALP>,
+                                <&tegra_car TEGRA124_CLK_PLL_D_OUT0>;
+                       clock-names = "dsi", "lp", "parent";
+                       resets = <&tegra_car 48>;
+                       reset-names = "dsi";
+                       nvidia,mipi-calibrate = <&mipi 0x060>; /* DSIA & DSIB pads */
+                       status = "disabled";
+
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+               };
+
                vic@54340000 {
                        compatible = "nvidia,tegra124-vic";
                        reg = <0x0 0x54340000 0x0 0x00040000>;
@@ -177,6 +193,22 @@
                        iommus = <&mc TEGRA_SWGROUP_VIC>;
                };
 
+               dsib: dsi@54400000 {
+                       compatible = "nvidia,tegra124-dsi";
+                       reg = <0x0 0x54400000 0x0 0x00040000>;
+                       clocks = <&tegra_car TEGRA124_CLK_DSIB>,
+                                <&tegra_car TEGRA124_CLK_DSIBLP>,
+                                <&tegra_car TEGRA124_CLK_PLL_D_OUT0>;
+                       clock-names = "dsi", "lp", "parent";
+                       resets = <&tegra_car 82>;
+                       reset-names = "dsi";
+                       nvidia,mipi-calibrate = <&mipi 0x180>; /* DSIC & DSID pads */
+                       status = "disabled";
+
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+               };
+
                sor@54540000 {
                        compatible = "nvidia,tegra124-sor";
                        reg = <0x0 0x54540000 0x0 0x00040000>;
@@ -938,6 +970,14 @@
                };
        };
 
+       mipi: mipi@700e3000 {
+               compatible = "nvidia,tegra124-mipi";
+               reg = <0x0 0x700e3000 0x0 0x100>;
+               clocks = <&tegra_car TEGRA124_CLK_MIPI_CAL>;
+               clock-names = "mipi-cal";
+               #nvidia,mipi-calibrate-cells = <1>;
+       };
+
        dfll: clock@70110000 {
                compatible = "nvidia,tegra124-dfll";
                reg = <0 0x70110000 0 0x100>, /* DFLL control */