]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
scsi: lpfc: Fix lpfc_nvmet_mrq attribute handling when 0
authorJames Smart <jsmart2021@gmail.com>
Tue, 12 Mar 2019 23:30:10 +0000 (16:30 -0700)
committerMartin K. Petersen <martin.petersen@oracle.com>
Tue, 19 Mar 2019 16:57:02 +0000 (12:57 -0400)
Currently, when lpfc_nvmet_mrq is 0 it could mean 2 different things
depending on when its looked at. If at module load time it specifies the
default number of hardware queues to allocate, with 0 meaning default to
the number of CPUs. But post module load, a value of zero means to disable
mrq use.

Changed the driver so that enablement of mrq is based on whether nvme
target mode is enabled or not. When enabled, mrq is enabled.  Thus, the
cfg_nvemt_mrq field only specifies the number of mrq queues to enable, with
0 defaulting to the number of cpus.

Signed-off-by: Dick Kennedy <dick.kennedy@broadcom.com>
Signed-off-by: James Smart <jsmart2021@gmail.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
drivers/scsi/lpfc/lpfc_attr.c
drivers/scsi/lpfc/lpfc_init.c
drivers/scsi/lpfc/lpfc_nvmet.h

index ce3e541434dcc4294e39944df8d41acaca62a548..5d6c874c44e7b986635cf4489d62e600b7349abb 100644 (file)
@@ -7003,6 +7003,7 @@ lpfc_get_cfgparam(struct lpfc_hba *phba)
        if (phba->sli_rev != LPFC_SLI_REV4) {
                /* NVME only supported on SLI4 */
                phba->nvmet_support = 0;
+               phba->cfg_nvmet_mrq = 0;
                phba->cfg_enable_fc4_type = LPFC_ENABLE_FCP;
                phba->cfg_enable_bbcr = 0;
                phba->cfg_xri_rebalancing = 0;
@@ -7104,7 +7105,7 @@ lpfc_nvme_mod_param_dep(struct lpfc_hba *phba)
        } else {
                /* Not NVME Target mode.  Turn off Target parameters. */
                phba->nvmet_support = 0;
-               phba->cfg_nvmet_mrq = LPFC_NVMET_MRQ_OFF;
+               phba->cfg_nvmet_mrq = 0;
                phba->cfg_nvmet_fb_size = 0;
        }
 }
index 9c266bd142cddc496187bd2923f89a6e12aeb3cf..6deb4d29c0cb76950de77cc2a99de5e31418c577 100644 (file)
@@ -8599,9 +8599,9 @@ lpfc_sli4_queue_verify(struct lpfc_hba *phba)
        if (phba->nvmet_support) {
                if (phba->cfg_irq_chann < phba->cfg_nvmet_mrq)
                        phba->cfg_nvmet_mrq = phba->cfg_irq_chann;
+               if (phba->cfg_nvmet_mrq > LPFC_NVMET_MRQ_MAX)
+                       phba->cfg_nvmet_mrq = LPFC_NVMET_MRQ_MAX;
        }
-       if (phba->cfg_nvmet_mrq > LPFC_NVMET_MRQ_MAX)
-               phba->cfg_nvmet_mrq = LPFC_NVMET_MRQ_MAX;
 
        lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
                        "2574 IO channels: hdwQ %d IRQ %d MRQ: %d\n",
@@ -10736,7 +10736,7 @@ lpfc_sli4_enable_msix(struct lpfc_hba *phba)
                                phba->cfg_irq_chann, vectors);
                if (phba->cfg_irq_chann > vectors)
                        phba->cfg_irq_chann = vectors;
-               if (phba->cfg_nvmet_mrq > vectors)
+               if (phba->nvmet_support && (phba->cfg_nvmet_mrq > vectors))
                        phba->cfg_nvmet_mrq = vectors;
        }
 
@@ -11293,7 +11293,7 @@ lpfc_get_sli4_parameters(struct lpfc_hba *phba, LPFC_MBOXQ_t *mboxq)
            !phba->nvme_support) {
                phba->nvme_support = 0;
                phba->nvmet_support = 0;
-               phba->cfg_nvmet_mrq = LPFC_NVMET_MRQ_OFF;
+               phba->cfg_nvmet_mrq = 0;
                lpfc_printf_log(phba, KERN_ERR, LOG_INIT | LOG_NVME,
                                "6101 Disabling NVME support: "
                                "Not supported by firmware: %d %d\n",
index 368deea2bcf8fe05a2b084ada2271397c2a0ebc6..0f10b448fd9b101adb028d0ad0547796bf20336c 100644 (file)
@@ -27,7 +27,6 @@
 #define LPFC_NVMET_RQE_DEF_COUNT       2048
 #define LPFC_NVMET_SUCCESS_LEN         12
 
-#define LPFC_NVMET_MRQ_OFF             0xffff
 #define LPFC_NVMET_MRQ_AUTO            0
 #define LPFC_NVMET_MRQ_MAX             16