[ARM] Initialize new tune_params values

gcc/

	* config/arm/arm.c (arm_cortex_a57_tune): Initialize all fields.
	(arm_cortex_a12_tune): Likewise.

From-SVN: r209710

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 99f4b0d75e1f00818c2915dda8a2fefa75f25536..021427b3ac5bd3f4842dafc7f02b459b19774ecb 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,8 @@
+2014-04-23  James Greenhalgh  <james.greenhalgh@arm.com>
+
+       * config/arm/arm.c (arm_cortex_a57_tune): Initialize all fields.
+       (arm_cortex_a12_tune): Likewise.
+
 2014-04-23  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
 
        * config/aarch64/aarch64.c (aarch64_rtx_costs): Handle BSWAP.

diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
index 849176346c72ada372c0fda0063ccae14c23d538..14dd9017437356bd29e7d79f33a4a05b87ff05a1 100644 (file)
--- a/gcc/config/arm/arm.c
+++ b/gcc/config/arm/arm.c
@@ -1781,7 +1781,8 @@ const struct tune_params arm_cortex_a57_tune =
   true,                                       /* Prefer LDRD/STRD.  */
   {true, true},                                /* Prefer non short circuit.  */
   &arm_default_vec_cost,                       /* Vectorizer costs.  */
-  false                                        /* Prefer Neon for 64-bits bitops.  */
+  false,                                       /* Prefer Neon for 64-bits bitops.  */
+  true, true                                   /* Prefer 32-bit encodings.  */
 };
 
 /* Branches can be dual-issued on Cortex-A5, so conditional execution is
@@ -1834,7 +1835,8 @@ const struct tune_params arm_cortex_a12_tune =
   true,                                                /* Prefer LDRD/STRD.  */
   {true, true},                                        /* Prefer non short circuit.  */
   &arm_default_vec_cost,                        /* Vectorizer costs.  */
-  false                                         /* Prefer Neon for 64-bits bitops.  */
+  false,                                        /* Prefer Neon for 64-bits bitops.  */
+  false, false                                  /* Prefer 32-bit encodings.  */
 };
 
 /* armv7m tuning.  On Cortex-M4 cores for example, MOVW/MOVT take a single