]> git.ipfire.org Git - thirdparty/u-boot.git/commitdiff
misc: npcm_host_intf: Disable pending KCS/BPC interrupts
authorJim Liu <jim.t90615@gmail.com>
Thu, 7 Aug 2025 05:32:23 +0000 (13:32 +0800)
committerTom Rini <trini@konsulko.com>
Mon, 18 Aug 2025 22:40:24 +0000 (16:40 -0600)
If there is an unhandled KCS/BPC pending interrupt after reboot,
the KCS/BPC Linux driver may trigger interrupts immediately upon
registering the irq. However, since the driver is not yet initialized
to handle them, this can lead to unexpected behavior.

To prevent this, disable KCS/BPC interrupts in u-boot to avoid pending
interrupts from being raised before the Linux driver is fully initialized.

Signed-off-by: Stanley Chu <yschu@nuvoton.com>
Signed-off-by: Jim Liu <JJLIU0@nuvoton.com>
arch/arm/dts/nuvoton-common-npcm8xx.dtsi
drivers/misc/npcm_host_intf.c

index be06b2a0caef7425cefcf3df5453fe706b6abf16..6866005336f8bc3efa9e1242fbc8c91473401bfe 100644 (file)
 
                        host_intf: host_intf@9f000 {
                                compatible = "nuvoton,npcm845-host-intf";
-                               reg = <0x9f000 0x1000>;
+                               reg = <0x9f000 0x1000>, <0x7000 0x40>;
                                type = "espi";
                                ioaddr = <0x4e>;
                                channel-support = <0xf>;
index 2c89bd7a167afd79a2bd7b0dd4972e51041f3613..e3b0663625b0d0879f495915ed4dea55cf18302d 100644 (file)
 #define ESPI_TEN_ENABLE                0x55
 #define ESPI_TEN_DISABLE       0
 
+/* KCS/BPC interrupt control */
+#define BPCFEN                 0x46
+#define FRIE                   BIT(3)
+#define HRIE                   BIT(4)
+#define KCS1CTL                        0x18
+#define KCS2CTL                        0x2a
+#define KCS3CTL                        0x3c
+#define IBFIE                  BIT(0)
+#define OBEIE                  BIT(1)
+
 static int npcm_host_intf_bind(struct udevice *dev)
 {
        struct regmap *syscon;
-       void __iomem *base;
+       void __iomem *base, *kcs_base;
        u32 ch_supp, val;
        u32 ioaddr;
        const char *type;
@@ -104,6 +114,15 @@ static int npcm_host_intf_bind(struct udevice *dev)
        /* Release host wait */
        setbits_8(SMC_CTL_REG_ADDR, SMC_CTL_HOSTWAIT);
 
+       kcs_base = dev_read_addr_index_ptr(dev, 1);
+       if (kcs_base) {
+               /* Disable KCS/BPC interrupts */
+               clrbits_8(kcs_base + BPCFEN, FRIE | HRIE);
+               clrbits_8(kcs_base + KCS1CTL, IBFIE | OBEIE);
+               clrbits_8(kcs_base + KCS2CTL, IBFIE | OBEIE);
+               clrbits_8(kcs_base + KCS3CTL, IBFIE | OBEIE);
+       }
+
        return 0;
 }