dmaengine: ae4dma: Register AE4DMA using pt_dmaengine_register

Use the pt_dmaengine_register function to register a AE4DMA DMA engine.

Reviewed-by: Raju Rangoju <Raju.Rangoju@amd.com>
Reviewed-by: Philipp Stanner <pstanner@redhat.com>
Signed-off-by: Basavaraj Natikar <Basavaraj.Natikar@amd.com>
Link: https://lore.kernel.org/r/20241025095931.726018-5-Basavaraj.Natikar@amd.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>

diff --git a/drivers/dma/amd/ae4dma/ae4dma-dev.c b/drivers/dma/amd/ae4dma/ae4dma-dev.c
index 7cbef9e79f38b4591c0d162ede1fdf308623214d..cd84b502265e249586a7972faba4e4ece170e264 100644 (file)
--- a/drivers/dma/amd/ae4dma/ae4dma-dev.c
+++ b/drivers/dma/amd/ae4dma/ae4dma-dev.c
@@ -147,5 +147,9 @@ int ae4_core_init(struct ae4_device *ae4)
                init_completion(&ae4cmd_q->cmp);
        }
 
+       ret = pt_dmaengine_register(pt);
+       if (ret)
+               ae4_destroy_work(ae4);
+
        return ret;
 }

diff --git a/drivers/dma/amd/ae4dma/ae4dma-pci.c b/drivers/dma/amd/ae4dma/ae4dma-pci.c
index 43d36e9d1efbdfd649d19d4caddba638bacb2be7..aad0dc4294a3945245737978c077eecf740ccb3a 100644 (file)
--- a/drivers/dma/amd/ae4dma/ae4dma-pci.c
+++ b/drivers/dma/amd/ae4dma/ae4dma-pci.c
@@ -98,6 +98,7 @@ static int ae4_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
 
        pt = &ae4->pt;
        pt->dev = dev;
+       pt->ver = AE4_DMA_VERSION;
 
        pt->io_regs = pcim_iomap_table(pdev)[0];
        if (!pt->io_regs) {

diff --git a/drivers/dma/amd/ae4dma/ae4dma.h b/drivers/dma/amd/ae4dma/ae4dma.h
index 92cb8c379c182dbb7a0d972c7b50a9f838382b90..265c5d4360080d6a0cc77f2bab507fde761d5461 100644 (file)
--- a/drivers/dma/amd/ae4dma/ae4dma.h
+++ b/drivers/dma/amd/ae4dma/ae4dma.h
@@ -35,6 +35,7 @@
 #define AE4_Q_SZ                       0x20
 
 #define AE4_DMA_VERSION                        4
+#define CMD_AE4_DESC_DW0_VAL           2
 
 struct ae4_msix {
        int msix_count;
@@ -55,6 +56,7 @@ struct ae4_cmd_queue {
        atomic64_t done_cnt;
        u64 q_cmd_count;
        u32 dridx;
+       u32 tail_wi;
        u32 id;
 };
 

diff --git a/drivers/dma/amd/ptdma/ptdma-dmaengine.c b/drivers/dma/amd/ptdma/ptdma-dmaengine.c
index e2d4bc8aa1dec075ff1c1b336ee84ae2d21c78df..35c84ec9608b4fd119972e3cd9abedf818dff743 100644 (file)
--- a/drivers/dma/amd/ptdma/ptdma-dmaengine.c
+++ b/drivers/dma/amd/ptdma/ptdma-dmaengine.c
@@ -9,6 +9,7 @@
  * Author: Gary R Hook <gary.hook@amd.com>
  */
 
+#include <linux/bitfield.h>
 #include "ptdma.h"
 #include "../ae4dma/ae4dma.h"
 #include "../../dmaengine.h"
@@ -110,6 +111,53 @@ static struct pt_cmd_queue *pt_get_cmd_queue(struct pt_device *pt, struct pt_dma
        return cmd_q;
 }
 
+static int ae4_core_execute_cmd(struct ae4dma_desc *desc, struct ae4_cmd_queue *ae4cmd_q)
+{
+       bool soc = FIELD_GET(DWORD0_SOC, desc->dwouv.dw0);
+       struct pt_cmd_queue *cmd_q = &ae4cmd_q->cmd_q;
+
+       if (soc) {
+               desc->dwouv.dw0 |= FIELD_PREP(DWORD0_IOC, desc->dwouv.dw0);
+               desc->dwouv.dw0 &= ~DWORD0_SOC;
+       }
+
+       mutex_lock(&ae4cmd_q->cmd_lock);
+       memcpy(&cmd_q->qbase[ae4cmd_q->tail_wi], desc, sizeof(struct ae4dma_desc));
+       ae4cmd_q->q_cmd_count++;
+       ae4cmd_q->tail_wi = (ae4cmd_q->tail_wi + 1) % CMD_Q_LEN;
+       writel(ae4cmd_q->tail_wi, cmd_q->reg_control + AE4_WR_IDX_OFF);
+       mutex_unlock(&ae4cmd_q->cmd_lock);
+
+       wake_up(&ae4cmd_q->q_w);
+
+       return 0;
+}
+
+static int pt_core_perform_passthru_ae4(struct pt_cmd_queue *cmd_q,
+                                       struct pt_passthru_engine *pt_engine)
+{
+       struct ae4_cmd_queue *ae4cmd_q = container_of(cmd_q, struct ae4_cmd_queue, cmd_q);
+       struct ae4dma_desc desc;
+
+       cmd_q->cmd_error = 0;
+       cmd_q->total_pt_ops++;
+       memset(&desc, 0, sizeof(desc));
+       desc.dwouv.dws.byte0 = CMD_AE4_DESC_DW0_VAL;
+
+       desc.dw1.status = 0;
+       desc.dw1.err_code = 0;
+       desc.dw1.desc_id = 0;
+
+       desc.length = pt_engine->src_len;
+
+       desc.src_lo = upper_32_bits(pt_engine->src_dma);
+       desc.src_hi = lower_32_bits(pt_engine->src_dma);
+       desc.dst_lo = upper_32_bits(pt_engine->dst_dma);
+       desc.dst_hi = lower_32_bits(pt_engine->dst_dma);
+
+       return ae4_core_execute_cmd(&desc, ae4cmd_q);
+}
+
 static int pt_dma_start_desc(struct pt_dma_desc *desc, struct pt_dma_chan *chan)
 {
        struct pt_passthru_engine *pt_engine;
@@ -129,7 +177,10 @@ static int pt_dma_start_desc(struct pt_dma_desc *desc, struct pt_dma_chan *chan)
        pt->tdata.cmd = pt_cmd;
 
        /* Execute the command */
-       pt_cmd->ret = pt_core_perform_passthru(cmd_q, pt_engine);
+       if (pt->ver == AE4_DMA_VERSION)
+               pt_cmd->ret = pt_core_perform_passthru_ae4(cmd_q, pt_engine);
+       else
+               pt_cmd->ret = pt_core_perform_passthru(cmd_q, pt_engine);
 
        return 0;
 }
@@ -336,6 +387,15 @@ static void pt_issue_pending(struct dma_chan *dma_chan)
                pt_cmd_callback(desc, 0);
 }
 
+static void pt_check_status_trans_ae4(struct pt_device *pt, struct pt_cmd_queue *cmd_q)
+{
+       struct ae4_cmd_queue *ae4cmd_q = container_of(cmd_q, struct ae4_cmd_queue, cmd_q);
+       int i;
+
+       for (i = 0; i < CMD_Q_LEN; i++)
+               ae4_check_status_error(ae4cmd_q, i);
+}
+
 static enum dma_status
 pt_tx_status(struct dma_chan *c, dma_cookie_t cookie,
                struct dma_tx_state *txstate)
@@ -346,7 +406,11 @@ pt_tx_status(struct dma_chan *c, dma_cookie_t cookie,
 
        cmd_q = pt_get_cmd_queue(pt, chan);
 
-       pt_check_status_trans(pt, cmd_q);
+       if (pt->ver == AE4_DMA_VERSION)
+               pt_check_status_trans_ae4(pt, cmd_q);
+       else
+               pt_check_status_trans(pt, cmd_q);
+
        return dma_cookie_status(c, cookie, txstate);
 }
 
@@ -512,6 +576,7 @@ err_cache:
 
        return ret;
 }
+EXPORT_SYMBOL_GPL(pt_dmaengine_register);
 
 void pt_dmaengine_unregister(struct pt_device *pt)
 {