--- /dev/null
+From cd9f040df6ce46573760a507cb88192d05d27d86 Mon Sep 17 00:00:00 2001
+From: Linus Torvalds <torvalds@linux-foundation.org>
+Date: Sun, 18 Jul 2010 09:44:37 -0700
+Subject: drm/i915: add 'reclaimable' to i915 self-reclaimable page allocations
+
+From: Linus Torvalds <torvalds@linux-foundation.org>
+
+commit cd9f040df6ce46573760a507cb88192d05d27d86 upstream.
+
+The hibernate issues that got fixed in commit 985b823b9192 ("drm/i915:
+fix hibernation since i915 self-reclaim fixes") turn out to have been
+incomplete. Vefa Bicakci tested lots of hibernate cycles, and without
+the __GFP_RECLAIMABLE flag the system eventually fails to resume.
+
+With the flag added, Vefa can apparently hibernate forever (or until he
+gets bored running his automated scripts, whichever comes first).
+
+The reclaimable flag was there originally, and was one of the flags that
+were dropped (unintentionally) by commit 4bdadb978569 ("drm/i915:
+Selectively enable self-reclaim") that introduced all these problems,
+but I didn't want to just blindly add back all the flags in commit
+985b823b9192, and it looked like __GFP_RECLAIM wasn't necessary. It
+clearly was.
+
+I still suspect that there is some subtle reason we're missing that
+causes the problems, but __GFP_RECLAIMABLE is certainly not wrong to use
+in this context, and is what the code historically used. And we have no
+idea what the causes the corruption without it.
+
+Reported-and-tested-by: M. Vefa Bicakci <bicave@superonline.com>
+Cc: Dave Airlie <airlied@gmail.com>
+Cc: Chris Wilson <chris@chris-wilson.co.uk>
+Cc: KOSAKI Motohiro <kosaki.motohiro@jp.fujitsu.com>
+Cc: Hugh Dickins <hugh.dickins@tiscali.co.uk>
+Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
+Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
+
+---
+ drivers/gpu/drm/i915/i915_gem.c | 1 +
+ 1 file changed, 1 insertion(+)
+
+--- a/drivers/gpu/drm/i915/i915_gem.c
++++ b/drivers/gpu/drm/i915/i915_gem.c
+@@ -2290,6 +2290,7 @@ i915_gem_object_get_pages(struct drm_gem
+ page = read_cache_page_gfp(mapping, i,
+ GFP_HIGHUSER |
+ __GFP_COLD |
++ __GFP_RECLAIMABLE |
+ gfpmask);
+ if (IS_ERR(page))
+ goto err_pages;
--- /dev/null
+From 45503ded966c98e604c9667c0b458d40666b9ef3 Mon Sep 17 00:00:00 2001
+From: Keith Packard <keithp@keithp.com>
+Date: Mon, 19 Jul 2010 21:12:35 -0700
+Subject: drm/i915: Define MI_ARB_STATE bits
+
+From: Keith Packard <keithp@keithp.com>
+
+commit 45503ded966c98e604c9667c0b458d40666b9ef3 upstream.
+
+The i915 memory arbiter has a register full of configuration
+bits which are currently not defined in the driver header file.
+
+Signed-off-by: Keith Packard <keithp@keithp.com>
+Signed-off-by: Dave Airlie <airlied@redhat.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
+
+---
+ drivers/gpu/drm/i915/i915_reg.h | 64 ++++++++++++++++++++++++++++++++++++++++
+ 1 file changed, 64 insertions(+)
+
+--- a/drivers/gpu/drm/i915/i915_reg.h
++++ b/drivers/gpu/drm/i915/i915_reg.h
+@@ -326,6 +326,70 @@
+ #define LM_BURST_LENGTH 0x00000700
+ #define LM_FIFO_WATERMARK 0x0000001F
+ #define MI_ARB_STATE 0x020e4 /* 915+ only */
++#define MI_ARB_MASK_SHIFT 16 /* shift for enable bits */
++
++/* Make render/texture TLB fetches lower priorty than associated data
++ * fetches. This is not turned on by default
++ */
++#define MI_ARB_RENDER_TLB_LOW_PRIORITY (1 << 15)
++
++/* Isoch request wait on GTT enable (Display A/B/C streams).
++ * Make isoch requests stall on the TLB update. May cause
++ * display underruns (test mode only)
++ */
++#define MI_ARB_ISOCH_WAIT_GTT (1 << 14)
++
++/* Block grant count for isoch requests when block count is
++ * set to a finite value.
++ */
++#define MI_ARB_BLOCK_GRANT_MASK (3 << 12)
++#define MI_ARB_BLOCK_GRANT_8 (0 << 12) /* for 3 display planes */
++#define MI_ARB_BLOCK_GRANT_4 (1 << 12) /* for 2 display planes */
++#define MI_ARB_BLOCK_GRANT_2 (2 << 12) /* for 1 display plane */
++#define MI_ARB_BLOCK_GRANT_0 (3 << 12) /* don't use */
++
++/* Enable render writes to complete in C2/C3/C4 power states.
++ * If this isn't enabled, render writes are prevented in low
++ * power states. That seems bad to me.
++ */
++#define MI_ARB_C3_LP_WRITE_ENABLE (1 << 11)
++
++/* This acknowledges an async flip immediately instead
++ * of waiting for 2TLB fetches.
++ */
++#define MI_ARB_ASYNC_FLIP_ACK_IMMEDIATE (1 << 10)
++
++/* Enables non-sequential data reads through arbiter
++ */
++#define MI_ARB_DUAL_DATA_PHASE_DISABLE (1 << 9)
++
++/* Disable FSB snooping of cacheable write cycles from binner/render
++ * command stream
++ */
++#define MI_ARB_CACHE_SNOOP_DISABLE (1 << 8)
++
++/* Arbiter time slice for non-isoch streams */
++#define MI_ARB_TIME_SLICE_MASK (7 << 5)
++#define MI_ARB_TIME_SLICE_1 (0 << 5)
++#define MI_ARB_TIME_SLICE_2 (1 << 5)
++#define MI_ARB_TIME_SLICE_4 (2 << 5)
++#define MI_ARB_TIME_SLICE_6 (3 << 5)
++#define MI_ARB_TIME_SLICE_8 (4 << 5)
++#define MI_ARB_TIME_SLICE_10 (5 << 5)
++#define MI_ARB_TIME_SLICE_14 (6 << 5)
++#define MI_ARB_TIME_SLICE_16 (7 << 5)
++
++/* Low priority grace period page size */
++#define MI_ARB_LOW_PRIORITY_GRACE_4KB (0 << 4) /* default */
++#define MI_ARB_LOW_PRIORITY_GRACE_8KB (1 << 4)
++
++/* Disable display A/B trickle feed */
++#define MI_ARB_DISPLAY_TRICKLE_FEED_DISABLE (1 << 2)
++
++/* Set display plane priority */
++#define MI_ARB_DISPLAY_PRIORITY_A_B (0 << 0) /* display A > display B */
++#define MI_ARB_DISPLAY_PRIORITY_B_A (1 << 0) /* display B > display A */
++
+ #define CACHE_MODE_0 0x02120 /* 915+ only */
+ #define CM0_MASK_SHIFT 16
+ #define CM0_IZ_OPT_DISABLE (1<<6)
--- /dev/null
+From 944001201ca0196bcdb088129e5866a9f379d08c Mon Sep 17 00:00:00 2001
+From: Dave Airlie <airlied@redhat.com>
+Date: Tue, 20 Jul 2010 13:15:31 +1000
+Subject: drm/i915: enable low power render writes on GEN3 hardware.
+
+From: Dave Airlie <airlied@redhat.com>
+
+commit 944001201ca0196bcdb088129e5866a9f379d08c upstream.
+
+A lot of 945GMs have had stability issues for a long time, this manifested as X hangs, blitter engine hangs, and lots of crashes.
+
+one such report is at:
+https://bugs.freedesktop.org/show_bug.cgi?id=20560
+
+along with numerous distro bugzillas.
+
+This only took a week of digging and hair ripping to figure out.
+
+Tracked down and tested on a 945GM Lenovo T60,
+previously running
+x11perf -copypixwin500
+or
+x11perf -copywinpix500
+repeatedly would cause the GPU to wedge within 4 or 5 tries, with random busy bits set.
+
+After this patch no hangs were observed.
+
+Signed-off-by: Dave Airlie <airlied@redhat.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
+
+---
+ drivers/gpu/drm/i915/i915_gem.c | 10 ++++++++++
+ 1 file changed, 10 insertions(+)
+
+--- a/drivers/gpu/drm/i915/i915_gem.c
++++ b/drivers/gpu/drm/i915/i915_gem.c
+@@ -4999,6 +4999,16 @@ i915_gem_load(struct drm_device *dev)
+ list_add(&dev_priv->mm.shrink_list, &shrink_list);
+ spin_unlock(&shrink_list_lock);
+
++ /* On GEN3 we really need to make sure the ARB C3 LP bit is set */
++ if (IS_GEN3(dev)) {
++ u32 tmp = I915_READ(MI_ARB_STATE);
++ if (!(tmp & MI_ARB_C3_LP_WRITE_ENABLE)) {
++ /* arb state is a masked write, so set bit + bit in mask */
++ tmp = MI_ARB_C3_LP_WRITE_ENABLE | (MI_ARB_C3_LP_WRITE_ENABLE << MI_ARB_MASK_SHIFT);
++ I915_WRITE(MI_ARB_STATE, tmp);
++ }
++ }
++
+ /* Old X drivers will take 0-2 for front, back, depth buffers */
+ dev_priv->fence_reg_start = 3;
+
--- /dev/null
+From 985b823b919273fe1327d56d2196b4f92e5d0fae Mon Sep 17 00:00:00 2001
+From: Linus Torvalds <torvalds@linux-foundation.org>
+Date: Fri, 2 Jul 2010 10:04:42 +1000
+Subject: drm/i915: fix hibernation since i915 self-reclaim fixes
+
+From: Linus Torvalds <torvalds@linux-foundation.org>
+
+commit 985b823b919273fe1327d56d2196b4f92e5d0fae upstream.
+
+Since commit 4bdadb9785696439c6e2b3efe34aa76df1149c83 ("drm/i915:
+Selectively enable self-reclaim"), we've been passing GFP_MOVABLE to the
+i915 page allocator where we weren't before due to some over-eager
+removal of the page mapping gfp_flags games the code used to play.
+
+This caused hibernate on Intel hardware to result in a lot of memory
+corruptions on resume. See for example
+
+ http://bugzilla.kernel.org/show_bug.cgi?id=13811
+
+Reported-by: Evengi Golov (in bugzilla)
+Signed-off-by: Dave Airlie <airlied@redhat.com>
+Tested-by: M. Vefa Bicakci <bicave@superonline.com>
+Cc: Chris Wilson <chris@chris-wilson.co.uk>
+Cc: KOSAKI Motohiro <kosaki.motohiro@jp.fujitsu.com>
+Cc: Hugh Dickins <hugh.dickins@tiscali.co.uk>
+Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
+Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
+
+---
+ drivers/gpu/drm/i915/i915_gem.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/drivers/gpu/drm/i915/i915_gem.c
++++ b/drivers/gpu/drm/i915/i915_gem.c
+@@ -2288,7 +2288,7 @@ i915_gem_object_get_pages(struct drm_gem
+ mapping = inode->i_mapping;
+ for (i = 0; i < page_count; i++) {
+ page = read_cache_page_gfp(mapping, i,
+- mapping_gfp_mask (mapping) |
++ GFP_HIGHUSER |
+ __GFP_COLD |
+ gfpmask);
+ if (IS_ERR(page))
--- /dev/null
+From 6ba770dc5c334aff1c055c8728d34656e0f091e2 Mon Sep 17 00:00:00 2001
+From: Adam Jackson <ajax@redhat.com>
+Date: Fri, 2 Jul 2010 16:43:30 -0400
+Subject: drm/i915: Make G4X-style PLL search more permissive
+
+From: Adam Jackson <ajax@redhat.com>
+
+commit 6ba770dc5c334aff1c055c8728d34656e0f091e2 upstream.
+
+Fixes an Ironlake laptop with a 68.940MHz 1280x800 panel and 120MHz SSC
+reference clock.
+
+More generally, the 0.488% tolerance used before is just too tight to
+reliably find a PLL setting. I extracted the search algorithm and
+modified it to find the dot clocks with maximum error over the valid
+range for the given output type:
+
+http://people.freedesktop.org/~ajax/intel_g4x_find_best_pll.c
+
+This gave:
+
+Worst dotclock for Ironlake DAC refclk is 350000kHz (error 0.00571)
+Worst dotclock for Ironlake SL-LVDS refclk is 102321kHz (error 0.00524)
+Worst dotclock for Ironlake DL-LVDS refclk is 219642kHz (error 0.00488)
+Worst dotclock for Ironlake SL-LVDS SSC refclk is 84374kHz (error 0.00529)
+Worst dotclock for Ironlake DL-LVDS SSC refclk is 183035kHz (error 0.00488)
+Worst dotclock for G4X SDVO refclk is 267600kHz (error 0.00448)
+Worst dotclock for G4X HDMI refclk is 334400kHz (error 0.00478)
+Worst dotclock for G4X SL-LVDS refclk is 95571kHz (error 0.00449)
+Worst dotclock for G4X DL-LVDS refclk is 224000kHz (error 0.00510)
+
+Signed-off-by: Adam Jackson <ajax@redhat.com>
+Signed-off-by: Eric Anholt <eric@anholt.net>
+Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
+
+---
+ drivers/gpu/drm/i915/intel_display.c | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+--- a/drivers/gpu/drm/i915/intel_display.c
++++ b/drivers/gpu/drm/i915/intel_display.c
+@@ -879,8 +879,8 @@ intel_g4x_find_best_PLL(const intel_limi
+ intel_clock_t clock;
+ int max_n;
+ bool found;
+- /* approximately equals target * 0.00488 */
+- int err_most = (target >> 8) + (target >> 10);
++ /* approximately equals target * 0.00585 */
++ int err_most = (target >> 8) + (target >> 9);
+ found = false;
+
+ if (intel_pipe_has_type(crtc, INTEL_OUTPUT_LVDS)) {
--- /dev/null
+From e153b70b89770968a704eda0b55707c6066b2d44 Mon Sep 17 00:00:00 2001
+From: Alex Deucher <alexdeucher@gmail.com>
+Date: Tue, 20 Jul 2010 18:07:22 -0400
+Subject: drm/radeon/kms: add quirk for ASUS HD 3600 board
+
+From: Alex Deucher <alexdeucher@gmail.com>
+
+commit e153b70b89770968a704eda0b55707c6066b2d44 upstream.
+
+Connector is actually DVI rather than HDMI.
+
+Reported-by: trapDoor <trapdoor6@gmail.com>
+Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
+Signed-off-by: Dave Airlie <airlied@redhat.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
+
+---
+ drivers/gpu/drm/radeon/radeon_atombios.c | 9 +++++++++
+ 1 file changed, 9 insertions(+)
+
+--- a/drivers/gpu/drm/radeon/radeon_atombios.c
++++ b/drivers/gpu/drm/radeon/radeon_atombios.c
+@@ -268,6 +268,15 @@ static bool radeon_atom_apply_quirks(str
+ }
+ }
+
++ /* ASUS HD 3600 board lists the DVI port as HDMI */
++ if ((dev->pdev->device == 0x9598) &&
++ (dev->pdev->subsystem_vendor == 0x1043) &&
++ (dev->pdev->subsystem_device == 0x01e4)) {
++ if (*connector_type == DRM_MODE_CONNECTOR_HDMIA) {
++ *connector_type = DRM_MODE_CONNECTOR_DVII;
++ }
++ }
++
+ /* ASUS HD 3450 board lists the DVI port as HDMI */
+ if ((dev->pdev->device == 0x95C5) &&
+ (dev->pdev->subsystem_vendor == 0x1043) &&
--- /dev/null
+From f9da52d54eb0e8822b5e7f32ab1cfa6522533d6e Mon Sep 17 00:00:00 2001
+From: Roland Scheidegger <sroland@vmware.com>
+Date: Sat, 12 Jun 2010 12:12:37 -0400
+Subject: drm/radeon/kms: CS checker texture fixes for r1xx/r2xx/r3xx
+
+From: Roland Scheidegger <sroland@vmware.com>
+
+commit f9da52d54eb0e8822b5e7f32ab1cfa6522533d6e upstream.
+
+fixes:
+https://bugs.freedesktop.org/show_bug.cgi?id=28459
+
+agd5f: apply to r1xx/r2xx as well.
+
+Signed-off-by: Roland Scheidegger <sroland@vmware.com>
+Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
+Signed-off-by: Dave Airlie <airlied@redhat.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
+
+---
+ drivers/gpu/drm/radeon/r100.c | 3 +++
+ drivers/gpu/drm/radeon/r200.c | 3 +++
+ drivers/gpu/drm/radeon/r300.c | 5 +++++
+ 3 files changed, 11 insertions(+)
+
+--- a/drivers/gpu/drm/radeon/r100.c
++++ b/drivers/gpu/drm/radeon/r100.c
+@@ -1384,6 +1384,7 @@ static int r100_packet0_check(struct rad
+ case RADEON_TXFORMAT_RGB332:
+ case RADEON_TXFORMAT_Y8:
+ track->textures[i].cpp = 1;
++ track->textures[i].compress_format = R100_TRACK_COMP_NONE;
+ break;
+ case RADEON_TXFORMAT_AI88:
+ case RADEON_TXFORMAT_ARGB1555:
+@@ -1395,12 +1396,14 @@ static int r100_packet0_check(struct rad
+ case RADEON_TXFORMAT_LDUDV655:
+ case RADEON_TXFORMAT_DUDV88:
+ track->textures[i].cpp = 2;
++ track->textures[i].compress_format = R100_TRACK_COMP_NONE;
+ break;
+ case RADEON_TXFORMAT_ARGB8888:
+ case RADEON_TXFORMAT_RGBA8888:
+ case RADEON_TXFORMAT_SHADOW32:
+ case RADEON_TXFORMAT_LDUDUV8888:
+ track->textures[i].cpp = 4;
++ track->textures[i].compress_format = R100_TRACK_COMP_NONE;
+ break;
+ case RADEON_TXFORMAT_DXT1:
+ track->textures[i].cpp = 1;
+--- a/drivers/gpu/drm/radeon/r200.c
++++ b/drivers/gpu/drm/radeon/r200.c
+@@ -405,6 +405,7 @@ int r200_packet0_check(struct radeon_cs_
+ case R200_TXFORMAT_RGB332:
+ case R200_TXFORMAT_Y8:
+ track->textures[i].cpp = 1;
++ track->textures[i].compress_format = R100_TRACK_COMP_NONE;
+ break;
+ case R200_TXFORMAT_AI88:
+ case R200_TXFORMAT_ARGB1555:
+@@ -416,6 +417,7 @@ int r200_packet0_check(struct radeon_cs_
+ case R200_TXFORMAT_DVDU88:
+ case R200_TXFORMAT_AVYU4444:
+ track->textures[i].cpp = 2;
++ track->textures[i].compress_format = R100_TRACK_COMP_NONE;
+ break;
+ case R200_TXFORMAT_ARGB8888:
+ case R200_TXFORMAT_RGBA8888:
+@@ -423,6 +425,7 @@ int r200_packet0_check(struct radeon_cs_
+ case R200_TXFORMAT_BGR111110:
+ case R200_TXFORMAT_LDVDU8888:
+ track->textures[i].cpp = 4;
++ track->textures[i].compress_format = R100_TRACK_COMP_NONE;
+ break;
+ case R200_TXFORMAT_DXT1:
+ track->textures[i].cpp = 1;
+--- a/drivers/gpu/drm/radeon/r300.c
++++ b/drivers/gpu/drm/radeon/r300.c
+@@ -870,6 +870,7 @@ static int r300_packet0_check(struct rad
+ case R300_TX_FORMAT_Y4X4:
+ case R300_TX_FORMAT_Z3Y3X2:
+ track->textures[i].cpp = 1;
++ track->textures[i].compress_format = R100_TRACK_COMP_NONE;
+ break;
+ case R300_TX_FORMAT_X16:
+ case R300_TX_FORMAT_Y8X8:
+@@ -881,6 +882,7 @@ static int r300_packet0_check(struct rad
+ case R300_TX_FORMAT_B8G8_B8G8:
+ case R300_TX_FORMAT_G8R8_G8B8:
+ track->textures[i].cpp = 2;
++ track->textures[i].compress_format = R100_TRACK_COMP_NONE;
+ break;
+ case R300_TX_FORMAT_Y16X16:
+ case R300_TX_FORMAT_Z11Y11X10:
+@@ -891,14 +893,17 @@ static int r300_packet0_check(struct rad
+ case R300_TX_FORMAT_FL_I32:
+ case 0x1e:
+ track->textures[i].cpp = 4;
++ track->textures[i].compress_format = R100_TRACK_COMP_NONE;
+ break;
+ case R300_TX_FORMAT_W16Z16Y16X16:
+ case R300_TX_FORMAT_FL_R16G16B16A16:
+ case R300_TX_FORMAT_FL_I32A32:
+ track->textures[i].cpp = 8;
++ track->textures[i].compress_format = R100_TRACK_COMP_NONE;
+ break;
+ case R300_TX_FORMAT_FL_R32G32B32A32:
+ track->textures[i].cpp = 16;
++ track->textures[i].compress_format = R100_TRACK_COMP_NONE;
+ break;
+ case R300_TX_FORMAT_DXT1:
+ track->textures[i].cpp = 1;
--- /dev/null
+From 15cb02c0a0338ee724bf23e31c7c410ecbffeeba Mon Sep 17 00:00:00 2001
+From: Alex Deucher <alexdeucher@gmail.com>
+Date: Wed, 21 Jul 2010 19:37:21 -0400
+Subject: drm/radeon/kms: fix legacy LVDS dpms sequence
+
+From: Alex Deucher <alexdeucher@gmail.com>
+
+commit 15cb02c0a0338ee724bf23e31c7c410ecbffeeba upstream.
+
+Add delay after turning off the LVDS encoder.
+
+Fixes:
+https://bugzilla.kernel.org/show_bug.cgi?id=16389
+
+Tested-by: Jan Kreuzer <kontrollator@gmx.de>
+Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
+Signed-off-by: Dave Airlie <airlied@redhat.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
+
+---
+ drivers/gpu/drm/radeon/radeon_legacy_encoders.c | 1 +
+ 1 file changed, 1 insertion(+)
+
+--- a/drivers/gpu/drm/radeon/radeon_legacy_encoders.c
++++ b/drivers/gpu/drm/radeon/radeon_legacy_encoders.c
+@@ -108,6 +108,7 @@ static void radeon_legacy_lvds_dpms(stru
+ udelay(panel_pwr_delay * 1000);
+ WREG32(RADEON_LVDS_GEN_CNTL, lvds_gen_cntl);
+ WREG32_PLL(RADEON_PIXCLKS_CNTL, pixclks_cntl);
++ udelay(panel_pwr_delay * 1000);
+ break;
+ }
+
--- /dev/null
+From ff3f011cd859072b5d6e64c0b968cff9bfdc0b37 Mon Sep 17 00:00:00 2001
+From: Alex Deucher <alexdeucher@gmail.com>
+Date: Sat, 6 Mar 2010 09:43:41 -0500
+Subject: drm/radeon/kms: fix legacy tv-out pal mode
+
+From: Alex Deucher <alexdeucher@gmail.com>
+
+commit ff3f011cd859072b5d6e64c0b968cff9bfdc0b37 upstream.
+
+fixes fdo bug 26915
+
+Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
+Signed-off-by: Dave Airlie <airlied@redhat.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
+
+---
+ drivers/gpu/drm/radeon/radeon_legacy_tv.c | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+--- a/drivers/gpu/drm/radeon/radeon_legacy_tv.c
++++ b/drivers/gpu/drm/radeon/radeon_legacy_tv.c
+@@ -642,8 +642,8 @@ void radeon_legacy_tv_mode_set(struct dr
+ }
+ flicker_removal = (tmp + 500) / 1000;
+
+- if (flicker_removal < 2)
+- flicker_removal = 2;
++ if (flicker_removal < 3)
++ flicker_removal = 3;
+ for (i = 0; i < ARRAY_SIZE(SLOPE_limit); ++i) {
+ if (flicker_removal == SLOPE_limit[i])
+ break;
--- /dev/null
+From 5099fa7f23d3711538cbe9fe072b4ce1ba814035 Mon Sep 17 00:00:00 2001
+From: Alex Deucher <alexdeucher@gmail.com>
+Date: Mon, 12 Jul 2010 17:33:50 -0400
+Subject: drm/radeon/kms: fix possible mis-detection of sideport on rs690/rs740
+
+From: Alex Deucher <alexdeucher@gmail.com>
+
+commit 5099fa7f23d3711538cbe9fe072b4ce1ba814035 upstream.
+
+Check ulBootUpMemoryClock on AMD IGPs.
+
+Fix regression noticed by Torsten Kaiser <just.for.lkml@googlemail.com>
+
+Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
+Signed-off-by: Dave Airlie <airlied@redhat.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
+
+---
+ drivers/gpu/drm/radeon/radeon_atombios.c | 11 +++++++++--
+ 1 file changed, 9 insertions(+), 2 deletions(-)
+
+--- a/drivers/gpu/drm/radeon/radeon_atombios.c
++++ b/drivers/gpu/drm/radeon/radeon_atombios.c
+@@ -986,8 +986,15 @@ bool radeon_atombios_sideport_present(st
+ if (igp_info) {
+ switch (crev) {
+ case 1:
+- if (igp_info->info.ucMemoryType & 0xf0)
+- return true;
++ /* AMD IGPS */
++ if ((rdev->family == CHIP_RS690) ||
++ (rdev->family == CHIP_RS740)) {
++ if (igp_info->info.ulBootUpMemoryClock)
++ return true;
++ } else {
++ if (igp_info->info.ucMemoryType & 0xf0)
++ return true;
++ }
+ break;
+ case 2:
+ if (igp_info->info_2.ucMemoryType & 0x0f)
--- /dev/null
+From b2ea4aa67bfd084834edd070e0a4a47857d6db59 Mon Sep 17 00:00:00 2001
+From: Alex Deucher <alexdeucher@gmail.com>
+Date: Thu, 1 Jul 2010 10:34:56 -0400
+Subject: drm/radeon/kms: fix shared ddc handling
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+From: Alex Deucher <alexdeucher@gmail.com>
+
+commit b2ea4aa67bfd084834edd070e0a4a47857d6db59 upstream.
+
+Connectors with a shared ddc line can be connected to different
+encoders.
+
+Reported by Pasi Kärkkäinen <pasik@iki.fi> on dri-devel
+
+Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
+Signed-off-by: Dave Airlie <airlied@redhat.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
+
+---
+ drivers/gpu/drm/radeon/radeon_connectors.c | 4 +++-
+ 1 file changed, 3 insertions(+), 1 deletion(-)
+
+--- a/drivers/gpu/drm/radeon/radeon_connectors.c
++++ b/drivers/gpu/drm/radeon/radeon_connectors.c
+@@ -793,7 +793,9 @@ static enum drm_connector_status radeon_
+ if (connector == list_connector)
+ continue;
+ list_radeon_connector = to_radeon_connector(list_connector);
+- if (radeon_connector->devices == list_radeon_connector->devices) {
++ if (list_radeon_connector->shared_ddc &&
++ (list_radeon_connector->ddc_bus->rec.i2c_id ==
++ radeon_connector->ddc_bus->rec.i2c_id)) {
+ if (drm_detect_hdmi_monitor(radeon_connector->edid)) {
+ if (connector->connector_type == DRM_MODE_CONNECTOR_DVID) {
+ kfree(radeon_connector->edid);
--- /dev/null
+From 42f14c4b454946650cf0bf66e0b631d02e328f61 Mon Sep 17 00:00:00 2001
+From: Alex Deucher <alexdeucher@gmail.com>
+Date: Tue, 20 Jul 2010 11:27:54 -0400
+Subject: drm/radeon/kms: fix shared ddc harder
+
+From: Alex Deucher <alexdeucher@gmail.com>
+
+commit 42f14c4b454946650cf0bf66e0b631d02e328f61 upstream.
+
+This fixes a regression caused by b2ea4aa67bfd084834edd070e0a4a47857d6db59
+due to the way shared ddc with multiple digital connectors was handled.
+
+You generally have two cases where DDC lines are shared:
+- HDMI + VGA
+- HDMI + DVI-D
+
+HDMI + VGA is easy to deal with because you can check the EDID for the
+to see if the attached monitor is digital. A shared DDC line with two
+digital connectors is more complex. You can't use the hdmi bits in the
+EDID since they may not be there with DVI<->HDMI adapters. In this case
+all we can do is check the HPD pins to see which is connected as we have
+no way of knowing using the EDID.
+
+Reported-by: trapdoor6@gmail.com
+Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
+Signed-off-by: Dave Airlie <airlied@redhat.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
+
+---
+ drivers/gpu/drm/radeon/radeon_connectors.c | 23 +++++++++--------------
+ 1 file changed, 9 insertions(+), 14 deletions(-)
+
+--- a/drivers/gpu/drm/radeon/radeon_connectors.c
++++ b/drivers/gpu/drm/radeon/radeon_connectors.c
+@@ -779,14 +779,14 @@ static enum drm_connector_status radeon_
+ } else
+ ret = connector_status_connected;
+
+- /* multiple connectors on the same encoder with the same ddc line
+- * This tends to be HDMI and DVI on the same encoder with the
+- * same ddc line. If the edid says HDMI, consider the HDMI port
+- * connected and the DVI port disconnected. If the edid doesn't
+- * say HDMI, vice versa.
++ /* This gets complicated. We have boards with VGA + HDMI with a
++ * shared DDC line and we have boards with DVI-D + HDMI with a shared
++ * DDC line. The latter is more complex because with DVI<->HDMI adapters
++ * you don't really know what's connected to which port as both are digital.
+ */
+ if (radeon_connector->shared_ddc && (ret == connector_status_connected)) {
+ struct drm_device *dev = connector->dev;
++ struct radeon_device *rdev = dev->dev_private;
+ struct drm_connector *list_connector;
+ struct radeon_connector *list_radeon_connector;
+ list_for_each_entry(list_connector, &dev->mode_config.connector_list, head) {
+@@ -796,15 +796,10 @@ static enum drm_connector_status radeon_
+ if (list_radeon_connector->shared_ddc &&
+ (list_radeon_connector->ddc_bus->rec.i2c_id ==
+ radeon_connector->ddc_bus->rec.i2c_id)) {
+- if (drm_detect_hdmi_monitor(radeon_connector->edid)) {
+- if (connector->connector_type == DRM_MODE_CONNECTOR_DVID) {
+- kfree(radeon_connector->edid);
+- radeon_connector->edid = NULL;
+- ret = connector_status_disconnected;
+- }
+- } else {
+- if ((connector->connector_type == DRM_MODE_CONNECTOR_HDMIA) ||
+- (connector->connector_type == DRM_MODE_CONNECTOR_HDMIB)) {
++ /* cases where both connectors are digital */
++ if (list_connector->connector_type != DRM_MODE_CONNECTOR_VGA) {
++ /* hpd is our only option in this case */
++ if (!radeon_hpd_sense(rdev, radeon_connector->hpd.hpd)) {
+ kfree(radeon_connector->edid);
+ radeon_connector->edid = NULL;
+ ret = connector_status_disconnected;
--- /dev/null
+From 37cf6b03f9f28c62dafb0b9ce5f1ba29c8baffa9 Mon Sep 17 00:00:00 2001
+From: Roland Scheidegger <sroland@vmware.com>
+Date: Sat, 12 Jun 2010 13:31:11 -0400
+Subject: drm/radeon/r100/r200: fix calculation of compressed cube maps
+
+From: Roland Scheidegger <sroland@vmware.com>
+
+commit 37cf6b03f9f28c62dafb0b9ce5f1ba29c8baffa9 upstream.
+
+This needs similar handling to other compressed textures.
+Fixes:
+https://bugs.freedesktop.org/show_bug.cgi?id=26428
+
+Signed-off-by: sroland@vmware.com
+Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
+Signed-off-by: Dave Airlie <airlied@redhat.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
+
+---
+ drivers/gpu/drm/radeon/r100.c | 58 ++++++++++++++++++++++--------------------
+ 1 file changed, 31 insertions(+), 27 deletions(-)
+
+--- a/drivers/gpu/drm/radeon/r100.c
++++ b/drivers/gpu/drm/radeon/r100.c
+@@ -2750,33 +2750,6 @@ static inline void r100_cs_track_texture
+ DRM_ERROR("compress format %d\n", t->compress_format);
+ }
+
+-static int r100_cs_track_cube(struct radeon_device *rdev,
+- struct r100_cs_track *track, unsigned idx)
+-{
+- unsigned face, w, h;
+- struct radeon_bo *cube_robj;
+- unsigned long size;
+-
+- for (face = 0; face < 5; face++) {
+- cube_robj = track->textures[idx].cube_info[face].robj;
+- w = track->textures[idx].cube_info[face].width;
+- h = track->textures[idx].cube_info[face].height;
+-
+- size = w * h;
+- size *= track->textures[idx].cpp;
+-
+- size += track->textures[idx].cube_info[face].offset;
+-
+- if (size > radeon_bo_size(cube_robj)) {
+- DRM_ERROR("Cube texture offset greater than object size %lu %lu\n",
+- size, radeon_bo_size(cube_robj));
+- r100_cs_track_texture_print(&track->textures[idx]);
+- return -1;
+- }
+- }
+- return 0;
+-}
+-
+ static int r100_track_compress_size(int compress_format, int w, int h)
+ {
+ int block_width, block_height, block_bytes;
+@@ -2807,6 +2780,37 @@ static int r100_track_compress_size(int
+ return sz;
+ }
+
++static int r100_cs_track_cube(struct radeon_device *rdev,
++ struct r100_cs_track *track, unsigned idx)
++{
++ unsigned face, w, h;
++ struct radeon_bo *cube_robj;
++ unsigned long size;
++ unsigned compress_format = track->textures[idx].compress_format;
++
++ for (face = 0; face < 5; face++) {
++ cube_robj = track->textures[idx].cube_info[face].robj;
++ w = track->textures[idx].cube_info[face].width;
++ h = track->textures[idx].cube_info[face].height;
++
++ if (compress_format) {
++ size = r100_track_compress_size(compress_format, w, h);
++ } else
++ size = w * h;
++ size *= track->textures[idx].cpp;
++
++ size += track->textures[idx].cube_info[face].offset;
++
++ if (size > radeon_bo_size(cube_robj)) {
++ DRM_ERROR("Cube texture offset greater than object size %lu %lu\n",
++ size, radeon_bo_size(cube_robj));
++ r100_cs_track_texture_print(&track->textures[idx]);
++ return -1;
++ }
++ }
++ return 0;
++}
++
+ static int r100_cs_track_texture_check(struct radeon_device *rdev,
+ struct r100_cs_track *track)
+ {
--- /dev/null
+From 688acaa2897462e4c5e2482496e2868db0760809 Mon Sep 17 00:00:00 2001
+From: Roland Scheidegger <sroland@vmware.com>
+Date: Sat, 12 Jun 2010 13:31:10 -0400
+Subject: drm/radeon/r200: handle more hw tex coord types
+
+From: Roland Scheidegger <sroland@vmware.com>
+
+commit 688acaa2897462e4c5e2482496e2868db0760809 upstream.
+
+Code did not handle projected 2d and depth coordinates, meaning potentially
+set 3d or cube special handling might stick.
+(Not sure what depth coord actually does, but I guess handling it
+like a normal coordinate is the right thing to do.)
+Might be related to https://bugs.freedesktop.org/show_bug.cgi?id=26428
+
+Signed-off-by: sroland@vmware.com
+Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
+Signed-off-by: Dave Airlie <airlied@redhat.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
+
+---
+ drivers/gpu/drm/radeon/r200.c | 2 ++
+ 1 file changed, 2 insertions(+)
+
+--- a/drivers/gpu/drm/radeon/r200.c
++++ b/drivers/gpu/drm/radeon/r200.c
+@@ -368,6 +368,8 @@ int r200_packet0_check(struct radeon_cs_
+ /* 2D, 3D, CUBE */
+ switch (tmp) {
+ case 0:
++ case 3:
++ case 4:
+ case 5:
+ case 6:
+ case 7:
--- /dev/null
+From b82bab4bbe9efa7bc7177fc20620fff19bd95484 Mon Sep 17 00:00:00 2001
+From: Jason Baron <jbaron@redhat.com>
+Date: Tue, 27 Jul 2010 13:18:01 -0700
+Subject: dynamic debug: move ddebug_remove_module() down into free_module()
+
+From: Jason Baron <jbaron@redhat.com>
+
+commit b82bab4bbe9efa7bc7177fc20620fff19bd95484 upstream.
+
+The command
+
+ echo "file ec.c +p" >/sys/kernel/debug/dynamic_debug/control
+
+causes an oops.
+
+Move the call to ddebug_remove_module() down into free_module(). In this
+way it should be called from all error paths. Currently, we are missing
+the remove if the module init routine fails.
+
+Signed-off-by: Jason Baron <jbaron@redhat.com>
+Reported-by: Thomas Renninger <trenn@suse.de>
+Tested-by: Thomas Renninger <trenn@suse.de>
+Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
+Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
+Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
+
+---
+ kernel/module.c | 4 +++-
+ 1 file changed, 3 insertions(+), 1 deletion(-)
+
+--- a/kernel/module.c
++++ b/kernel/module.c
+@@ -720,7 +720,6 @@ SYSCALL_DEFINE2(delete_module, const cha
+ mutex_lock(&module_mutex);
+ /* Store the name of the last unloaded module for diagnostic purposes */
+ strlcpy(last_unloaded_module, mod->name, sizeof(last_unloaded_module));
+- ddebug_remove_module(mod->name);
+ free_module(mod);
+
+ out:
+@@ -1383,6 +1382,9 @@ static void free_module(struct module *m
+ remove_sect_attrs(mod);
+ mod_kobject_remove(mod);
+
++ /* Remove dynamic debug info */
++ ddebug_remove_module(mod->name);
++
+ /* Arch-specific cleanup. */
+ module_arch_cleanup(mod);
+
--- /dev/null
+From f953c9353f5fe6e98fa7f32f51060a74d845b5f8 Mon Sep 17 00:00:00 2001
+From: Daniel J Blueman <daniel.blueman@gmail.com>
+Date: Mon, 17 May 2010 14:23:52 +0100
+Subject: i915: fix lock imbalance on error path...
+
+From: Daniel J Blueman <daniel.blueman@gmail.com>
+
+commit f953c9353f5fe6e98fa7f32f51060a74d845b5f8 upstream.
+
+While investigating Intel i5 Arrandale GPU lockups with -rc4, I
+noticed a lock imbalance.
+
+Signed-off-by: Daniel J Blueman <daniel.blueman@gmail.com>
+Signed-off-by: Eric Anholt <eric@anholt.net>
+Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
+
+---
+ drivers/gpu/drm/i915/i915_drv.c | 1 +
+ 1 file changed, 1 insertion(+)
+
+--- a/drivers/gpu/drm/i915/i915_drv.c
++++ b/drivers/gpu/drm/i915/i915_drv.c
+@@ -328,6 +328,7 @@ int i965_reset(struct drm_device *dev, u
+ }
+ } else {
+ DRM_ERROR("Error occurred. Don't know how to reset this chip.\n");
++ mutex_unlock(&dev->struct_mutex);
+ return -ENODEV;
+ }
+
mac80211-handle-mesh-action-frames-in-ieee80211_rx_h_action.patch
btrfs-fix-checks-in-btrfs_ioc_clone_range.patch
p54pci-add-symbol-ap-300-minipci-adapters-pciid.patch
+dynamic-debug-move-ddebug_remove_module-down-into-free_module.patch
+drm-i915-fix-hibernation-since-i915-self-reclaim-fixes.patch
+drm-i915-add-reclaimable-to-i915-self-reclaimable-page-allocations.patch
+i915-fix-lock-imbalance-on-error-path.patch
+drm-i915-define-mi_arb_state-bits.patch
+drm-i915-enable-low-power-render-writes-on-gen3-hardware.patch
+drm-i915-make-g4x-style-pll-search-more-permissive.patch
+drm-radeon-r200-handle-more-hw-tex-coord-types.patch
+drm-radeon-r100-r200-fix-calculation-of-compressed-cube-maps.patch
+drm-radeon-kms-cs-checker-texture-fixes-for-r1xx-r2xx-r3xx.patch
+drm-radeon-kms-fix-shared-ddc-handling.patch
+drm-radeon-kms-fix-shared-ddc-harder.patch
+drm-radeon-kms-add-quirk-for-asus-hd-3600-board.patch
+drm-radeon-kms-fix-possible-mis-detection-of-sideport-on-rs690-rs740.patch
+drm-radeon-kms-fix-legacy-lvds-dpms-sequence.patch
+drm-radeon-kms-fix-legacy-tv-out-pal-mode.patch
projects / thirdparty / kernel / stable-queue.git / commitdiff
