aarch64: Fix fp8 feature dependencies

We agreed with LLVM that we shouldn't enforce the architectural
dependencies between fp8 muliplication features, so remove them.

Additionally, fix a typo in the gating for FEAT_SME_F8F16 instructions,
which were mistakenly gated by +sme-f8f32 instead.  Until now this
mistake had been masked by the dependency between the features.

diff --git a/gas/config/tc-aarch64.c b/gas/config/tc-aarch64.c
index b79af4044ffe904472beddfa4f8400d9f67b433c..b40886dc08c958b9b2094e8d791e9b373c257ccd 100644 (file)
--- a/gas/config/tc-aarch64.c
+++ b/gas/config/tc-aarch64.c
@@ -10751,18 +10751,18 @@ static const struct aarch64_option_cpu_value_table aarch64_features[] = {
   {"brbe",             AARCH64_FEATURE (BRBE), AARCH64_NO_FEATURES},
   {"sme-lutv2",                AARCH64_FEATURE (SME_LUTv2), AARCH64_FEATURE (SME2)},
   {"fp8fma",           AARCH64_FEATURE (FP8FMA), AARCH64_FEATURE (FP8)},
-  {"fp8dot4",          AARCH64_FEATURE (FP8DOT4), AARCH64_FEATURE (FP8FMA)},
-  {"fp8dot2",          AARCH64_FEATURE (FP8DOT2), AARCH64_FEATURE (FP8DOT4)},
+  {"fp8dot4",          AARCH64_FEATURE (FP8DOT4), AARCH64_FEATURE (FP8)},
+  {"fp8dot2",          AARCH64_FEATURE (FP8DOT2), AARCH64_FEATURE (FP8)},
   {"ssve-fp8fma",      AARCH64_FEATURE (SSVE_FP8FMA),
                        AARCH64_FEATURES (2, FP8, SME2)},
   {"ssve-fp8dot4",     AARCH64_FEATURE (SSVE_FP8DOT4),
-                       AARCH64_FEATURE (SSVE_FP8FMA)},
+                       AARCH64_FEATURES (2, FP8, SME2)},
   {"ssve-fp8dot2",     AARCH64_FEATURE (SSVE_FP8DOT2),
-                       AARCH64_FEATURE (SSVE_FP8DOT4)},
+                       AARCH64_FEATURES (2, FP8, SME2)},
   {"sme-f8f32",                AARCH64_FEATURE (SME_F8F32),
                        AARCH64_FEATURES (2, FP8, SME2)},
   {"sme-f8f16",                AARCH64_FEATURE (SME_F8F16),
-                       AARCH64_FEATURE (SME_F8F32)},
+                       AARCH64_FEATURES (2, FP8, SME2)},
   {"sme-f16f16",       AARCH64_FEATURE (SME_F16F16), AARCH64_FEATURE (SME2)},
   {"sme-b16b16",       AARCH64_FEATURE (SME_B16B16),
                        AARCH64_FEATURES (2, SVE_B16B16, SME2)},

diff --git a/gas/doc/c-aarch64.texi b/gas/doc/c-aarch64.texi
index 5d0aac8fe0ae31f4f72177c5bdc55adb4e0e2daa..1dbefde26de416bd750f966c86207e50d498711f 100644 (file)
--- a/gas/doc/c-aarch64.texi
+++ b/gas/doc/c-aarch64.texi
@@ -195,9 +195,9 @@ automatically cause those extensions to be disabled.
  @tab Enable floating-point extensions.
 @item @code{fp8} @tab
  @tab Enable the Floating Point 8 (FP8) extension.
-@item @code{fp8dot2} @tab @code{fp8dot4}
+@item @code{fp8dot2} @tab @code{fp8}
  @tab Enable the FP8 2-way dot product instructions.
-@item @code{fp8dot4} @tab @code{fp8fma}
+@item @code{fp8dot4} @tab @code{fp8}
  @tab Enable the FP8 4-way dot product instructions.
 @item @code{fp8fma} @tab @code{fp8}
  @tab Enable the FP8 FMA instructions.
@@ -271,7 +271,7 @@ automatically cause those extensions to be disabled.
  @tab Enable the Scalable Matrix Extension.
 @item @code{sme-b16b16} @tab @code{sme2}, @code{sve-b16b16}
  @tab Enable SME ZA-targeting non-widening BFloat16 instructions.
-@item @code{sme-f8f16} @tab @code{sme-f8f32}
+@item @code{sme-f8f16} @tab @code{sme2}, @code{fp8}
  @tab Enable the SME F8F16 Extension.
 @item @code{sme-f8f32} @tab @code{sme2}, @code{fp8}
  @tab Enable the SME F8F32 Extension.
@@ -287,12 +287,12 @@ automatically cause those extensions to be disabled.
  @tab Enable SME2.1.
 @item @code{ssbs} @tab
  @tab Enable Speculative Store Bypassing Safe state read and write.
-@item @code{ssve-fp8dot2} @tab @code{ssve-fp8dot4}
- @tab Enable the Streaming SVE FP8 2-way dot product instructions.  These can also be enabled using @code{+fp8dot2+sme2}.
-@item @code{ssve-fp8dot4} @tab @code{ssve-fp8fma}
- @tab Enable the Streaming SVE FP8 4-way dot product instructions.  These can also be enabled using @code{+fp8dot4+sme2}.
+@item @code{ssve-fp8dot2} @tab @code{sme2}, @code{fp8}
+ @tab Enable the Streaming SVE FP8 2-way dot product instructions.
+@item @code{ssve-fp8dot4} @tab @code{sme2}, @code{fp8}
+ @tab Enable the Streaming SVE FP8 4-way dot product instructions.
 @item @code{ssve-fp8fma} @tab @code{sme2}, @code{fp8}
- @tab Enable the Streaming SVE FP8 FMA instructions.  These can also be enabled using @code{+fp8fma+sme2}.
+ @tab Enable the Streaming SVE FP8 FMA instructions.
 @item @code{sve} @tab @code{fcma}
  @tab Enable the Scalable Vector Extension.
 @item @code{sve-b16b16} @tab

diff --git a/gas/testsuite/gas/aarch64/fp8-mul-illegal.d b/gas/testsuite/gas/aarch64/fp8-mul-illegal.d
index 1dac59a5d820670e94f65d7dba510b011609d631..2a2224b0b092047dd9c5107be593322643cb6849 100644 (file)
--- a/gas/testsuite/gas/aarch64/fp8-mul-illegal.d
+++ b/gas/testsuite/gas/aarch64/fp8-mul-illegal.d
@@ -1,2 +1,2 @@
-#as: -march=armv8-a+fp8dot2
+#as: -march=armv8-a+fp8dot2+fp8dot4+fp8fma
 #error_output: fp8-mul-illegal.l

diff --git a/gas/testsuite/gas/aarch64/fp8-sve-mul-illegal.d b/gas/testsuite/gas/aarch64/fp8-sve-mul-illegal.d
index f1d98eec161d095e59b922d7e682665634bd8d01..45dcca3c84708d9283cb0c9333e786533699e1ca 100644 (file)
--- a/gas/testsuite/gas/aarch64/fp8-sve-mul-illegal.d
+++ b/gas/testsuite/gas/aarch64/fp8-sve-mul-illegal.d
@@ -1,2 +1,2 @@
-#as: -march=armv8-a+sve2+fp8dot2
+#as: -march=armv8-a+sve2+fp8dot2+fp8dot4+fp8fma
 #error_output: fp8-sve-mul-illegal.l

diff --git a/opcodes/aarch64-tbl.h b/opcodes/aarch64-tbl.h
index 70cd3ffb6e0000835f88fbdffdf53ff8cb40974c..0d42be3bef6203db559a5ddd0c662362eadb8a92 100644 (file)
--- a/opcodes/aarch64-tbl.h
+++ b/opcodes/aarch64-tbl.h
@@ -2858,7 +2858,7 @@ static const aarch64_feature_set aarch64_feature_fp8dot2_sve =
 static const aarch64_feature_set aarch64_feature_sme_f8f32 =
   AARCH64_FEATURES (2, SME_F8F32, SME2);
 static const aarch64_feature_set aarch64_feature_sme_f8f16 =
-  AARCH64_FEATURES (2, SME_F8F32, SME2);
+  AARCH64_FEATURES (2, SME_F8F16, SME2);
 static const aarch64_feature_set aarch64_feature_sme_f16f16_f8f16 =
   AARCH64_FEATURES (2, SME_F16F16_F8F16, SME2);
 static const aarch64_feature_set aarch64_feature_sme_f16f16 =