#include "dcn20/dcn20_optc.h"
#include "dcn30/dcn30_cm_common.h"
-#define DC_LOGGER_INIT(logger)
+#define DC_LOGGER_INIT(logger) \
+ struct dal_logger *dc_logger = logger
#define CTX \
hws->ctx
#define REG(reg)\
hws->regs->reg
#define DC_LOGGER \
- stream->ctx->logger
-
+ dc_logger
#undef FN
#define FN(reg_name, field_name) \
struct pipe_ctx *odm_pipe;
int opp_cnt = 1;
+ DC_LOGGER_INIT(stream->ctx->logger);
+
ASSERT(dsc);
for (odm_pipe = pipe_ctx->next_odm_pipe; odm_pipe; odm_pipe = odm_pipe->next_odm_pipe)
opp_cnt++;
apply_symclk_on_tx_off_wa(link);
}
+
+
+void dcn314_plane_atomic_power_down(struct dc *dc,
+ struct dpp *dpp,
+ struct hubp *hubp)
+{
+ struct dce_hwseq *hws = dc->hwseq;
+ DC_LOGGER_INIT(dc->ctx->logger);
+
+ if (REG(DC_IP_REQUEST_CNTL)) {
+ REG_SET(DC_IP_REQUEST_CNTL, 0, IP_REQUEST_EN, 1);
+
+ if (hws->funcs.dpp_pg_control) {
+ hws->funcs.dpp_pg_control(hws, dpp->inst, false);
+ dpp->funcs->dpp_reset(dpp);
+ }
+
+ if (hws->funcs.hubp_pg_control) {
+ hws->funcs.hubp_pg_control(hws, hubp->inst, false);
+ hubp->funcs->hubp_reset(hubp);
+ }
+
+ REG_SET(DC_IP_REQUEST_CNTL, 0, IP_REQUEST_EN, 0);
+ DC_LOG_DEBUG("Power gated front end %d\n", hubp->inst);
+ }
+
+ if (hws->funcs.dpp_root_clock_control)
+ hws->funcs.dpp_root_clock_control(hws, dpp->inst, false);
+}
.disable_vga = dcn20_disable_vga,
.bios_golden_init = dcn10_bios_golden_init,
.plane_atomic_disable = dcn20_plane_atomic_disable,
- .plane_atomic_power_down = dcn10_plane_atomic_power_down,
+ .plane_atomic_power_down = dcn314_plane_atomic_power_down,
.enable_power_gating_plane = dcn314_enable_power_gating_plane,
.dpp_root_clock_control = dcn314_dpp_root_clock_control,
.hubp_pg_control = dcn31_hubp_pg_control,