MII_BUSY;
}
-static int stmmac_mdio_read(struct stmmac_priv *priv, unsigned int pa,
- unsigned int gr, u32 cmd, int data)
+static int stmmac_mdio_access(struct stmmac_priv *priv, unsigned int pa,
+ unsigned int gr, u32 cmd, u32 data, bool read)
{
- unsigned int mii_address = priv->hw->mii.addr;
- unsigned int mii_data = priv->hw->mii.data;
- u32 value;
+ void __iomem *mii_address = priv->ioaddr + priv->hw->mii.addr;
+ void __iomem *mii_data = priv->ioaddr + priv->hw->mii.data;
+ u32 addr;
int ret;
- ret = stmmac_mdio_wait(priv->ioaddr + mii_address, MII_BUSY);
+ ret = stmmac_mdio_wait(mii_address, MII_BUSY);
if (ret)
return ret;
- value = stmmac_mdio_format_addr(priv, pa, gr) | cmd;
+ addr = stmmac_mdio_format_addr(priv, pa, gr) | cmd;
- writel(data, priv->ioaddr + mii_data);
- writel(value, priv->ioaddr + mii_address);
+ writel(data, mii_data);
+ writel(addr, mii_address);
- ret = stmmac_mdio_wait(priv->ioaddr + mii_address, MII_BUSY);
+ ret = stmmac_mdio_wait(mii_address, MII_BUSY);
if (ret)
return ret;
- /* Read the data from the MII data register */
- return readl(priv->ioaddr + mii_data) & MII_DATA_MASK;
+ /* Read the data from the MII data register if in read mode */
+ return read ? readl(mii_data) & MII_DATA_MASK : 0;
+}
+
+static int stmmac_mdio_read(struct stmmac_priv *priv, unsigned int pa,
+ unsigned int gr, u32 cmd, int data)
+{
+ return stmmac_mdio_access(priv, pa, gr, cmd, data, true);
+}
+
+static int stmmac_mdio_write(struct stmmac_priv *priv, unsigned int pa,
+ unsigned int gr, u32 cmd, int data)
+{
+ return stmmac_mdio_access(priv, pa, gr, cmd, data, false);
}
/**
return data;
}
-static int stmmac_mdio_write(struct stmmac_priv *priv, unsigned int pa,
- unsigned int gr, u32 cmd, int data)
-{
- unsigned int mii_address = priv->hw->mii.addr;
- unsigned int mii_data = priv->hw->mii.data;
- u32 value;
- int ret;
-
- /* Wait until any existing MII operation is complete */
- ret = stmmac_mdio_wait(priv->ioaddr + mii_address, MII_BUSY);
- if (ret)
- return ret;
-
- value = stmmac_mdio_format_addr(priv, pa, gr) | cmd;
-
- /* Set the MII address register to write */
- writel(data, priv->ioaddr + mii_data);
- writel(value, priv->ioaddr + mii_address);
-
- /* Wait until any existing MII operation is complete */
- return stmmac_mdio_wait(priv->ioaddr + mii_address, MII_BUSY);
-}
-
/**
* stmmac_mdio_write_c22
* @bus: points to the mii_bus structure