Fix opcode for 64-bit jecxz

gas/testsuite/

	PR gas/14859
	* gas/i386/x86-64-opcode.s: Add jecxz.
	* gas/i386/x86-64-opcode.d: Updated.

opcodes/

	PR gas/14859
	* i386-opc.tbl: Fix opcode for 64-bit jecxz.
	* i386-tbl.h: Regenerated.

diff --git a/gas/ChangeLog b/gas/ChangeLog
index 33cb949b27bdb1c0841a982a3efbaa60951d0ee9..bcf76b8cbdb1226f1e1029069785886ebe367345 100644 (file)
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,9 @@
+2012-11-20  H.J. Lu  <hongjiu.lu@intel.com>
+
+       PR gas/14859
+       * gas/i386/x86-64-opcode.s: Add jecxz.
+       * gas/i386/x86-64-opcode.d: Updated.
+
 2012-11-20  Yufeng Zhang  <yufeng.zhang@arm.com>
 
        * config/tc-aarch64.c (first_error_fmt): Add ATTRIBUTE_UNUSED to the

diff --git a/gas/testsuite/gas/i386/x86-64-opcode.d b/gas/testsuite/gas/i386/x86-64-opcode.d
index 7c6dd0362ce9427d7750696d882a079be3ed9c49..4b3003a46eb5fa611448bf75245c60316fa56cf5 100644 (file)
--- a/gas/testsuite/gas/i386/x86-64-opcode.d
+++ b/gas/testsuite/gas/i386/x86-64-opcode.d
@@ -296,4 +296,5 @@ Disassembly of section .text:
 [      ]*[a-f0-9]+:    0f 07                   sysret 
 [      ]*[a-f0-9]+:    0f 01 f8                swapgs 
 [      ]*[a-f0-9]+:    66 68 22 22             pushw  \$0x2222
+[      ]*[a-f0-9]+:    67 e3 ff                jecxz  0x49d
 #pass

diff --git a/gas/testsuite/gas/i386/x86-64-opcode.s b/gas/testsuite/gas/i386/x86-64-opcode.s
index cb9bbc118553752b245775033a58c070319ed353..96f624db87463a00fd616249523292db7788b90b 100644 (file)
--- a/gas/testsuite/gas/i386/x86-64-opcode.s
+++ b/gas/testsuite/gas/i386/x86-64-opcode.s
@@ -424,3 +424,5 @@
         swapgs                       #  --  --  -- --   0F 01 f8
 
        pushw $0x2222
+
+        jecxz .+2

diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index 4849206776a1e266fbae3eeca7578de9700d67de..2540f4dbc17c0db36625f517725a9cfe4e66fefc 100644 (file)
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,10 @@
+2012-11-20  Kirill Yukhin  <kirill.yukhin@intel.com>
+           H.J. Lu  <hongjiu.lu@intel.com>
+
+       PR gas/14859
+       * i386-opc.tbl: Fix opcode for 64-bit jecxz.
+       * i386-tbl.h: Regenerated.
+
 2012-11-20  Andreas Krebbel  <Andreas.Krebbel@de.ibm.com>
 
        * s390-opc.txt: Fix srstu and strag opcodes.

diff --git a/opcodes/i386-opc.tbl b/opcodes/i386-opc.tbl
index 6d2834ebb09bd2da5415d686c626800b2f2bcd45..3e871fb8493a421e8c6cbc7fb522e6de97cce380 100644 (file)
--- a/opcodes/i386-opc.tbl
+++ b/opcodes/i386-opc.tbl
@@ -390,7 +390,7 @@ jg, 1, 0x7f, None, 1, 0, Jump|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf,
 // jcxz vs. jecxz is chosen on the basis of the address size prefix.
 jcxz, 1, 0xe3, None, 1, CpuNo64, JumpByte|Size16|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Disp8|Disp16|Disp32 }
 jecxz, 1, 0xe3, None, 1, CpuNo64, JumpByte|Size32|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Disp8|Disp16|Disp32 }
-jecxz, 1, 0x67e3, None, 2, Cpu64, JumpByte|Size32|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Disp8|Disp32|Disp32S }
+jecxz, 1, 0xe3, None, 1, Cpu64, JumpByte|Size32|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Disp8|Disp32|Disp32S }
 jrcxz, 1, 0xe3, None, 1, Cpu64, JumpByte|Size64|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|NoRex64, { Disp8|Disp32|Disp32S }
 
 // The loop instructions also use the address size prefix to select

diff --git a/opcodes/i386-tbl.h b/opcodes/i386-tbl.h
index e151afab18613190aab23a93a52b8dce28948ba8..257f8b1851ed2969e33d91898bb1595905ab6f6d 100644 (file)
--- a/opcodes/i386-tbl.h
+++ b/opcodes/i386-tbl.h
@@ -3417,7 +3417,7 @@ const insn_template i386_optab[] =
     { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 
          1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 
          0, 0, 0, 0, 0, 0 } } } },
-  { "jecxz", 1, 0x67e3, None, 2,
+  { "jecxz", 1, 0xe3, None, 1,
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 
         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 
         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,