--- /dev/null
+From 63a9ab264a8c030482ab9e7e20b6c4c162299531 Mon Sep 17 00:00:00 2001
+From: Alex Deucher <alexander.deucher@amd.com>
+Date: Mon, 6 Feb 2023 11:47:47 -0500
+Subject: drm/amd/pm/smu7: move variables to where they are used
+
+From: Alex Deucher <alexander.deucher@amd.com>
+
+commit 63a9ab264a8c030482ab9e7e20b6c4c162299531 upstream.
+
+Move variable declarations to where they are used. Fixes
+a segfault on smu7 V0 structures where some tables don't
+exist.
+
+Cc: Evan Quan <evan.quan@amd.com>
+Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/2388
+Fixes: b1a9557a7d00 ("drm/amd/pm: fulfill powerplay peak profiling mode shader/memory clock settings")
+Reviewed-by: Evan Quan <evan.quan@amd.com>
+Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c | 14 ++++++++------
+ 1 file changed, 8 insertions(+), 6 deletions(-)
+
+--- a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c
++++ b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c
+@@ -1505,12 +1505,6 @@ static void smu7_populate_umdpstate_cloc
+ {
+ struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend);
+ struct smu7_dpm_table *golden_dpm_table = &data->golden_dpm_table;
+- struct phm_clock_voltage_dependency_table *vddc_dependency_on_sclk =
+- hwmgr->dyn_state.vddc_dependency_on_sclk;
+- struct phm_ppt_v1_information *table_info =
+- (struct phm_ppt_v1_information *)(hwmgr->pptable);
+- struct phm_ppt_v1_clock_voltage_dependency_table *vdd_dep_on_sclk =
+- table_info->vdd_dep_on_sclk;
+ int32_t tmp_sclk, count, percentage;
+
+ if (golden_dpm_table->mclk_table.count == 1) {
+@@ -1525,6 +1519,9 @@ static void smu7_populate_umdpstate_cloc
+ tmp_sclk = hwmgr->pstate_mclk * percentage / 100;
+
+ if (hwmgr->pp_table_version == PP_TABLE_V0) {
++ struct phm_clock_voltage_dependency_table *vddc_dependency_on_sclk =
++ hwmgr->dyn_state.vddc_dependency_on_sclk;
++
+ for (count = vddc_dependency_on_sclk->count - 1; count >= 0; count--) {
+ if (tmp_sclk >= vddc_dependency_on_sclk->entries[count].clk) {
+ hwmgr->pstate_sclk = vddc_dependency_on_sclk->entries[count].clk;
+@@ -1537,6 +1534,11 @@ static void smu7_populate_umdpstate_cloc
+ hwmgr->pstate_sclk_peak =
+ vddc_dependency_on_sclk->entries[vddc_dependency_on_sclk->count - 1].clk;
+ } else if (hwmgr->pp_table_version == PP_TABLE_V1) {
++ struct phm_ppt_v1_information *table_info =
++ (struct phm_ppt_v1_information *)(hwmgr->pptable);
++ struct phm_ppt_v1_clock_voltage_dependency_table *vdd_dep_on_sclk =
++ table_info->vdd_dep_on_sclk;
++
+ for (count = vdd_dep_on_sclk->count - 1; count >= 0; count--) {
+ if (tmp_sclk >= vdd_dep_on_sclk->entries[count].clk) {
+ hwmgr->pstate_sclk = vdd_dep_on_sclk->entries[count].clk;