&& i.tm.mnem_off != MN_add
&& i.tm.mnem_off != MN_mov)
return x86_tls_error_insn;
- if (i.op[1].regs->reg_type.bitfield.class != Reg
- || i.op[0].regs->reg_type.bitfield.class
- || i.imm_operands)
+ if (i.imm_operands
+ || i.disp_operands != 1
+ || i.reg_operands != 1
+ || i.types[1].bitfield.class != Reg)
return x86_tls_error_opcode;
if (!i.base_reg)
return x86_tls_error_no_base_reg;
*/
if (i.tm.mnem_off != MN_add && i.tm.mnem_off != MN_mov)
return x86_tls_error_insn;
- if (i.op[1].regs->reg_type.bitfield.class != Reg
- || i.op[0].regs->reg_type.bitfield.class
- || i.imm_operands)
+ if (i.imm_operands
+ || i.disp_operands != 1
+ || i.reg_operands != 1
+ || i.types[1].bitfield.class != Reg)
return x86_tls_error_opcode;
if (i.base_reg || i.index_reg)
return x86_tls_error_require_no_base_index_reg;
*/
if (i.tm.mnem_off != MN_add && i.tm.mnem_off != MN_mov)
return x86_tls_error_insn;
- if (i.op[i.operands - 1].regs->reg_type.bitfield.class != Reg
- || (i.op[0].regs->reg_type.bitfield.class
- && i.tm.opcode_modifier.vexvvvv != VexVVVV_DST)
- || i.imm_operands)
+ if (i.imm_operands
+ || i.disp_operands != 1
+ || i.types[i.operands - 1].bitfield.class != Reg)
return x86_tls_error_opcode;
if (!i.base_reg)
return x86_tls_error_no_base_reg;