drm/amdgpu: Disable JDPG on VCN5_3

JDPG does not support on VCN5

This patch will disable JDPG, because DPG is not correctly
copying the JRBC Read/Write Pointers (R/WPTR) from the PG
(Power Gating) block to JRBC.

Signed-off-by: Suresh Guttula <suresh.guttula@amd.com>
Reviewed-by: Mario Limonciello <mario.limonciello@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
(cherry picked from commit ea3fdd1eda088030d8925f023613728969f55955)

diff --git a/drivers/gpu/drm/amd/amdgpu/soc21.c b/drivers/gpu/drm/amd/amdgpu/soc21.c
index a2733d1637f0108a290b5120a16dc42faacbfbf2..e0b80abcd0750f52a03e39a17923cbeea4475351 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/soc21.c
+++ b/drivers/gpu/drm/amd/amdgpu/soc21.c
@@ -862,7 +862,6 @@ static int soc21_common_early_init(struct amdgpu_ip_block *ip_block)
                        AMD_CG_SUPPORT_BIF_LS;
                adev->pg_flags = AMD_PG_SUPPORT_VCN_DPG |
                        AMD_PG_SUPPORT_VCN |
-                       AMD_PG_SUPPORT_JPEG_DPG |
                        AMD_PG_SUPPORT_JPEG |
                        AMD_PG_SUPPORT_GFX_PG;
                adev->external_rev_id = adev->rev_id + 0xF;
@@ -890,7 +889,6 @@ static int soc21_common_early_init(struct amdgpu_ip_block *ip_block)
                        AMD_CG_SUPPORT_BIF_LS;
                adev->pg_flags = AMD_PG_SUPPORT_VCN_DPG |
                        AMD_PG_SUPPORT_VCN |
-                       AMD_PG_SUPPORT_JPEG_DPG |
                        AMD_PG_SUPPORT_JPEG |
                        AMD_PG_SUPPORT_GFX_PG;
                adev->external_rev_id = adev->rev_id + 0x40;