media: qcom: camss: Add CSIPHY support for QCS8300

QCS8300 uses the same CSIPHY hardware version (v1.3.0) as
SA8775P. The only difference between the two platforms is
the number of CSIPHY instances: SA8775P has four, while
QCS8300 has three.

Signed-off-by: Vikram Sharma <quic_vikramsa@quicinc.com>
Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Signed-off-by: Bryan O'Donoghue <bod@kernel.org>
Signed-off-by: Hans Verkuil <hverkuil+cisco@kernel.org>

diff --git a/drivers/media/platform/qcom/camss/camss-csiphy-3ph-1-0.c b/drivers/media/platform/qcom/camss/camss-csiphy-3ph-1-0.c
index 754ae973a3684b837e008b226f72a16c6c3d4f9a..a229ba04b158739ddfe4076bdd28167a309f13ea 100644 (file)
--- a/drivers/media/platform/qcom/camss/camss-csiphy-3ph-1-0.c
+++ b/drivers/media/platform/qcom/camss/camss-csiphy-3ph-1-0.c
@@ -911,6 +911,7 @@ static bool csiphy_is_gen2(u32 version)
        case CAMSS_7280:
        case CAMSS_8250:
        case CAMSS_8280XP:
+       case CAMSS_8300:
        case CAMSS_845:
        case CAMSS_8550:
        case CAMSS_8775P:
@@ -1017,6 +1018,7 @@ static int csiphy_init(struct csiphy_device *csiphy)
                regs->lane_array_size = ARRAY_SIZE(lane_regs_sm8550);
                regs->offset = 0x1000;
                break;
+       case CAMSS_8300:
        case CAMSS_8775P:
                regs->lane_regs = &lane_regs_sa8775p[0];
                regs->lane_array_size = ARRAY_SIZE(lane_regs_sa8775p);

diff --git a/drivers/media/platform/qcom/camss/camss.c b/drivers/media/platform/qcom/camss/camss.c
index 72fa22bdf49d183f8771f3a09aae01aed93603fa..f0c47f951b07be7928bb9c0ed300449dd8d32808 100644 (file)
--- a/drivers/media/platform/qcom/camss/camss.c
+++ b/drivers/media/platform/qcom/camss/camss.c
@@ -2617,6 +2617,63 @@ static const struct resources_icc icc_res_sm8550[] = {
        },
 };
 
+static const struct camss_subdev_resources csiphy_res_8300[] = {
+       /* CSIPHY0 */
+       {
+               .regulators = { "vdda-phy", "vdda-pll" },
+
+               .clock = { "csiphy_rx", "csiphy0", "csiphy0_timer" },
+               .clock_rate = {
+                       { 400000000 },
+                       { 0 },
+                       { 400000000 },
+               },
+               .reg = { "csiphy0" },
+               .interrupt = { "csiphy0" },
+               .csiphy = {
+                       .id = 0,
+                       .hw_ops = &csiphy_ops_3ph_1_0,
+                       .formats = &csiphy_formats_sdm845,
+               }
+       },
+       /* CSIPHY1 */
+       {
+               .regulators = { "vdda-phy", "vdda-pll" },
+
+               .clock = { "csiphy_rx", "csiphy1", "csiphy1_timer" },
+               .clock_rate = {
+                       { 400000000 },
+                       { 0 },
+                       { 400000000 },
+               },
+               .reg = { "csiphy1" },
+               .interrupt = { "csiphy1" },
+               .csiphy = {
+                       .id = 1,
+                       .hw_ops = &csiphy_ops_3ph_1_0,
+                       .formats = &csiphy_formats_sdm845,
+               }
+       },
+       /* CSIPHY2 */
+       {
+               .regulators = { "vdda-phy", "vdda-pll" },
+
+               .clock = { "csiphy_rx", "csiphy2", "csiphy2_timer" },
+               .clock_rate = {
+                       { 400000000 },
+                       { 0 },
+                       { 400000000 },
+               },
+               .reg = { "csiphy2" },
+               .interrupt = { "csiphy2" },
+               .csiphy = {
+                       .id = 2,
+                       .hw_ops = &csiphy_ops_3ph_1_0,
+                       .formats = &csiphy_formats_sdm845,
+               }
+       },
+};
+
 static const struct camss_subdev_resources csiphy_res_8775p[] = {
        /* CSIPHY0 */
        {