]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
scsi: ufs: host: mediatek: Support new features for MT6991
authorNaomi Chu <naomi.chu@mediatek.com>
Wed, 24 Sep 2025 09:43:30 +0000 (17:43 +0800)
committerMartin K. Petersen <martin.petersen@oracle.com>
Wed, 22 Oct 2025 01:36:46 +0000 (21:36 -0400)
Add support for the MT6991 platform by enabling MRTT settings and random
performance improvements. These enhancements aim to optimize performance
and efficiency on the MT6991 hardware.

Enable multi-Round Trip Time (MRTT) for improved data handling.  Enable
random performance improvement features to boost overall system
responsiveness.

Signed-off-by: Naomi Chu <naomi.chu@mediatek.com>
Reviewed-by: Peter Wang <peter.wang@mediatek.com>
Acked-by: Chun-Hung Wu <chun-hung.wu@mediatek.com>
Signed-off-by: Peter Wang <peter.wang@mediatek.com>
Link: https://patch.msgid.link/20250924094527.2992256-9-peter.wang@mediatek.com
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
drivers/ufs/host/ufs-mediatek.c
drivers/ufs/host/ufs-mediatek.h

index 8498e95e263afb0336d065e6bb425a07d8f8ab8f..eee56f5aed30ee9c63895224e3158fdbb4bc28af 100644 (file)
@@ -289,6 +289,12 @@ static int ufs_mtk_hce_enable_notify(struct ufs_hba *hba,
                                0x453000, REG_UFS_MMIO_OPT_CTRL_0);
                }
 
+               if (host->ip_ver >= IP_VER_MT6991_A0) {
+                       /* Enable multi-rtt */
+                       ufshcd_rmwl(hba, MRTT_EN, MRTT_EN, REG_UFS_MMIO_OPT_CTRL_0);
+                       /* Enable random performance improvement */
+                       ufshcd_rmwl(hba, RDN_PFM_IMPV_DIS, 0, REG_UFS_MMIO_OPT_CTRL_0);
+               }
        }
 
        return 0;
index f96fd032371d9c63a3dd319f28c462fc9edbe77e..9747277f11e8917b38524d0c4a3069fc38bd144a 100644 (file)
@@ -20,6 +20,9 @@
 #define MCQ_MULTI_INTR_EN       BIT(2)
 #define MCQ_CMB_INTR_EN         BIT(3)
 #define MCQ_AH8                 BIT(4)
+#define MON_EN                  BIT(5)
+#define MRTT_EN                 BIT(25)
+#define RDN_PFM_IMPV_DIS        BIT(28)
 
 #define MCQ_INTR_EN_MSK         (MCQ_MULTI_INTR_EN | MCQ_CMB_INTR_EN)