riscv: hwprobe: export Zaamo and Zalrsc extensions

Export the Zaamo and Zalrsc extensions to userspace using hwprobe.

Signed-off-by: Clément Léger <cleger@rivosinc.com>
Reviewed-by: Charlie Jenkins <charlie@rivosinc.com>
Link: https://lore.kernel.org/r/20240619153913.867263-4-cleger@rivosinc.com
Signed-off-by: Alexandre Ghiti <alexghiti@rivosinc.com>

diff --git a/Documentation/arch/riscv/hwprobe.rst b/Documentation/arch/riscv/hwprobe.rst
index 2792f12e90baa6cb6fc76a2d6e4a661ad827f707..53607d962653b6606ed896ff82316495eeaf0c7d 100644 (file)
--- a/Documentation/arch/riscv/hwprobe.rst
+++ b/Documentation/arch/riscv/hwprobe.rst
@@ -245,6 +245,14 @@ The following keys are defined:
        ratified in commit 98918c844281 ("Merge pull request #1217 from
        riscv/zawrs") of riscv-isa-manual.
 
+  * :c:macro:`RISCV_HWPROBE_EXT_ZAAMO`: The Zaamo extension is supported as
+       defined in the in the RISC-V ISA manual starting from commit e87412e621f1
+       ("integrate Zaamo and Zalrsc text (#1304)").
+
+  * :c:macro:`RISCV_HWPROBE_EXT_ZALRSC`: The Zalrsc extension is supported as
+       defined in the in the RISC-V ISA manual starting from commit e87412e621f1
+       ("integrate Zaamo and Zalrsc text (#1304)").
+
   * :c:macro:`RISCV_HWPROBE_EXT_SUPM`: The Supm extension is supported as
        defined in version 1.0 of the RISC-V Pointer Masking extensions.
 

diff --git a/arch/riscv/include/uapi/asm/hwprobe.h b/arch/riscv/include/uapi/asm/hwprobe.h
index 056decf65b1b7218003ce14f1f8da1c80f68859b..3c2fce939673b9e7cf05a20793e6dae79edf73f0 100644 (file)
--- a/arch/riscv/include/uapi/asm/hwprobe.h
+++ b/arch/riscv/include/uapi/asm/hwprobe.h
@@ -79,6 +79,8 @@ struct riscv_hwprobe {
 #define                RISCV_HWPROBE_EXT_ZVFBFMIN      (1ULL << 53)
 #define                RISCV_HWPROBE_EXT_ZVFBFWMA      (1ULL << 54)
 #define                RISCV_HWPROBE_EXT_ZICBOM        (1ULL << 55)
+#define                RISCV_HWPROBE_EXT_ZAAMO         (1ULL << 56)
+#define                RISCV_HWPROBE_EXT_ZALRSC        (1ULL << 57)
 #define RISCV_HWPROBE_KEY_CPUPERF_0    5
 #define                RISCV_HWPROBE_MISALIGNED_UNKNOWN        (0 << 0)
 #define                RISCV_HWPROBE_MISALIGNED_EMULATED       (1 << 0)

diff --git a/arch/riscv/kernel/sys_hwprobe.c b/arch/riscv/kernel/sys_hwprobe.c
index cfe6ceaf30693b467d08edc8b06558f900c69c39..f7380ff9ed17aba5089b9c7fa9f9b96747235b82 100644 (file)
--- a/arch/riscv/kernel/sys_hwprobe.c
+++ b/arch/riscv/kernel/sys_hwprobe.c
@@ -95,7 +95,9 @@ static void hwprobe_isa_ext0(struct riscv_hwprobe *pair,
                 * regardless of the kernel's configuration, as no other checks, besides
                 * presence in the hart_isa bitmap, are made.
                 */
+               EXT_KEY(ZAAMO);
                EXT_KEY(ZACAS);
+               EXT_KEY(ZALRSC);
                EXT_KEY(ZAWRS);
                EXT_KEY(ZBA);
                EXT_KEY(ZBB);