+2023-11-18 Petter Tomner <tomner@bahnhof.se>
+
+ * MAINTAINERS: Update my email address.
+
+2023-11-18 Frederik Harwath <frederik@harwath.name>
+
+ * MAINTAINERS: Change my address.
+
2023-11-16 Michal Jires <mjires@suse.cz>
* MAINTAINERS: Add myself.
+2023-11-18 Xi Ruoyao <xry111@xry111.site>
+
+ * config/loongarch/predicates.md (const_call_insn_operand):
+ Remove buggy "HAVE_AS_SUPPORT_CALL36" conditions. Change "1" to
+ "true" to make the coding style consistent.
+
+2023-11-18 Xi Ruoyao <xry111@xry111.site>
+
+ * config/loongarch/genopts/isa-evolution.in: (lam-bh, lamcas):
+ Add.
+ * config/loongarch/loongarch-str.h: Regenerate.
+ * config/loongarch/loongarch.opt: Regenerate.
+ * config/loongarch/loongarch-cpucfg-map.h: Regenerate.
+ * config/loongarch/loongarch-cpu.cc
+ (ISA_BASE_LA64V110_FEATURES): Include OPTION_MASK_ISA_LAM_BH
+ and OPTION_MASK_ISA_LAMCAS.
+ * config/loongarch/sync.md (atomic_add<mode:SHORT>): Use
+ TARGET_LAM_BH instead of ISA_BASE_IS_LA64V110. Remove empty
+ lines from assembly output.
+ (atomic_exchange<mode>_short): Likewise.
+ (atomic_exchange<mode:SHORT>): Likewise.
+ (atomic_fetch_add<mode>_short): Likewise.
+ (atomic_fetch_add<mode:SHORT>): Likewise.
+ (atomic_cas_value_strong<mode>_amcas): Use TARGET_LAMCAS instead
+ of ISA_BASE_IS_LA64V110.
+ (atomic_compare_and_swap<mode>): Likewise.
+ (atomic_compare_and_swap<mode:GPR>): Likewise.
+ (atomic_compare_and_swap<mode:SHORT>): Likewise.
+ * config/loongarch/loongarch.cc (loongarch_asm_code_end): Dump
+ status if -mlam-bh and -mlamcas if -fverbose-asm.
+
+2023-11-18 Xi Ruoyao <xry111@xry111.site>
+
+ * config/loongarch/loongarch.cc (loongarch_print_operand): Don't
+ print dbar 0x700 if TARGET_LD_SEQ_SA.
+ * config/loongarch/sync.md (atomic_load<mode>): Likewise.
+
+2023-11-18 Xi Ruoyao <xry111@xry111.site>
+
+ * config/loongarch/loongarch.md (DIV): New mode iterator.
+ (<optab:ANY_DIV><mode:GPR>3): Don't expand if TARGET_DIV32.
+ (<optab:ANY_DIV>di3_fake): Disable if TARGET_DIV32.
+ (*<optab:ANY_DIV><mode:GPR>3): Allow SImode if TARGET_DIV32.
+ (<optab:ANY_DIV>si3_extended): New insn if TARGET_DIV32.
+
+2023-11-18 Xi Ruoyao <xry111@xry111.site>
+
+ * config/loongarch/loongarch-def.h:
+ (loongarch_isa_base_features): Declare. Define it in ...
+ * config/loongarch/loongarch-cpu.cc
+ (loongarch_isa_base_features): ... here.
+ (fill_native_cpu_config): If we know the base ISA of the CPU
+ model from PRID, use it instead of la64 (v1.0). Check if all
+ expected features of this base ISA is available, emit a warning
+ if not.
+ * config/loongarch/loongarch-opts.cc (config_target_isa): Enable
+ the features implied by the base ISA if not -march=native.
+
+2023-11-18 Xi Ruoyao <xry111@xry111.site>
+
+ * config/loongarch/genopts/isa-evolution.in: New data file.
+ * config/loongarch/genopts/genstr.sh: Translate info in
+ isa-evolution.in when generating loongarch-str.h, loongarch.opt,
+ and loongarch-cpucfg-map.h.
+ * config/loongarch/genopts/loongarch.opt.in (isa_evolution):
+ New variable.
+ * config/loongarch/t-loongarch: (loongarch-cpucfg-map.h): New
+ rule.
+ (loongarch-str.h): Depend on isa-evolution.in.
+ (loongarch.opt): Depend on isa-evolution.in.
+ (loongarch-cpu.o): Depend on loongarch-cpucfg-map.h.
+ * config/loongarch/loongarch-str.h: Regenerate.
+ * config/loongarch/loongarch-def.h (loongarch_isa): Add field
+ for evolution features. Add helper function to enable features
+ in this field.
+ Probe native CPU capability and save the corresponding options
+ into preset.
+ * config/loongarch/loongarch-cpu.cc (fill_native_cpu_config):
+ Probe native CPU capability and save the corresponding options
+ into preset.
+ (cache_cpucfg): Simplify with C++11-style for loop.
+ (cpucfg_useful_idx, N_CPUCFG_WORDS): Move to ...
+ * config/loongarch/loongarch.cc
+ (loongarch_option_override_internal): Enable the ISA evolution
+ feature options implied by -march and not explicitly disabled.
+ (loongarch_asm_code_end): New function, print ISA information as
+ comments in the assembly if -fverbose-asm. It makes easier to
+ debug things like -march=native.
+ (TARGET_ASM_CODE_END): Define.
+ * config/loongarch/loongarch.opt: Regenerate.
+ * config/loongarch/loongarch-cpucfg-map.h: Generate.
+ (cpucfg_useful_idx, N_CPUCFG_WORDS) ... here.
+
+2023-11-18 Xi Ruoyao <xry111@xry111.site>
+
+ * config/loongarch/genopts/loongarch-strings:
+ (STR_ISA_BASE_LA64V110): Add.
+ * config/loongarch/genopts/loongarch.opt.in:
+ (ISA_BASE_LA64V110): Add.
+ * config/loongarch/loongarch-def.c
+ (loongarch_isa_base_strings): Initialize [ISA_BASE_LA64V110]
+ to STR_ISA_BASE_LA64V110.
+ * config/loongarch/loongarch.opt: Regenerate.
+ * config/loongarch/loongarch-str.h: Regenerate.
+
+2023-11-18 Sebastian Huber <sebastian.huber@embedded-brains.de>
+
+ * doc/invoke.texi (-fprofile-update): Clarify default method. Document
+ the atomic method behaviour.
+ * tree-profile.cc (enum counter_update_method): New.
+ (counter_update): Likewise.
+ (gen_counter_update): Use counter_update_method. Split the
+ atomic counter update in two 32-bit atomic operations if
+ necessary.
+ (tree_profiling): Select counter_update_method.
+
+2023-11-18 Sebastian Huber <sebastian.huber@embedded-brains.de>
+
+ * tree-profile.cc (gen_assign_counter_update): New.
+ (gen_counter_update): Likewise.
+ (gimple_gen_edge_profiler): Use gen_counter_update().
+ (gimple_gen_time_profiler): Likewise.
+
+2023-11-18 Sebastian Huber <sebastian.huber@embedded-brains.de>
+
+ * config/rtems.h (TARGET_HAVE_LIBATOMIC): Define.
+ * doc/tm.texi: Regenerate.
+ * doc/tm.texi.in (TARGET_HAVE_LIBATOMIC): Add.
+ * target.def (have_libatomic): New.
+
+2023-11-18 Sebastian Huber <sebastian.huber@embedded-brains.de>
+
+ Revert:
+ 2023-11-18 Sebastian Huber <sebastian.huber@embedded-brains.de>
+
+ * config/sparc/rtemself.h (SPARC_GCOV_TYPE_SIZE): Define.
+ * config/sparc/sparc.c (sparc_gcov_type_size): New.
+ (TARGET_GCOV_TYPE_SIZE): Redefine if SPARC_GCOV_TYPE_SIZE is defined.
+ * coverage.c (get_gcov_type): Use targetm.gcov_type_size().
+ * doc/tm.texi (TARGET_GCOV_TYPE_SIZE): Add hook under "Misc".
+ * doc/tm.texi.in: Regenerate.
+ * target.def (gcov_type_size): New target hook.
+ * targhooks.c (default_gcov_type_size): New.
+ * targhooks.h (default_gcov_type_size): Declare.
+ * tree-profile.c (gimple_gen_edge_profiler): Use precision of
+ gcov_type_node.
+ (gimple_gen_time_profiler): Likewise.
+
+2023-11-18 Kito Cheng <kito.cheng@sifive.com>
+
+ * config/riscv/riscv-target-attr.cc
+ (riscv_target_attr_parser::parse_arch): Use char[] for
+ std::unique_ptr to prevent mismatched new delete issue.
+ (riscv_process_one_target_attr): Ditto.
+ (riscv_process_target_attr): Ditto.
+
+2023-11-18 Juzhe-Zhong <juzhe.zhong@rivai.ai>
+
+ * config/riscv/vector-iterators.md: Refactor iterators.
+
+2023-11-18 Lulu Cheng <chenglulu@loongson.cn>
+
+ * config/loongarch/sync.md (atomic_load<mode>): New template.
+
+2023-11-18 Lulu Cheng <chenglulu@loongson.cn>
+
+ * config/loongarch/loongarch-def.h: Add comments.
+ * config/loongarch/loongarch-opts.h (ISA_BASE_IS_LA64V110): Define macro.
+ * config/loongarch/loongarch.cc (loongarch_memmodel_needs_rel_acq_fence):
+ Remove redundant code implementations.
+ * config/loongarch/sync.md (d): Added QI, HI support.
+ (atomic_add<mode>): New template.
+ (atomic_exchange<mode>_short): Likewise.
+ (atomic_cas_value_strong<mode>_amcas): Likewise..
+ (atomic_fetch_add<mode>_short): Likewise.
+
+2023-11-18 Lulu Cheng <chenglulu@loongson.cn>
+
+ * config.gcc: Support LA664.
+ * config/loongarch/genopts/loongarch-strings: Likewise.
+ * config/loongarch/genopts/loongarch.opt.in: Likewise.
+ * config/loongarch/loongarch-cpu.cc (fill_native_cpu_config): Likewise.
+ * config/loongarch/loongarch-def.c: Likewise.
+ * config/loongarch/loongarch-def.h (N_ISA_BASE_TYPES): Likewise.
+ (ISA_BASE_LA64V110): Define macro.
+ (N_ARCH_TYPES): Update value.
+ (N_TUNE_TYPES): Update value.
+ (CPU_LA664): New macro.
+ * config/loongarch/loongarch-opts.cc (isa_default_abi): Likewise.
+ (isa_base_compat_p): Likewise.
+ * config/loongarch/loongarch-opts.h (TARGET_64BIT): This parameter is enabled
+ when la_target.isa.base is equal to ISA_BASE_LA64V100 or ISA_BASE_LA64V110.
+ (TARGET_uARCH_LA664): Define macro.
+ * config/loongarch/loongarch-str.h (STR_CPU_LA664): Likewise.
+ * config/loongarch/loongarch.cc (loongarch_cpu_sched_reassociation_width):
+ Add LA664 support.
+ * config/loongarch/loongarch.opt: Regenerate.
+
+2023-11-18 Lulu Cheng <chenglulu@loongson.cn>
+ Xi Ruoyao <xry111@xry111.site>
+
+ * config.in: Regenerate.
+ * config/loongarch/loongarch-opts.h (HAVE_AS_SUPPORT_CALL36): Define macro.
+ * config/loongarch/loongarch.cc (loongarch_legitimize_call_address):
+ If binutils supports call36, the function call is not split over expand.
+ * config/loongarch/loongarch.md: Add call36 generation code.
+ * config/loongarch/predicates.md: Likewise.
+ * configure: Regenerate.
+ * configure.ac: Check whether binutils supports call36.
+
+2023-11-18 David Malcolm <dmalcolm@redhat.com>
+
+ PR analyzer/106147
+ * Makefile.in (ANALYZER_OBJS): Add analyzer/infinite-loop.o.
+ * doc/invoke.texi: Add -fdump-analyzer-infinite-loop and
+ -Wanalyzer-infinite-loop. Add missing CWE link for
+ -Wanalyzer-infinite-recursion.
+ * timevar.def (TV_ANALYZER_INFINITE_LOOPS): New.
+
2023-11-17 Robin Dapp <rdapp@ventanamicro.com>
PR middle-end/112406
+2023-11-18 David Malcolm <dmalcolm@redhat.com>
+
+ PR analyzer/106147
+ * analyzer.opt (Wanalyzer-infinite-loop): New option.
+ (fdump-analyzer-infinite-loop): New option.
+ * checker-event.h (start_cfg_edge_event::get_desc): Drop "final".
+ (start_cfg_edge_event::maybe_describe_condition): Convert from
+ private to protected.
+ * checker-path.h (checker_path::get_logger): New.
+ * diagnostic-manager.cc (process_worklist_item): Update for
+ new context param of maybe_update_for_edge.
+ * engine.cc
+ (impl_region_model_context::impl_region_model_context): Add
+ out_could_have_done_work param to both ctors and use it to
+ initialize mm_out_could_have_done_work.
+ (impl_region_model_context::maybe_did_work): New vfunc
+ implementation.
+ (exploded_node::on_stmt): Add out_could_have_done_work param and
+ pass to ctxt ctor.
+ (exploded_node::on_stmt_pre): Treat setjmp and longjmp as "doing
+ work".
+ (exploded_node::on_longjmp): Likewise.
+ (exploded_edge::exploded_edge): Add "could_do_work" param and use
+ it to initialize m_could_do_work_p.
+ (exploded_edge::dump_dot_label): Add result of could_do_work_p.
+ (exploded_graph::add_function_entry): Mark edge as doing no work.
+ (exploded_graph::add_edge): Add "could_do_work" param and pass to
+ exploded_edge ctor.
+ (add_tainted_args_callback): Treat as doing no work.
+ (exploded_graph::process_worklist): Likewise when merging nodes.
+ (maybe_process_run_of_before_supernode_enodes::item): Likewise.
+ (exploded_graph::maybe_create_dynamic_call): Likewise.
+ (exploded_graph::process_node): Likewise for phi nodes.
+ Pass in a "could_have_done_work" bool when handling stmts and use
+ when creating edges. Assume work is done at bifurcation.
+ (exploded_path::feasible_p): Update for new context param of
+ maybe_update_for_edge.
+ (feasibility_state::feasibility_state): New ctor.
+ (feasibility_state::operator=): New.
+ (feasibility_state::maybe_update_for_edge): Add ctxt param and use
+ it. Fix missing newline when logging state.
+ (impl_run_checkers): Call exploded_graph::detect_infinite_loops.
+ * exploded-graph.h
+ (impl_region_model_context::impl_region_model_context): Add
+ out_could_have_done_work param to both ctors.
+ (impl_region_model_context::maybe_did_work): New decl.
+ (impl_region_model_context::checking_for_infinite_loop_p): New.
+ (impl_region_model_context::on_unusable_in_infinite_loop): New.
+ (impl_region_model_context::m_out_could_have_done_work): New
+ field.
+ (exploded_node::on_stmt): Add "out_could_have_done_work" param.
+ (exploded_edge::exploded_edge): Add "could_do_work" param.
+ (exploded_edge::could_do_work_p): New accessor.
+ (exploded_edge::m_could_do_work_p): New field.
+ (exploded_graph::add_edge): Add "could_do_work" param.
+ (exploded_graph::detect_infinite_loops): New decl.
+ (feasibility_state::feasibility_state): New ctor.
+ (feasibility_state::operator=): New decl.
+ (feasibility_state::maybe_update_for_edge): Add ctxt param.
+ * infinite-loop.cc: New file.
+ * program-state.cc (program_state::on_edge): Log the rejected
+ constraint when region_model::maybe_update_for_edge fails.
+ * region-model.cc (region_model::on_assignment): Treat any writes
+ other than to the stack as "doing work".
+ (region_model::on_stmt_pre): Treat all asm stmts as "doing work".
+ (region_model::on_call_post): Likewise for all calls to functions
+ with unknown side effects.
+ (region_model::handle_phi): Add svals_changing_meaning param.
+ Mark widening svalue in phi nodes as changing meaning.
+ (unusable_in_infinite_loop_constraint_p): New.
+ (region_model::add_constraint): If we're checking for an infinite
+ loop, bail out on unusable svalues, or if we don't have a definite
+ true/false for the constraint.
+ (region_model::update_for_phis): Gather all svalues changing
+ meaning in phi nodes, and purge constraints involving them.
+ (region_model::replay_call_summary): Treat all call summaries as
+ doing work.
+ (region_model::can_merge_with_p): Purge constraints involving
+ svalues that change meaning.
+ (model_merger::on_widening_reuse): New.
+ (test_iteration_1): Likewise.
+ (selftest::test_iteration_1): Remove assertion that model6 "knows"
+ that i < 157.
+ * region-model.h (region_model::handle_phi): Add
+ svals_changing_meaning param
+ (region_model_context::maybe_did_work): New pure virtual func.
+ (region_model_context::checking_for_infinite_loop_p): Likewise.
+ (region_model_context::on_unusable_in_infinite_loop): Likewise.
+ (noop_region_model_context::maybe_did_work): Implement.
+ (noop_region_model_context::checking_for_infinite_loop_p):
+ Likewise.
+ (noop_region_model_context::on_unusable_in_infinite_loop):
+ Likewise.
+ (region_model_context_decorator::maybe_did_work): Implement.
+ (region_model_context_decorator::checking_for_infinite_loop_p):
+ Likewise.
+ (region_model_context_decorator::on_unusable_in_infinite_loop):
+ Likewise.
+ (model_merger::on_widening_reuse): New decl.
+ (model_merger::m_svals_changing_meaning): New field.
+ * sm-signal.cc (register_signal_handler::impl_transition): Assume
+ the edge "does work".
+ * supergraph.cc (supernode::get_start_location): Use CFG edge's
+ goto_locus if available.
+ (supernode::get_end_location): Likewise.
+ (cfg_superedge::dump_label_to_pp): Dump edges with a "goto_locus"
+ * supergraph.h (cfg_superedge::get_goto_locus): New.
+ * svalue.cc (svalue::can_merge_p): Call on_widening_reuse for
+ widening values.
+ (involvement_visitor::visit_widening_svalue): New.
+ (svalue::involves_p): Update assertion to allow widening svalues.
+
2023-11-14 David Malcolm <dmalcolm@redhat.com>
PR analyzer/103533
+2023-11-18 Sebastian Huber <sebastian.huber@embedded-brains.de>
+
+ * c-cppbuiltin.cc (c_cpp_builtins): Define
+ __LIBGCC_HAVE_LIBATOMIC for libgcov.
+
+2023-11-18 Sebastian Huber <sebastian.huber@embedded-brains.de>
+
+ Revert:
+ 2021-08-16 Sebastian Huber <sebastian.huber@embedded-brains.de>
+
+ * c-cppbuiltin.c (c_cpp_builtins): Define
+ __LIBGCC_GCOV_TYPE_SIZE if flag_building_libgcc is true.
+
2023-11-17 Jakub Jelinek <jakub@redhat.com>
PR c++/107571
+2023-11-18 Xi Ruoyao <xry111@xry111.site>
+
+ * gcc.target/loongarch/div-div32.c: New test.
+ * gcc.target/loongarch/div-no-div32.c: New test.
+
+2023-11-18 Francois-Xavier Coudert <fxcoudert@gcc.gnu.org>
+
+ * gfortran.dg/coarray/caf.exp: Remove unused variable.
+ * gfortran.dg/dg.exp: Remove unused variable.
+
+2023-11-18 Lulu Cheng <chenglulu@loongson.cn>
+ Xi Ruoyao <xry111@xry111.site>
+
+ * gcc.target/loongarch/func-call-medium-5.c: If the assembler supports call36,
+ the test is abandoned.
+ * gcc.target/loongarch/func-call-medium-6.c: Likewise.
+ * gcc.target/loongarch/func-call-medium-7.c: Likewise.
+ * gcc.target/loongarch/func-call-medium-8.c: Likewise.
+ * lib/target-supports.exp: Added a function to see if the assembler supports
+ the call36 relocation.
+ * gcc.target/loongarch/func-call-medium-call36-1.c: New test.
+ * gcc.target/loongarch/func-call-medium-call36.c: New test.
+
+2023-11-18 David Malcolm <dmalcolm@redhat.com>
+
+ PR analyzer/106147
+ * c-c++-common/analyzer/gzio-2.c: Add dg-warning for infinite
+ loop, marked as xfail.
+ * c-c++-common/analyzer/infinite-loop-2.c: New test.
+ * c-c++-common/analyzer/infinite-loop-4.c: New test.
+ * c-c++-common/analyzer/infinite-loop-crc32c.c: New test.
+ * c-c++-common/analyzer/infinite-loop-doom-d_main-IdentifyVersion.c:
+ New test.
+ * c-c++-common/analyzer/infinite-loop-doom-v_video.c: New test.
+ * c-c++-common/analyzer/infinite-loop-g_error.c: New test.
+ * c-c++-common/analyzer/infinite-loop-linked-list.c: New test.
+ * c-c++-common/analyzer/infinite-recursion-inlining.c: Add
+ dg-warning directives for infinite loop.
+ * c-c++-common/analyzer/inlining-4-multiline.c: Update expected
+ paths for event 5 having a location.
+ * gcc.dg/analyzer/boxed-malloc-1.c: Add dg-warning for infinite
+ loop.
+ * gcc.dg/analyzer/data-model-20.c: Likewise. Add comment about
+ suspect code, and create...
+ * gcc.dg/analyzer/data-model-20a.c: ...this new test by cleaning
+ it up.
+ * gcc.dg/analyzer/edges-1.c: Add a placeholder statement to avoid
+ the "...to here" from the if stmt occurring at the "while", and
+ thus being treated as a bogus event.
+ * gcc.dg/analyzer/explode-2a.c: Add dg-warning for infinite loop.
+ * gcc.dg/analyzer/infinite-loop-1.c: New test.
+ * gcc.dg/analyzer/malloc-1.c: Add dg-warning for infinite loop.
+ * gcc.dg/analyzer/out-of-bounds-coreutils.c: Add TODO.
+ * gcc.dg/analyzer/paths-4.c: Add dg-warning for infinite loop.
+ * gcc.dg/analyzer/pr103892.c: Likewise.
+ * gcc.dg/analyzer/pr93546.c: Likewise.
+
2023-11-17 Robin Dapp <rdapp@ventanamicro.com>
* gcc.target/aarch64/pr112406.c: New test.
+2023-11-18 Sebastian Huber <sebastian.huber@embedded-brains.de>
+
+ * libgcov.h (GCOV_SUPPORTS_ATOMIC): Always define it.
+ Set it also to 1, if __LIBGCC_HAVE_LIBATOMIC is defined.
+
+2023-11-18 Sebastian Huber <sebastian.huber@embedded-brains.de>
+
+ Revert:
+ 2023-11-18 Sebastian Huber <sebastian.huber@embedded-brains.de>
+
+ * libgcov.h (gcov_type): Define using __LIBGCC_GCOV_TYPE_SIZE.
+ (gcov_type_unsigned): Likewise.
+
2023-11-10 Keith Packard <keithp@keithp.com>
* config/m68k/lb1sf68.S (__adddf3): Properly check for non-zero denorm.
+2023-11-18 Francois-Xavier Coudert <fxcoudert@gcc.gnu.org>
+
+ * asan/asan_mac.cpp: Protect Apple blocks behind the
+ MISSING_BLOCKS_SUPPORT macro.
+
2023-11-15 Jakub Jelinek <jakub@redhat.com>
* LOCAL_PATCHES: Update revisions.
+2023-11-18 Jonathan Wakely <jwakely@redhat.com>
+
+ PR libstdc++/112607
+ * include/std/format (basic_format_arg::_S_to_arg_type): Check
+ value_type for basic_string_view and basic_string
+ specializations.
+ * testsuite/std/format/arguments/112607.cc: New test.
+
+2023-11-18 Jonathan Wakely <jwakely@redhat.com>
+
+ PR libstdc++/110801
+ * include/std/format (_Sink_iter::_M_reserve): New member
+ function.
+ (_Sink::_Reservation): New nested class.
+ (_Sink::_M_reserve, _Sink::_M_bump): New virtual functions.
+ (_Seq_sink::_M_reserve, _Seq_sink::_M_bump): New virtual
+ overrides.
+ (_Iter_sink<O, ContigIter>::_M_reserve): Likewise.
+ (__do_vformat_to): Use new functions to optimize "{}" case.
+
2023-11-17 Jonathan Wakely <jwakely@redhat.com>
* config.h.in: Regenerate.
projects / thirdparty / gcc.git / commitdiff
