]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
drm/amdgpu: update the handle ptr in pre_soft_reset
authorSunil Khatri <sunil.khatri@amd.com>
Mon, 30 Sep 2024 09:07:11 +0000 (14:37 +0530)
committerAlex Deucher <alexander.deucher@amd.com>
Tue, 1 Oct 2024 21:44:41 +0000 (17:44 -0400)
Update the *handle to amdgpu_ip_block ptr for all
functions pointers of pre_soft_reset.

Signed-off-by: Sunil Khatri <sunil.khatri@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c
drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c
drivers/gpu/drm/amd/amdgpu/tonga_ih.c
drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c
drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c
drivers/gpu/drm/amd/amdgpu/vce_v3_0.c
drivers/gpu/drm/amd/amdgpu/vce_v4_0.c
drivers/gpu/drm/amd/include/amd_shared.h

index d66f76408a96047d86d6867b5529cf06d1d4fe87..be5ec1d58b57c94652565556557aa88ab5ebb9cd 100644 (file)
@@ -4979,7 +4979,7 @@ static int amdgpu_device_ip_pre_soft_reset(struct amdgpu_device *adev)
                        continue;
                if (adev->ip_blocks[i].status.hang &&
                    adev->ip_blocks[i].version->funcs->pre_soft_reset) {
-                       r = adev->ip_blocks[i].version->funcs->pre_soft_reset(adev);
+                       r = adev->ip_blocks[i].version->funcs->pre_soft_reset(&adev->ip_blocks[i]);
                        if (r)
                                return r;
                }
index d14a3412a0ff3003265829357a69cc0d80e19589..9a15bf5e6b93420fcc353297db16b29bcae019e4 100644 (file)
@@ -4983,9 +4983,9 @@ static bool gfx_v8_0_check_soft_reset(struct amdgpu_ip_block *ip_block)
        }
 }
 
-static int gfx_v8_0_pre_soft_reset(void *handle)
+static int gfx_v8_0_pre_soft_reset(struct amdgpu_ip_block *ip_block)
 {
-       struct amdgpu_device *adev = (struct amdgpu_device *)handle;
+       struct amdgpu_device *adev = ip_block->adev;
        u32 grbm_soft_reset = 0;
 
        if ((!adev->gfx.grbm_soft_reset) &&
index 0d300f5c94115c1ea6a52d3ad02e73ec28495ade..f579c710d3d110f8698f3e62786a78c57c843a66 100644 (file)
@@ -1316,9 +1316,9 @@ static bool gmc_v8_0_check_soft_reset(struct amdgpu_ip_block *ip_block)
        return false;
 }
 
-static int gmc_v8_0_pre_soft_reset(void *handle)
+static int gmc_v8_0_pre_soft_reset(struct amdgpu_ip_block *ip_block)
 {
-       struct amdgpu_device *adev = (struct amdgpu_device *)handle;
+       struct amdgpu_device *adev = ip_block->adev;
 
        if (!adev->gmc.srbm_soft_reset)
                return 0;
index 7e2a523bbe1f16dc15226d525153abf8a6f62a82..e7f4f7138df0fc1a1ca33ce32cc9883d4236f6df 100644 (file)
@@ -1252,9 +1252,9 @@ static bool sdma_v3_0_check_soft_reset(struct amdgpu_ip_block *ip_block)
        }
 }
 
-static int sdma_v3_0_pre_soft_reset(void *handle)
+static int sdma_v3_0_pre_soft_reset(struct amdgpu_ip_block *ip_block)
 {
-       struct amdgpu_device *adev = (struct amdgpu_device *)handle;
+       struct amdgpu_device *adev = ip_block->adev;
        u32 srbm_soft_reset = 0;
 
        if (!adev->sdma.srbm_soft_reset)
index 573a2e194bb59a70a0baf37c4b62625e3fd50e7a..7cdf6a10607f21595088a18e63b50a817b1bd86a 100644 (file)
@@ -405,9 +405,9 @@ static bool tonga_ih_check_soft_reset(struct amdgpu_ip_block *ip_block)
        }
 }
 
-static int tonga_ih_pre_soft_reset(void *handle)
+static int tonga_ih_pre_soft_reset(struct amdgpu_ip_block *ip_block)
 {
-       struct amdgpu_device *adev = (struct amdgpu_device *)handle;
+       struct amdgpu_device *adev = ip_block->adev;
 
        if (!adev->irq.srbm_soft_reset)
                return 0;
index 7364cecca81a481becc978ed6a1cc0641c0eb268..9e6043f578057bb16dca55320813b41444847d9b 100644 (file)
@@ -1184,9 +1184,9 @@ static bool uvd_v6_0_check_soft_reset(struct amdgpu_ip_block *ip_block)
        }
 }
 
-static int uvd_v6_0_pre_soft_reset(void *handle)
+static int uvd_v6_0_pre_soft_reset(struct amdgpu_ip_block *ip_block)
 {
-       struct amdgpu_device *adev = (struct amdgpu_device *)handle;
+       struct amdgpu_device *adev = ip_block->adev;
 
        if (!adev->uvd.inst->srbm_soft_reset)
                return 0;
index 52d613b4cd84d0f2c0cf05b25ff09d47728119a5..eebdf7b2d6336a2b465308caebff23b084a17c08 100644 (file)
@@ -1506,9 +1506,9 @@ static bool uvd_v7_0_check_soft_reset(struct amdgpu_ip_block *ip_block)
        }
 }
 
-static int uvd_v7_0_pre_soft_reset(void *handle)
+static int uvd_v7_0_pre_soft_reset(struct amdgpu_ip_block *ip_block)
 {
-       struct amdgpu_device *adev = (struct amdgpu_device *)handle;
+       struct amdgpu_device *adev = ip_block->adev;
 
        if (!adev->uvd.inst[ring->me].srbm_soft_reset)
                return 0;
index 6a8f555ffc615c0c702c335b8668cc353ec2905f..6b7916c72193b515e3bd0f541ca7d299b725604d 100644 (file)
@@ -699,9 +699,9 @@ static int vce_v3_0_soft_reset(void *handle)
        return 0;
 }
 
-static int vce_v3_0_pre_soft_reset(void *handle)
+static int vce_v3_0_pre_soft_reset(struct amdgpu_ip_block *ip_block)
 {
-       struct amdgpu_device *adev = (struct amdgpu_device *)handle;
+       struct amdgpu_device *adev = ip_block->adev;
 
        if (!adev->vce.srbm_soft_reset)
                return 0;
index c89ae2d87b026045021e9901763ba24648b1ff95..83b7ce5e764fad5c9e2c283cae18666ec08327c7 100644 (file)
@@ -793,9 +793,9 @@ static int vce_v4_0_soft_reset(void *handle)
        return 0;
 }
 
-static int vce_v4_0_pre_soft_reset(void *handle)
+static int vce_v4_0_pre_soft_reset(struct amdgpu_ip_block *ip_block)
 {
-       struct amdgpu_device *adev = (struct amdgpu_device *)handle;
+       struct amdgpu_device *adev = ip_block->adev;
 
        if (!adev->vce.srbm_soft_reset)
                return 0;
index 1130dac8d17356d34eb91a162734b3dce256e8a5..15cd8288b9acc4fe36f9514ae96c4f69b071c9d1 100644 (file)
@@ -393,7 +393,7 @@ struct amd_ip_funcs {
        bool (*is_idle)(void *handle);
        int (*wait_for_idle)(void *handle);
        bool (*check_soft_reset)(struct amdgpu_ip_block *ip_block);
-       int (*pre_soft_reset)(void *handle);
+       int (*pre_soft_reset)(struct amdgpu_ip_block *ip_block);
        int (*soft_reset)(void *handle);
        int (*post_soft_reset)(void *handle);
        int (*set_clockgating_state)(void *handle,