]> git.ipfire.org Git - thirdparty/linux.git/commitdiff
drm/i915: s/dsb_color_vblank/dsb_color
authorChaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
Fri, 23 May 2025 06:20:37 +0000 (11:50 +0530)
committerAnimesh Manna <animesh.manna@intel.com>
Mon, 26 May 2025 07:48:16 +0000 (13:18 +0530)
With double buffer gamma registers in the mix, we need not wait for
vblank to execute gamma writes through dsb. Before we implement
that s/dsb_color_vblank/dsb_color.

Signed-off-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Animesh Manna <animesh.manna@intel.com>
Link: https://lore.kernel.org/r/20250523062041.166468-8-chaitanya.kumar.borah@intel.com
drivers/gpu/drm/i915/display/intel_atomic.c
drivers/gpu/drm/i915/display/intel_color.c
drivers/gpu/drm/i915/display/intel_display.c
drivers/gpu/drm/i915/display/intel_display_types.h

index e83feca5c9c9b50fcde61a31b4f61194f0acd11f..f85edb374c9750bac881b0a6a10db0535df3b36d 100644 (file)
@@ -274,7 +274,7 @@ intel_crtc_duplicate_state(struct drm_crtc *crtc)
        crtc_state->do_async_flip = false;
        crtc_state->fb_bits = 0;
        crtc_state->update_planes = 0;
-       crtc_state->dsb_color_vblank = NULL;
+       crtc_state->dsb_color = NULL;
        crtc_state->dsb_commit = NULL;
        crtc_state->use_dsb = false;
 
@@ -310,7 +310,7 @@ intel_crtc_destroy_state(struct drm_crtc *crtc,
 {
        struct intel_crtc_state *crtc_state = to_intel_crtc_state(state);
 
-       drm_WARN_ON(crtc->dev, crtc_state->dsb_color_vblank);
+       drm_WARN_ON(crtc->dev, crtc_state->dsb_color);
        drm_WARN_ON(crtc->dev, crtc_state->dsb_commit);
 
        __drm_atomic_helper_crtc_destroy_state(&crtc_state->uapi);
index 98dddf72c0eb9749d5b3c4a90edb73216615bbfd..bb2da3a53e9ca1ac0946f76b698dd4e06289c081 100644 (file)
@@ -1339,8 +1339,8 @@ static void ilk_lut_write(const struct intel_crtc_state *crtc_state,
 {
        struct intel_display *display = to_intel_display(crtc_state);
 
-       if (crtc_state->dsb_color_vblank)
-               intel_dsb_reg_write(crtc_state->dsb_color_vblank, reg, val);
+       if (crtc_state->dsb_color)
+               intel_dsb_reg_write(crtc_state->dsb_color, reg, val);
        else
                intel_de_write_fw(display, reg, val);
 }
@@ -1350,8 +1350,8 @@ static void ilk_lut_write_indexed(const struct intel_crtc_state *crtc_state,
 {
        struct intel_display *display = to_intel_display(crtc_state);
 
-       if (crtc_state->dsb_color_vblank)
-               intel_dsb_reg_write_indexed(crtc_state->dsb_color_vblank, reg, val);
+       if (crtc_state->dsb_color)
+               intel_dsb_reg_write_indexed(crtc_state->dsb_color, reg, val);
        else
                intel_de_write_fw(display, reg, val);
 }
@@ -1389,7 +1389,7 @@ static void ilk_load_lut_8(const struct intel_crtc_state *crtc_state,
        for (i = 0; i < 256; i++) {
                ilk_lut_write(crtc_state, LGC_PALETTE(pipe, i),
                              i9xx_lut_8(&lut[i]));
-               if (crtc_state->dsb_color_vblank)
+               if (crtc_state->dsb_color)
                        ilk_lut_write(crtc_state, LGC_PALETTE(pipe, i),
                                      i9xx_lut_8(&lut[i]));
        }
@@ -1917,7 +1917,7 @@ void intel_color_load_luts(const struct intel_crtc_state *crtc_state)
 {
        struct intel_display *display = to_intel_display(crtc_state);
 
-       if (crtc_state->dsb_color_vblank)
+       if (crtc_state->dsb_color)
                return;
 
        display->funcs.color->load_luts(crtc_state);
@@ -1982,39 +1982,39 @@ void intel_color_prepare_commit(struct intel_atomic_state *state,
        if (!crtc_state->pre_csc_lut && !crtc_state->post_csc_lut)
                return;
 
-       crtc_state->dsb_color_vblank = intel_dsb_prepare(state, crtc, INTEL_DSB_1, 1024);
-       if (!crtc_state->dsb_color_vblank)
+       crtc_state->dsb_color = intel_dsb_prepare(state, crtc, INTEL_DSB_1, 1024);
+       if (!crtc_state->dsb_color)
                return;
 
        display->funcs.color->load_luts(crtc_state);
 
        if (crtc_state->use_dsb) {
-               intel_vrr_send_push(crtc_state->dsb_color_vblank, crtc_state);
-               intel_dsb_wait_vblank_delay(state, crtc_state->dsb_color_vblank);
-               intel_vrr_check_push_sent(crtc_state->dsb_color_vblank, crtc_state);
-               intel_dsb_interrupt(crtc_state->dsb_color_vblank);
+               intel_vrr_send_push(crtc_state->dsb_color, crtc_state);
+               intel_dsb_wait_vblank_delay(state, crtc_state->dsb_color);
+               intel_vrr_check_push_sent(crtc_state->dsb_color, crtc_state);
+               intel_dsb_interrupt(crtc_state->dsb_color);
        }
 
-       intel_dsb_finish(crtc_state->dsb_color_vblank);
+       intel_dsb_finish(crtc_state->dsb_color);
 }
 
 void intel_color_cleanup_commit(struct intel_crtc_state *crtc_state)
 {
-       if (crtc_state->dsb_color_vblank) {
-               intel_dsb_cleanup(crtc_state->dsb_color_vblank);
-               crtc_state->dsb_color_vblank = NULL;
+       if (crtc_state->dsb_color) {
+               intel_dsb_cleanup(crtc_state->dsb_color);
+               crtc_state->dsb_color = NULL;
        }
 }
 
 void intel_color_wait_commit(const struct intel_crtc_state *crtc_state)
 {
-       if (crtc_state->dsb_color_vblank)
-               intel_dsb_wait(crtc_state->dsb_color_vblank);
+       if (crtc_state->dsb_color)
+               intel_dsb_wait(crtc_state->dsb_color);
 }
 
 bool intel_color_uses_dsb(const struct intel_crtc_state *crtc_state)
 {
-       return crtc_state->dsb_color_vblank;
+       return crtc_state->dsb_color;
 }
 
 static bool intel_can_preload_luts(struct intel_atomic_state *state,
index c894e4d0d4881c18a4df57952b5a5241a81f2cc3..f261ceca5a3a5f2017c450880fdd67c9ce115101 100644 (file)
@@ -7192,7 +7192,7 @@ static void intel_atomic_dsb_finish(struct intel_atomic_state *state,
        struct intel_crtc_state *new_crtc_state =
                intel_atomic_get_new_crtc_state(state, crtc);
 
-       if (!new_crtc_state->use_dsb && !new_crtc_state->dsb_color_vblank)
+       if (!new_crtc_state->use_dsb && !new_crtc_state->dsb_color)
                return;
 
        /*
@@ -7239,7 +7239,7 @@ static void intel_atomic_dsb_finish(struct intel_atomic_state *state,
                        skl_detach_scalers(new_crtc_state->dsb_commit,
                                           new_crtc_state);
 
-               if (!new_crtc_state->dsb_color_vblank) {
+               if (!new_crtc_state->dsb_color) {
                        intel_dsb_wait_vblanks(new_crtc_state->dsb_commit, 1);
 
                        intel_vrr_send_push(new_crtc_state->dsb_commit, new_crtc_state);
@@ -7249,9 +7249,9 @@ static void intel_atomic_dsb_finish(struct intel_atomic_state *state,
                }
        }
 
-       if (new_crtc_state->dsb_color_vblank)
+       if (new_crtc_state->dsb_color)
                intel_dsb_chain(state, new_crtc_state->dsb_commit,
-                               new_crtc_state->dsb_color_vblank, true);
+                               new_crtc_state->dsb_color, true);
 
        intel_dsb_finish(new_crtc_state->dsb_commit);
 }
@@ -7440,7 +7440,7 @@ static void intel_atomic_commit_tail(struct intel_atomic_state *state)
                 *
                 * FIXME get rid of this funny new->old swapping
                 */
-               old_crtc_state->dsb_color_vblank = fetch_and_zero(&new_crtc_state->dsb_color_vblank);
+               old_crtc_state->dsb_color = fetch_and_zero(&new_crtc_state->dsb_color);
                old_crtc_state->dsb_commit = fetch_and_zero(&new_crtc_state->dsb_commit);
        }
 
index b8836d29a72143e70da8a71c6192df118bd4d121..fc1eda590da85d9a58866df4318319e3ae578baa 100644 (file)
@@ -1297,7 +1297,7 @@ struct intel_crtc_state {
        enum transcoder mst_master_transcoder;
 
        /* For DSB based pipe updates */
-       struct intel_dsb *dsb_color_vblank, *dsb_commit;
+       struct intel_dsb *dsb_color, *dsb_commit;
        bool use_dsb;
 
        u32 psr2_man_track_ctl;