#include "pinctrl-starfive-jh7110.h"
#define JH7110_AON_NGPIO 4
-#define JH7110_AON_GC_BASE 64
#define JH7110_AON_REGS_NUM 37
.pins = jh7110_aon_pins,
.npins = ARRAY_SIZE(jh7110_aon_pins),
.ngpios = JH7110_AON_NGPIO,
- .gc_base = JH7110_AON_GC_BASE,
.dout_reg_base = JH7110_AON_DOUT,
.dout_mask = GENMASK(3, 0),
.doen_reg_base = JH7110_AON_DOEN,
#include "pinctrl-starfive-jh7110.h"
#define JH7110_SYS_NGPIO 64
-#define JH7110_SYS_GC_BASE 0
#define JH7110_SYS_REGS_NUM 174
.pins = jh7110_sys_pins,
.npins = ARRAY_SIZE(jh7110_sys_pins),
.ngpios = JH7110_SYS_NGPIO,
- .gc_base = JH7110_SYS_GC_BASE,
.dout_reg_base = JH7110_SYS_DOUT,
.dout_mask = GENMASK(6, 0),
.doen_reg_base = JH7110_SYS_DOEN,
sfp->gc.set = jh7110_gpio_set;
sfp->gc.set_config = jh7110_gpio_set_config;
sfp->gc.add_pin_ranges = jh7110_gpio_add_pin_ranges;
- sfp->gc.base = info->gc_base;
+ sfp->gc.base = -1;
sfp->gc.ngpio = info->ngpios;
jh7110_irq_chip.name = sfp->gc.label;
const struct pinctrl_pin_desc *pins;
unsigned int npins;
unsigned int ngpios;
- unsigned int gc_base;
/* gpio dout/doen/din/gpioinput register */
unsigned int dout_reg_base;