drm/i915/dp_mst: Fix disabling the minimum HBlank time

Disable the minimum HBlank time only on LNL+, where this functionality
and corresponding register exists.

Bspec: 74379
Fixes: a5ebe00c2ace ("drm/i915/dp: Guarantee a minimum HBlank time")
Cc: Arun R Murthy <arun.r.murthy@intel.com>
Cc: Suraj Kandpal <suraj.kandpal@intel.com>
Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20250206164624.3185280-1-imre.deak@intel.com

diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c
index 2324ca8f6096283857aea582c3a284f5e8d3fd16..411b7322d460b1a9a8a2265704c3734d61b232aa 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
@@ -1006,7 +1006,8 @@ static void mst_stream_disable(struct intel_atomic_state *state,
 
        intel_dp_sink_disable_decompression(state, connector, old_crtc_state);
 
-       intel_de_write(display, DP_MIN_HBLANK_CTL(trans), 0x00);
+       if (DISPLAY_VER(display) >= 20)
+               intel_de_write(display, DP_MIN_HBLANK_CTL(trans), 0);
 }
 
 static void mst_stream_post_disable(struct intel_atomic_state *state,