media: qcom: camss: add support for QCM2290 camss

The camera subsystem for QCM2290 which is based on Spectra 340.

Signed-off-by: Loic Poulain <loic.poulain@oss.qualcomm.com>
Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Signed-off-by: Bryan O'Donoghue <bod@kernel.org>
Signed-off-by: Hans Verkuil <hverkuil+cisco@kernel.org>

diff --git a/drivers/media/platform/qcom/camss/camss-vfe.c b/drivers/media/platform/qcom/camss/camss-vfe.c
index 4bca6c3abaff9b898ea879674a3ff8f3592d3139..c575c9767492ecef05934f6c4241e64699251c0d 100644 (file)
--- a/drivers/media/platform/qcom/camss/camss-vfe.c
+++ b/drivers/media/platform/qcom/camss/camss-vfe.c
@@ -340,6 +340,7 @@ static u32 vfe_src_pad_code(struct vfe_line *line, u32 sink_code,
                }
                break;
        case CAMSS_660:
+       case CAMSS_2290:
        case CAMSS_7280:
        case CAMSS_8x96:
        case CAMSS_8250:
@@ -1969,6 +1970,7 @@ static int vfe_bpl_align(struct vfe_device *vfe)
        int ret = 8;
 
        switch (vfe->camss->res->version) {
+       case CAMSS_2290:
        case CAMSS_7280:
        case CAMSS_8250:
        case CAMSS_8280XP:

diff --git a/drivers/media/platform/qcom/camss/camss.c b/drivers/media/platform/qcom/camss/camss.c
index e08e70b93824baa5714b3a736bc1d05405253aaa..2f67c46eb74fd9de51546d594ad18d9a4180f26e 100644 (file)
--- a/drivers/media/platform/qcom/camss/camss.c
+++ b/drivers/media/platform/qcom/camss/camss.c
@@ -515,6 +515,140 @@ static const struct camss_subdev_resources vfe_res_8x96[] = {
        }
 };
 
+static const struct camss_subdev_resources csiphy_res_2290[] = {
+       /* CSIPHY0 */
+       {
+               .regulators = { "vdd-csiphy-1p2", "vdd-csiphy-1p8" },
+               .clock = { "top_ahb", "ahb", "csiphy0", "csiphy0_timer" },
+               .clock_rate = { { 0 },
+                               { 0 },
+                               { 240000000, 341330000, 384000000 },
+                               { 100000000, 200000000, 268800000 }  },
+               .reg = { "csiphy0" },
+               .interrupt = { "csiphy0" },
+               .csiphy = {
+                       .id = 0,
+                       .hw_ops = &csiphy_ops_3ph_1_0,
+                       .formats = &csiphy_formats_sdm845
+               }
+       },
+
+       /* CSIPHY1 */
+       {
+               .regulators = { "vdd-csiphy-1p2", "vdd-csiphy-1p8" },
+               .clock = { "top_ahb", "ahb", "csiphy1", "csiphy1_timer" },
+               .clock_rate = { { 0 },
+                               { 0 },
+                               { 240000000, 341330000, 384000000 },
+                               { 100000000, 200000000, 268800000 }  },
+               .reg = { "csiphy1" },
+               .interrupt = { "csiphy1" },
+               .csiphy = {
+                       .id = 1,
+                       .hw_ops = &csiphy_ops_3ph_1_0,
+                       .formats = &csiphy_formats_sdm845
+               }
+       }
+};
+
+static const struct camss_subdev_resources csid_res_2290[] = {
+       /* CSID0 */
+       {
+               .regulators = {},
+               .clock = { "top_ahb", "ahb", "csi0", "vfe0_cphy_rx", "vfe0" },
+               .clock_rate = { { 0 },
+                               { 0 },
+                               { 192000000, 240000000, 384000000, 426400000 },
+                               { 0 },
+                               { 0 } },
+               .reg = { "csid0" },
+               .interrupt = { "csid0" },
+               .csid = {
+                       .hw_ops = &csid_ops_340,
+                       .parent_dev_ops = &vfe_parent_dev_ops,
+                       .formats = &csid_formats_gen2
+               }
+       },
+
+       /* CSID1 */
+       {
+               .regulators = {},
+               .clock = { "top_ahb", "ahb", "csi1", "vfe1_cphy_rx", "vfe1" },
+               .clock_rate = { { 0 },
+                               { 0 },
+                               { 192000000, 240000000, 384000000, 426400000 },
+                               { 0 },
+                               { 0 } },
+               .reg = { "csid1" },
+               .interrupt = { "csid1" },
+               .csid = {
+                       .hw_ops = &csid_ops_340,
+                       .parent_dev_ops = &vfe_parent_dev_ops,
+                       .formats = &csid_formats_gen2
+               }
+       }
+};
+
+static const struct camss_subdev_resources vfe_res_2290[] = {
+       /* VFE0 */
+       {
+               .regulators = {},
+               .clock = { "top_ahb", "ahb", "axi", "vfe0", "camnoc_rt_axi", "camnoc_nrt_axi" },
+               .clock_rate = { { 0 },
+                               { 0 },
+                               { 0 },
+                               { 19200000, 153600000, 192000000, 256000000, 384000000, 460800000 },
+                               { 0 },
+                               { 0 }, },
+               .reg = { "vfe0" },
+               .interrupt = { "vfe0" },
+               .vfe = {
+                       .line_num = 4,
+                       .hw_ops = &vfe_ops_340,
+                       .formats_rdi = &vfe_formats_rdi_845,
+                       .formats_pix = &vfe_formats_pix_845
+               }
+       },
+
+       /* VFE1 */
+       {
+               .regulators = {},
+               .clock = { "top_ahb", "ahb", "axi", "vfe1", "camnoc_rt_axi", "camnoc_nrt_axi" },
+               .clock_rate = { { 0 },
+                               { 0 },
+                               { 0 },
+                               { 19200000, 153600000, 192000000, 256000000, 384000000, 460800000 },
+                               { 0 },
+                               { 0 }, },
+               .reg = { "vfe1" },
+               .interrupt = { "vfe1" },
+               .vfe = {
+                       .line_num = 4,
+                       .hw_ops = &vfe_ops_340,
+                       .formats_rdi = &vfe_formats_rdi_845,
+                       .formats_pix = &vfe_formats_pix_845
+               }
+       },
+};
+
+static const struct resources_icc icc_res_2290[] = {
+       {
+               .name = "ahb",
+               .icc_bw_tbl.avg = 150000,
+               .icc_bw_tbl.peak = 300000,
+       },
+       {
+               .name = "hf_mnoc",
+               .icc_bw_tbl.avg = 2097152,
+               .icc_bw_tbl.peak = 3000000,
+       },
+       {
+               .name = "sf_mnoc",
+               .icc_bw_tbl.avg = 2097152,
+               .icc_bw_tbl.peak = 3000000,
+       },
+};
+
 static const struct camss_subdev_resources csiphy_res_660[] = {
        /* CSIPHY0 */
        {
@@ -3752,6 +3886,19 @@ static const struct camss_resources msm8996_resources = {
        .link_entities = camss_link_entities
 };
 
+static const struct camss_resources qcm2290_resources = {
+       .version = CAMSS_2290,
+       .csiphy_res = csiphy_res_2290,
+       .csid_res = csid_res_2290,
+       .vfe_res = vfe_res_2290,
+       .icc_res = icc_res_2290,
+       .icc_path_num = ARRAY_SIZE(icc_res_2290),
+       .csiphy_num = ARRAY_SIZE(csiphy_res_2290),
+       .csid_num = ARRAY_SIZE(csid_res_2290),
+       .vfe_num = ARRAY_SIZE(vfe_res_2290),
+       .link_entities = camss_link_entities
+};
+
 static const struct camss_resources sdm660_resources = {
        .version = CAMSS_660,
        .csiphy_res = csiphy_res_660,
@@ -3864,6 +4011,7 @@ static const struct of_device_id camss_dt_match[] = {
        { .compatible = "qcom,msm8916-camss", .data = &msm8916_resources },
        { .compatible = "qcom,msm8953-camss", .data = &msm8953_resources },
        { .compatible = "qcom,msm8996-camss", .data = &msm8996_resources },
+       { .compatible = "qcom,qcm2290-camss", .data = &qcm2290_resources },
        { .compatible = "qcom,sc7280-camss", .data = &sc7280_resources },
        { .compatible = "qcom,sc8280xp-camss", .data = &sc8280xp_resources },
        { .compatible = "qcom,sdm660-camss", .data = &sdm660_resources },