RISC-V: Bugfix for RVV overloaded intrinsic ICE in function checker

There is another corn case when similar as below example:

void test (void)
{
  __riscv_vaadd ();
}

We report error when overloaded function with empty args.  For example:

test.c: In function 'foo':
test.c:8:3: error: no matching function call to '__riscv_vaadd' with empty args
    8 |   __riscv_vaadd ();
      |   ^~~~~~~~~~~~~~~~~~~~

Unfortunately, it will meet another ICE similar to below after above
message.  The underlying build function checker will have zero args
and break some assumption of the function checker.  For example, the
count of args is not less than 2.

ice.c: In function ‘foo’:
ice.c:8:3: internal compiler error: in require_immediate, at
config/riscv/riscv-vector-builtins.cc:4252
    8 |   __riscv_vaadd ();
      |   ^~~~~~~~~~~~~
0x20b36ac riscv_vector::function_checker::require_immediate(unsigned
int, long, long) const
        .../__RISC-V_BUILD__/../gcc/config/riscv/riscv-vector-builtins.cc:4252
0x20b890c riscv_vector::alu_def::check(riscv_vector::function_checker&) const
        .../__RISC-V_BUILD__/../gcc/config/riscv/riscv-vector-builtins-shapes.cc:387
0x20b38d7 riscv_vector::function_checker::check()
        .../__RISC-V_BUILD__/../gcc/config/riscv/riscv-vector-builtins.cc:4315
0x20b4876 riscv_vector::check_builtin_call(unsigned int, vec<unsigned int, va_heap, vl_ptr>,
        .../__RISC-V_BUILD__/../gcc/config/riscv/riscv-vector-builtins.cc:4605
0x2069393 riscv_check_builtin_call
        .../__RISC-V_BUILD__/../gcc/config/riscv/riscv-c.cc:227

Below test are passed for this patch.

* The riscv regression tests.

	PR target/113766

gcc/ChangeLog:

	* config/riscv/riscv-vector-builtins-shapes.cc (struct alu_def): Make
	sure the c.arg_num is >= 2 before checking.
	(struct build_frm_base): Ditto.
	(struct narrow_alu_def): Ditto.

gcc/testsuite/ChangeLog:

	* gcc.target/riscv/rvv/base/pr113766-1.c: Add new cases.

Signed-off-by: Pan Li <pan2.li@intel.com>

diff --git a/gcc/config/riscv/riscv-vector-builtins-shapes.cc b/gcc/config/riscv/riscv-vector-builtins-shapes.cc
index 8e90b17a94b9dcaa158cd49c9e4d667fb26ad7c8..c5ffcc1f2c4c0d90a2b4ff1d1704874a9f868451 100644 (file)
--- a/gcc/config/riscv/riscv-vector-builtins-shapes.cc
+++ b/gcc/config/riscv/riscv-vector-builtins-shapes.cc
@@ -383,7 +383,10 @@ struct alu_def : public build_base
     /* Check whether rounding mode argument is a valid immediate.  */
     if (c.base->has_rounding_mode_operand_p ())
       {
-       if (!c.any_type_float_p ())
+       /* Some invalid overload intrinsic like below will have zero for
+          c.arg_num ().  Thus, make sure arg_num is big enough here.
+          __riscv_vaadd () will make c.arg_num () == 0.  */
+       if (!c.any_type_float_p () && c.arg_num () >= 2)
          return c.require_immediate (c.arg_num () - 2, VXRM_RNU, VXRM_ROD);
        /* TODO: We will support floating-point intrinsic modeling
           rounding mode in the future.  */
@@ -411,8 +414,11 @@ struct build_frm_base : public build_base
   {
     gcc_assert (c.any_type_float_p ());
 
-    /* Check whether rounding mode argument is a valid immediate.  */
-    if (c.base->has_rounding_mode_operand_p ())
+    /* Check whether rounding mode argument is a valid immediate.
+       Some invalid overload intrinsic like below will have zero for
+       c.arg_num ().  Thus, make sure arg_num is big enough here.
+       __riscv_vaadd () will make c.arg_num () == 0.  */
+    if (c.base->has_rounding_mode_operand_p () && c.arg_num () >= 2)
       {
        unsigned int frm_num = c.arg_num () - 2;
 
@@ -679,7 +685,10 @@ struct narrow_alu_def : public build_base
     /* Check whether rounding mode argument is a valid immediate.  */
     if (c.base->has_rounding_mode_operand_p ())
       {
-       if (!c.any_type_float_p ())
+       /* Some invalid overload intrinsic like below will have zero for
+          c.arg_num ().  Thus, make sure arg_num is big enough here.
+          __riscv_vaadd () will make c.arg_num () == 0.  */
+       if (!c.any_type_float_p () && c.arg_num () >= 2)
          return c.require_immediate (c.arg_num () - 2, VXRM_RNU, VXRM_ROD);
        /* TODO: We will support floating-point intrinsic modeling
           rounding mode in the future.  */

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/pr113766-1.c b/gcc/testsuite/gcc.target/riscv/rvv/base/pr113766-1.c
index bd4943b0b7e537a1b1c8e40508e01e03a0bc1e5c..fd674a8895c093113377301fd8589c376eeebb23 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/base/pr113766-1.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/base/pr113766-1.c
@@ -82,4 +82,20 @@ test ()
 
   __riscv_vfredosum ();         /* { dg-error {no matching function call to '__riscv_vfredosum' with empty args} } */
   __riscv_vfredosum_tu ();      /* { dg-error {no matching function call to '__riscv_vfredosum_tu' with empty args} } */
+
+  __riscv_vaadd ();             /* { dg-error {no matching function call to '__riscv_vaadd' with empty args} } */
+
+  __riscv_vaaddu ();            /* { dg-error {no matching function call to '__riscv_vaaddu' with empty args} } */
+
+  __riscv_vadc ();              /* { dg-error {no matching function call to '__riscv_vadc' with empty args} } */
+
+  __riscv_vnmsac ();            /* { dg-error {no matching function call to '__riscv_vnmsac' with empty args} } */
+
+  __riscv_vnsrl ();             /* { dg-error {no matching function call to '__riscv_vnsrl' with empty args} } */
+
+  __riscv_vfnmadd ();           /* { dg-error {no matching function call to '__riscv_vfnmadd' with empty args} } */
+
+  __riscv_vfwsub_vv ();         /* { dg-error {no matching function call to '__riscv_vfwsub_vv' with empty args} } */
+
+  __riscv_vfwredosum ();        /* { dg-error {no matching function call to '__riscv_vfwredosum' with empty args} } */
 }