--- /dev/null
+From ea9da67e2add7bd5f1e4b38dc2404480e711f4d8 Mon Sep 17 00:00:00 2001
+From: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
+Date: Thu, 21 Nov 2024 16:13:25 +0900
+Subject: ARM: dts: socfpga: sodia: Fix mdio bus probe and PHY address
+
+From: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
+
+commit ea9da67e2add7bd5f1e4b38dc2404480e711f4d8 upstream.
+
+On SoCFPGA/Sodia board, mdio bus cannot be probed, so the PHY cannot be
+found and the network device does not work.
+
+```
+stmmaceth ff702000.ethernet eth0: __stmmac_open: Cannot attach to PHY (error: -19)
+```
+
+To probe the mdio bus, add "snps,dwmac-mdio" as compatible string of the
+mdio bus. Also the PHY address connected to this board is 4. Therefore,
+change to 4.
+
+Cc: stable@vger.kernel.org # 6.3+
+Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
+Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_sodia.dts | 6 ++++--
+ 1 file changed, 4 insertions(+), 2 deletions(-)
+
+--- a/arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_sodia.dts
++++ b/arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_sodia.dts
+@@ -66,8 +66,10 @@
+ mdio0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+- phy0: ethernet-phy@0 {
+- reg = <0>;
++ compatible = "snps,dwmac-mdio";
++
++ phy0: ethernet-phy@4 {
++ reg = <4>;
+ rxd0-skew-ps = <0>;
+ rxd1-skew-ps = <0>;
+ rxd2-skew-ps = <0>;
--- /dev/null
+From 48b51799a5461707705454568453618cdd7307f4 Mon Sep 17 00:00:00 2001
+From: Josua Mayer <josua@solid-run.com>
+Date: Thu, 11 Sep 2025 20:28:05 +0200
+Subject: arm64: dts: marvell: cn9132-clearfog: disable eMMC high-speed modes
+
+From: Josua Mayer <josua@solid-run.com>
+
+commit 48b51799a5461707705454568453618cdd7307f4 upstream.
+
+Similar to MacchiatoBIN the high-speed modes are unstable on the CN9132
+CEX-7 module, leading to failed transactions under normal use.
+
+Disable all high-speed modes including UHS.
+
+Additionally add no-sdio and non-removable properties as appropriate for
+eMMC.
+
+Fixes: e9ff907f4076 ("arm64: dts: add description for solidrun cn9132 cex7 module and clearfog board")
+Cc: stable@vger.kernel.org
+Signed-off-by: Josua Mayer <josua@solid-run.com>
+Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ arch/arm64/boot/dts/marvell/cn9132-sr-cex7.dtsi | 8 ++++++++
+ 1 file changed, 8 insertions(+)
+
+diff --git a/arch/arm64/boot/dts/marvell/cn9132-sr-cex7.dtsi b/arch/arm64/boot/dts/marvell/cn9132-sr-cex7.dtsi
+index afc041c1c448..bb2bb47fd77c 100644
+--- a/arch/arm64/boot/dts/marvell/cn9132-sr-cex7.dtsi
++++ b/arch/arm64/boot/dts/marvell/cn9132-sr-cex7.dtsi
+@@ -137,6 +137,14 @@ &ap_sdhci0 {
+ pinctrl-0 = <&ap_mmc0_pins>;
+ pinctrl-names = "default";
+ vqmmc-supply = <&v_1_8>;
++ /*
++ * Not stable in HS modes - phy needs "more calibration", so disable
++ * UHS (by preventing voltage switch), SDR104, SDR50 and DDR50 modes.
++ */
++ no-1-8-v;
++ no-sd;
++ no-sdio;
++ non-removable;
+ status = "okay";
+ };
+
+--
+2.51.0
+
--- /dev/null
+From 794a066688038df46c01e177cc6faebded0acba4 Mon Sep 17 00:00:00 2001
+From: Josua Mayer <josua@solid-run.com>
+Date: Thu, 11 Sep 2025 20:28:06 +0200
+Subject: arm64: dts: marvell: cn9132-clearfog: fix multi-lane pci x2 and x4 ports
+
+From: Josua Mayer <josua@solid-run.com>
+
+commit 794a066688038df46c01e177cc6faebded0acba4 upstream.
+
+The mvebu-comphy driver does not currently know how to pass correct
+lane-count to ATF while configuring the serdes lanes.
+
+This causes the system to hard reset during reconfiguration, if a pci
+card is present and has established a link during bootloader.
+
+Remove the comphy handles from the respective pci nodes to avoid runtime
+reconfiguration, relying solely on bootloader configuration - while
+avoiding the hard reset.
+
+When bootloader has configured the lanes correctly, the pci ports are
+functional under Linux.
+
+This issue may be addressed in the comphy driver at a future point.
+
+Fixes: e9ff907f4076 ("arm64: dts: add description for solidrun cn9132 cex7 module and clearfog board")
+Cc: stable@vger.kernel.org
+Signed-off-by: Josua Mayer <josua@solid-run.com>
+Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ arch/arm64/boot/dts/marvell/cn9132-clearfog.dts | 16 ++++++++++++++--
+ 1 file changed, 14 insertions(+), 2 deletions(-)
+
+diff --git a/arch/arm64/boot/dts/marvell/cn9132-clearfog.dts b/arch/arm64/boot/dts/marvell/cn9132-clearfog.dts
+index 115c55d73786..6f237d3542b9 100644
+--- a/arch/arm64/boot/dts/marvell/cn9132-clearfog.dts
++++ b/arch/arm64/boot/dts/marvell/cn9132-clearfog.dts
+@@ -413,7 +413,13 @@ fixed-link {
+ /* SRDS #0,#1,#2,#3 - PCIe */
+ &cp0_pcie0 {
+ num-lanes = <4>;
+- phys = <&cp0_comphy0 0>, <&cp0_comphy1 0>, <&cp0_comphy2 0>, <&cp0_comphy3 0>;
++ /*
++ * The mvebu-comphy driver does not currently know how to pass correct
++ * lane-count to ATF while configuring the serdes lanes.
++ * Rely on bootloader configuration only.
++ *
++ * phys = <&cp0_comphy0 0>, <&cp0_comphy1 0>, <&cp0_comphy2 0>, <&cp0_comphy3 0>;
++ */
+ status = "okay";
+ };
+
+@@ -475,7 +481,13 @@ &cp1_eth0 {
+ /* SRDS #0,#1 - PCIe */
+ &cp1_pcie0 {
+ num-lanes = <2>;
+- phys = <&cp1_comphy0 0>, <&cp1_comphy1 0>;
++ /*
++ * The mvebu-comphy driver does not currently know how to pass correct
++ * lane-count to ATF while configuring the serdes lanes.
++ * Rely on bootloader configuration only.
++ *
++ * phys = <&cp1_comphy0 0>, <&cp1_comphy1 0>;
++ */
+ status = "okay";
+ };
+
+--
+2.51.0
+
--- /dev/null
+From d0ca0df179c4b21e2a6c4a4fb637aa8fa14575cb Mon Sep 17 00:00:00 2001
+From: Eric Biggers <ebiggers@kernel.org>
+Date: Wed, 24 Sep 2025 13:18:22 -0700
+Subject: crypto: af_alg - Fix incorrect boolean values in af_alg_ctx
+
+From: Eric Biggers <ebiggers@kernel.org>
+
+commit d0ca0df179c4b21e2a6c4a4fb637aa8fa14575cb upstream.
+
+Commit 1b34cbbf4f01 ("crypto: af_alg - Disallow concurrent writes in
+af_alg_sendmsg") changed some fields from bool to 1-bit bitfields of
+type u32.
+
+However, some assignments to these fields, specifically 'more' and
+'merge', assign values greater than 1. These relied on C's implicit
+conversion to bool, such that zero becomes false and nonzero becomes
+true.
+
+With a 1-bit bitfields of type u32 instead, mod 2 of the value is taken
+instead, resulting in 0 being assigned in some cases when 1 was intended.
+
+Fix this by restoring the bool type.
+
+Fixes: 1b34cbbf4f01 ("crypto: af_alg - Disallow concurrent writes in af_alg_sendmsg")
+Cc: stable@vger.kernel.org
+Signed-off-by: Eric Biggers <ebiggers@kernel.org>
+Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ include/crypto/if_alg.h | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/include/crypto/if_alg.h
++++ b/include/crypto/if_alg.h
+@@ -152,7 +152,7 @@ struct af_alg_ctx {
+ size_t used;
+ atomic_t rcvused;
+
+- u32 more:1,
++ bool more:1,
+ merge:1,
+ enc:1,
+ write:1,
--- /dev/null
+From c7c31f8dc54aa3c9b2c994b5f1ff7e740a654e97 Mon Sep 17 00:00:00 2001
+From: Nirmoy Das <nirmoyd@nvidia.com>
+Date: Wed, 17 Sep 2025 12:43:46 -0700
+Subject: drm/ast: Use msleep instead of mdelay for edid read
+
+From: Nirmoy Das <nirmoyd@nvidia.com>
+
+commit c7c31f8dc54aa3c9b2c994b5f1ff7e740a654e97 upstream.
+
+The busy-waiting in `mdelay()` can cause CPU stalls and kernel timeouts
+during boot.
+
+Signed-off-by: Nirmoy Das <nirmoyd@nvidia.com>
+Reviewed-by: Thomas Zimmermann <tzimmermann@suse.de>
+Tested-by: Carol L Soto csoto@nvidia.com<mailto:csoto@nvidia.com>
+Fixes: 594e9c04b586 ("drm/ast: Create the driver for ASPEED proprietory Display-Port")
+Cc: KuoHsiang Chou <kuohsiang_chou@aspeedtech.com>
+Cc: Thomas Zimmermann <tzimmermann@suse.de>
+Cc: Dave Airlie <airlied@redhat.com>
+Cc: Jocelyn Falempe <jfalempe@redhat.com>
+Cc: dri-devel@lists.freedesktop.org
+Cc: <stable@vger.kernel.org> # v5.19+
+Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de>
+Link: https://lore.kernel.org/r/20250917194346.2905522-1-nirmoyd@nvidia.com
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/gpu/drm/ast/ast_dp.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/drivers/gpu/drm/ast/ast_dp.c
++++ b/drivers/gpu/drm/ast/ast_dp.c
+@@ -79,7 +79,7 @@ static int ast_astdp_read_edid_block(voi
+ * 3. The Delays are often longer a lot when system resume from S3/S4.
+ */
+ if (j)
+- mdelay(j + 1);
++ msleep(j + 1);
+
+ /* Wait for EDID offset to show up in mirror register */
+ vgacrd7 = ast_get_index_reg(ast, AST_IO_VGACRI, 0xd7);
i40e-add-max-boundary-check-for-vf-filters.patch
i40e-add-mask-to-apply-valid-bits-for-itr_idx.patch
i40e-improve-vf-mac-filters-accounting.patch
+crypto-af_alg-fix-incorrect-boolean-values-in-af_alg_ctx.patch
+tracing-dynevent-add-a-missing-lockdown-check-on-dynevent.patch
+arm-dts-socfpga-sodia-fix-mdio-bus-probe-and-phy-address.patch
+arm64-dts-marvell-cn9132-clearfog-disable-emmc-high-speed-modes.patch
+arm64-dts-marvell-cn9132-clearfog-fix-multi-lane-pci-x2-and-x4-ports.patch
+drm-ast-use-msleep-instead-of-mdelay-for-edid-read.patch
--- /dev/null
+From 456c32e3c4316654f95f9d49c12cbecfb77d5660 Mon Sep 17 00:00:00 2001
+From: "Masami Hiramatsu (Google)" <mhiramat@kernel.org>
+Date: Fri, 19 Sep 2025 10:15:56 +0900
+Subject: tracing: dynevent: Add a missing lockdown check on dynevent
+
+From: Masami Hiramatsu (Google) <mhiramat@kernel.org>
+
+commit 456c32e3c4316654f95f9d49c12cbecfb77d5660 upstream.
+
+Since dynamic_events interface on tracefs is compatible with
+kprobe_events and uprobe_events, it should also check the lockdown
+status and reject if it is set.
+
+Link: https://lore.kernel.org/all/175824455687.45175.3734166065458520748.stgit@devnote2/
+
+Fixes: 17911ff38aa5 ("tracing: Add locked_down checks to the open calls of files created for tracefs")
+Signed-off-by: Masami Hiramatsu (Google) <mhiramat@kernel.org>
+Cc: stable@vger.kernel.org
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ kernel/trace/trace_dynevent.c | 4 ++++
+ 1 file changed, 4 insertions(+)
+
+--- a/kernel/trace/trace_dynevent.c
++++ b/kernel/trace/trace_dynevent.c
+@@ -239,6 +239,10 @@ static int dyn_event_open(struct inode *
+ {
+ int ret;
+
++ ret = security_locked_down(LOCKDOWN_TRACEFS);
++ if (ret)
++ return ret;
++
+ ret = tracing_check_open_get_tr(NULL);
+ if (ret)
+ return ret;
projects / thirdparty / kernel / stable-queue.git / commitdiff
