--- /dev/null
+From 5087f51da805f53cba7366f70d596e7bde2a5486 Mon Sep 17 00:00:00 2001
+From: Emil Velikov <emil.l.velikov@gmail.com>
+Date: Fri, 23 Aug 2013 18:43:42 +0100
+Subject: drm/nv50/disp: prevent false output detection on the original nv50
+
+From: Emil Velikov <emil.l.velikov@gmail.com>
+
+commit 5087f51da805f53cba7366f70d596e7bde2a5486 upstream.
+
+Commit ea9197cc323839ef3d5280c0453b2c622caa6bc7 effectively enabled the
+use of an improved DAC detection code, but introduced a regression on
+the original nv50 chipset, causing a ghost monitor to be detected.
+
+v2 (Ben Skeggs): the offending line was likely a thinko, removed it for
+all chipsets (tested nv50 and nve6 to cover entire range) and added
+some additional debugging.
+
+Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=67382
+Tested-by: Martin Peres <martin.peres@labri.fr>
+Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
+Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/gpu/drm/nouveau/core/engine/disp/dacnv50.c | 15 ++++++++++-----
+ 1 file changed, 10 insertions(+), 5 deletions(-)
+
+--- a/drivers/gpu/drm/nouveau/core/engine/disp/dacnv50.c
++++ b/drivers/gpu/drm/nouveau/core/engine/disp/dacnv50.c
+@@ -49,18 +49,23 @@ int
+ nv50_dac_sense(struct nv50_disp_priv *priv, int or, u32 loadval)
+ {
+ const u32 doff = (or * 0x800);
+- int load = -EINVAL;
++
+ nv_mask(priv, 0x61a004 + doff, 0x807f0000, 0x80150000);
+ nv_wait(priv, 0x61a004 + doff, 0x80000000, 0x00000000);
++
+ nv_wr32(priv, 0x61a00c + doff, 0x00100000 | loadval);
+ mdelay(9);
+ udelay(500);
+- nv_wr32(priv, 0x61a00c + doff, 0x80000000);
+- load = (nv_rd32(priv, 0x61a00c + doff) & 0x38000000) >> 27;
+- nv_wr32(priv, 0x61a00c + doff, 0x00000000);
++ loadval = nv_mask(priv, 0x61a00c + doff, 0xffffffff, 0x00000000);
++
+ nv_mask(priv, 0x61a004 + doff, 0x807f0000, 0x80550000);
+ nv_wait(priv, 0x61a004 + doff, 0x80000000, 0x00000000);
+- return load;
++
++ nv_debug(priv, "DAC%d sense: 0x%08x\n", or, loadval);
++ if (!(loadval & 0x80000000))
++ return -ETIMEDOUT;
++
++ return (loadval & 0x38000000) >> 27;
+ }
+
+ int
--- /dev/null
+From 0431b2742f8e7755f3bbf5924900d12973412e94 Mon Sep 17 00:00:00 2001
+From: Alex Deucher <alexander.deucher@amd.com>
+Date: Mon, 10 Jun 2013 15:51:21 -0400
+Subject: drm/radeon: add berlin pci ids
+
+From: Alex Deucher <alexander.deucher@amd.com>
+
+commit 0431b2742f8e7755f3bbf5924900d12973412e94 upstream.
+
+This adds the pci ids for the berlin GPU core.
+
+Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ include/drm/drm_pciids.h | 18 ++++++++++++++++++
+ 1 file changed, 18 insertions(+)
+
+--- a/include/drm/drm_pciids.h
++++ b/include/drm/drm_pciids.h
+@@ -1,4 +1,22 @@
+ #define radeon_PCI_IDS \
++ {0x1002, 0x1304, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_KAVERI|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \
++ {0x1002, 0x1305, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_KAVERI|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \
++ {0x1002, 0x1306, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_KAVERI|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \
++ {0x1002, 0x1307, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_KAVERI|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \
++ {0x1002, 0x1309, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_KAVERI|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \
++ {0x1002, 0x130A, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_KAVERI|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \
++ {0x1002, 0x130B, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_KAVERI|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \
++ {0x1002, 0x130C, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_KAVERI|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \
++ {0x1002, 0x130D, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_KAVERI|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \
++ {0x1002, 0x130E, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_KAVERI|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \
++ {0x1002, 0x130F, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_KAVERI|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \
++ {0x1002, 0x1310, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_KAVERI|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \
++ {0x1002, 0x1311, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_KAVERI|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \
++ {0x1002, 0x1313, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_KAVERI|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \
++ {0x1002, 0x1315, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_KAVERI|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \
++ {0x1002, 0x1316, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_KAVERI|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \
++ {0x1002, 0x131B, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_KAVERI|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \
++ {0x1002, 0x131C, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_KAVERI|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \
+ {0x1002, 0x3150, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV380|RADEON_IS_MOBILITY}, \
+ {0x1002, 0x3151, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV380|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \
+ {0x1002, 0x3152, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV380|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \
--- /dev/null
+From 7c4622d5415038a74964480844de885e7253a0f4 Mon Sep 17 00:00:00 2001
+From: Alex Deucher <alexander.deucher@amd.com>
+Date: Wed, 4 Sep 2013 16:46:07 -0400
+Subject: drm/radeon/cik: update gpu_init for an additional berlin gpu
+
+From: Alex Deucher <alexander.deucher@amd.com>
+
+commit 7c4622d5415038a74964480844de885e7253a0f4 upstream.
+
+Sets the right paramters for the new pci id.
+
+Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/gpu/drm/radeon/cik.c | 3 ++-
+ 1 file changed, 2 insertions(+), 1 deletion(-)
+
+--- a/drivers/gpu/drm/radeon/cik.c
++++ b/drivers/gpu/drm/radeon/cik.c
+@@ -1894,7 +1894,8 @@ static void cik_gpu_init(struct radeon_d
+ } else if ((rdev->pdev->device == 0x1309) ||
+ (rdev->pdev->device == 0x130A) ||
+ (rdev->pdev->device == 0x130D) ||
+- (rdev->pdev->device == 0x1313)) {
++ (rdev->pdev->device == 0x1313) ||
++ (rdev->pdev->device == 0x131D)) {
+ rdev->config.cik.max_cu_per_sh = 6;
+ rdev->config.cik.max_backends_per_se = 2;
+ } else if ((rdev->pdev->device == 0x1306) ||
--- /dev/null
+From f75195cac32bfd2ef07764bd370d3b788bd8b003 Mon Sep 17 00:00:00 2001
+From: Alex Deucher <alexander.deucher@amd.com>
+Date: Mon, 12 Aug 2013 11:24:05 -0400
+Subject: drm/radeon/dpm: add reclocking quirk for ASUS K70AF
+
+From: Alex Deucher <alexander.deucher@amd.com>
+
+commit f75195cac32bfd2ef07764bd370d3b788bd8b003 upstream.
+
+The LCD has a relatively short vblank time (216us), but
+the card is able to reclock memory fine in that time.
+
+Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
+Reported-by: normalrawr@gmail.com
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/gpu/drm/radeon/rv770_dpm.c | 10 +++++++++-
+ 1 file changed, 9 insertions(+), 1 deletion(-)
+
+--- a/drivers/gpu/drm/radeon/rv770_dpm.c
++++ b/drivers/gpu/drm/radeon/rv770_dpm.c
+@@ -2517,8 +2517,16 @@ u32 rv770_dpm_get_mclk(struct radeon_dev
+ bool rv770_dpm_vblank_too_short(struct radeon_device *rdev)
+ {
+ u32 vblank_time = r600_dpm_get_vblank_time(rdev);
++ u32 switch_limit = 300;
+
+- if (vblank_time < 300)
++ /* quirks */
++ /* ASUS K70AF */
++ if ((rdev->pdev->device == 0x9553) &&
++ (rdev->pdev->subsystem_vendor == 0x1043) &&
++ (rdev->pdev->subsystem_device == 0x1c42))
++ switch_limit = 200;
++
++ if (vblank_time < switch_limit)
+ return true;
+ else
+ return false;
--- /dev/null
+From 6a3808b8233eb91b57c230cf1161ac116a189ffd Mon Sep 17 00:00:00 2001
+From: Christian König <christian.koenig@amd.com>
+Date: Fri, 30 Aug 2013 11:10:33 +0200
+Subject: drm/radeon: enable UVD interrupts on CIK
+
+From: Christian König <christian.koenig@amd.com>
+
+commit 6a3808b8233eb91b57c230cf1161ac116a189ffd upstream.
+
+The same as on evergreen.
+
+Signed-off-by: Christian König <christian.koenig@amd.com>
+Reported-by: FrankR Huang <FrankR.Huang@amd.com>
+Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/gpu/drm/radeon/cik.c | 4 ++++
+ 1 file changed, 4 insertions(+)
+
+--- a/drivers/gpu/drm/radeon/cik.c
++++ b/drivers/gpu/drm/radeon/cik.c
+@@ -5763,6 +5763,10 @@ restart_ih:
+ break;
+ }
+ break;
++ case 124: /* UVD */
++ DRM_DEBUG("IH: UVD int: 0x%08x\n", src_data);
++ radeon_fence_process(rdev, R600_RING_TYPE_UVD_INDEX);
++ break;
+ case 146:
+ case 147:
+ addr = RREG32(VM_CONTEXT1_PROTECTION_FAULT_ADDR);
--- /dev/null
+From b2e4c70a9747ecb618d563b004ba746869dde5aa Mon Sep 17 00:00:00 2001
+From: Alex Deucher <alexander.deucher@amd.com>
+Date: Mon, 10 Jun 2013 15:18:26 -0400
+Subject: drm/radeon: fill in gpu_init for berlin GPU cores
+
+From: Alex Deucher <alexander.deucher@amd.com>
+
+commit b2e4c70a9747ecb618d563b004ba746869dde5aa upstream.
+
+This fills in the GPU specific details for berlin
+GPU cores so that the driver will work with them.
+
+Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/gpu/drm/radeon/cik.c | 41 ++++++++++++++++++++++++++++++++++++++++-
+ 1 file changed, 40 insertions(+), 1 deletion(-)
+
+--- a/drivers/gpu/drm/radeon/cik.c
++++ b/drivers/gpu/drm/radeon/cik.c
+@@ -1880,7 +1880,46 @@ static void cik_gpu_init(struct radeon_d
+ gb_addr_config = BONAIRE_GB_ADDR_CONFIG_GOLDEN;
+ break;
+ case CHIP_KAVERI:
+- /* TODO */
++ rdev->config.cik.max_shader_engines = 1;
++ rdev->config.cik.max_tile_pipes = 4;
++ if ((rdev->pdev->device == 0x1304) ||
++ (rdev->pdev->device == 0x1305) ||
++ (rdev->pdev->device == 0x130C) ||
++ (rdev->pdev->device == 0x130F) ||
++ (rdev->pdev->device == 0x1310) ||
++ (rdev->pdev->device == 0x1311) ||
++ (rdev->pdev->device == 0x131C)) {
++ rdev->config.cik.max_cu_per_sh = 8;
++ rdev->config.cik.max_backends_per_se = 2;
++ } else if ((rdev->pdev->device == 0x1309) ||
++ (rdev->pdev->device == 0x130A) ||
++ (rdev->pdev->device == 0x130D) ||
++ (rdev->pdev->device == 0x1313)) {
++ rdev->config.cik.max_cu_per_sh = 6;
++ rdev->config.cik.max_backends_per_se = 2;
++ } else if ((rdev->pdev->device == 0x1306) ||
++ (rdev->pdev->device == 0x1307) ||
++ (rdev->pdev->device == 0x130B) ||
++ (rdev->pdev->device == 0x130E) ||
++ (rdev->pdev->device == 0x1315) ||
++ (rdev->pdev->device == 0x131B)) {
++ rdev->config.cik.max_cu_per_sh = 4;
++ rdev->config.cik.max_backends_per_se = 1;
++ } else {
++ rdev->config.cik.max_cu_per_sh = 3;
++ rdev->config.cik.max_backends_per_se = 1;
++ }
++ rdev->config.cik.max_sh_per_se = 1;
++ rdev->config.cik.max_texture_channel_caches = 4;
++ rdev->config.cik.max_gprs = 256;
++ rdev->config.cik.max_gs_threads = 16;
++ rdev->config.cik.max_hw_contexts = 8;
++
++ rdev->config.cik.sc_prim_fifo_size_frontend = 0x20;
++ rdev->config.cik.sc_prim_fifo_size_backend = 0x100;
++ rdev->config.cik.sc_hiz_tile_fifo_size = 0x30;
++ rdev->config.cik.sc_earlyz_tile_fifo_size = 0x130;
++ gb_addr_config = BONAIRE_GB_ADDR_CONFIG_GOLDEN;
+ break;
+ case CHIP_KABINI:
+ default:
--- /dev/null
+From 4543eda52113d1e2cc0e9bf416f79597e6ef1ec7 Mon Sep 17 00:00:00 2001
+From: Alex Deucher <alexander.deucher@amd.com>
+Date: Wed, 7 Aug 2013 19:34:53 -0400
+Subject: drm/radeon: fix endian bugs in hw i2c atom routines
+
+From: Alex Deucher <alexander.deucher@amd.com>
+
+commit 4543eda52113d1e2cc0e9bf416f79597e6ef1ec7 upstream.
+
+Need to swap the data fetched over i2c properly. This
+is the same fix as the endian fix for aux channel
+transactions.
+
+Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/gpu/drm/radeon/atombios_dp.c | 6 +++---
+ drivers/gpu/drm/radeon/atombios_i2c.c | 4 +++-
+ 2 files changed, 6 insertions(+), 4 deletions(-)
+
+--- a/drivers/gpu/drm/radeon/atombios_dp.c
++++ b/drivers/gpu/drm/radeon/atombios_dp.c
+@@ -50,7 +50,7 @@ static char *pre_emph_names[] = {
+ * or from atom. Note that atom operates on
+ * dw units.
+ */
+-static void radeon_copy_swap(u8 *dst, u8 *src, u8 num_bytes, bool to_le)
++void radeon_atom_copy_swap(u8 *dst, u8 *src, u8 num_bytes, bool to_le)
+ {
+ #ifdef __BIG_ENDIAN
+ u8 src_tmp[20], dst_tmp[20]; /* used for byteswapping */
+@@ -100,7 +100,7 @@ static int radeon_process_aux_ch(struct
+
+ base = (unsigned char *)(rdev->mode_info.atom_context->scratch + 1);
+
+- radeon_copy_swap(base, send, send_bytes, true);
++ radeon_atom_copy_swap(base, send, send_bytes, true);
+
+ args.v1.lpAuxRequest = cpu_to_le16((u16)(0 + 4));
+ args.v1.lpDataOut = cpu_to_le16((u16)(16 + 4));
+@@ -137,7 +137,7 @@ static int radeon_process_aux_ch(struct
+ recv_bytes = recv_size;
+
+ if (recv && recv_size)
+- radeon_copy_swap(recv, base + 16, recv_bytes, false);
++ radeon_atom_copy_swap(recv, base + 16, recv_bytes, false);
+
+ return recv_bytes;
+ }
+--- a/drivers/gpu/drm/radeon/atombios_i2c.c
++++ b/drivers/gpu/drm/radeon/atombios_i2c.c
+@@ -27,6 +27,8 @@
+ #include "radeon.h"
+ #include "atom.h"
+
++extern void radeon_atom_copy_swap(u8 *dst, u8 *src, u8 num_bytes, bool to_le);
++
+ #define TARGET_HW_I2C_CLOCK 50
+
+ /* these are a limitation of ProcessI2cChannelTransaction not the hw */
+@@ -77,7 +79,7 @@ static int radeon_process_i2c_ch(struct
+ }
+
+ if (!(flags & HW_I2C_WRITE))
+- memcpy(buf, base, num);
++ radeon_atom_copy_swap(buf, base, num, false);
+
+ return 0;
+ }
--- /dev/null
+From e5903d399a7b0e5c14673c1206f4aeec2859c730 Mon Sep 17 00:00:00 2001
+From: Alex Deucher <alexander.deucher@amd.com>
+Date: Fri, 30 Aug 2013 08:58:20 -0400
+Subject: drm/radeon: fix init ordering for r600+
+
+From: Alex Deucher <alexander.deucher@amd.com>
+
+commit e5903d399a7b0e5c14673c1206f4aeec2859c730 upstream.
+
+The vram scratch buffer needs to be initialized
+before the mc is programmed otherwise we program
+0 as the GPU address of the default GPU fault
+page. In most cases we put vram at zero anyway and
+reserve a page for the legacy vga buffer so in practice
+this shouldn't cause any problems, but better to make
+it correct.
+
+Was changed in:
+6fab3febf6d949b0a12b1e4e73db38e4a177a79e
+
+Reported-by: FrankR Huang <FrankR.Huang@amd.com>
+Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/gpu/drm/radeon/cik.c | 9 +++++----
+ drivers/gpu/drm/radeon/evergreen.c | 9 +++++----
+ drivers/gpu/drm/radeon/ni.c | 9 +++++----
+ drivers/gpu/drm/radeon/r600.c | 9 +++++----
+ drivers/gpu/drm/radeon/rv770.c | 9 +++++----
+ drivers/gpu/drm/radeon/si.c | 9 +++++----
+ 6 files changed, 30 insertions(+), 24 deletions(-)
+
+--- a/drivers/gpu/drm/radeon/cik.c
++++ b/drivers/gpu/drm/radeon/cik.c
+@@ -6007,6 +6007,11 @@ static int cik_startup(struct radeon_dev
+ struct radeon_ring *ring;
+ int r;
+
++ /* scratch needs to be initialized before MC */
++ r = r600_vram_scratch_init(rdev);
++ if (r)
++ return r;
++
+ cik_mc_program(rdev);
+
+ if (rdev->flags & RADEON_IS_IGP) {
+@@ -6036,10 +6041,6 @@ static int cik_startup(struct radeon_dev
+ }
+ }
+
+- r = r600_vram_scratch_init(rdev);
+- if (r)
+- return r;
+-
+ r = cik_pcie_gart_enable(rdev);
+ if (r)
+ return r;
+--- a/drivers/gpu/drm/radeon/evergreen.c
++++ b/drivers/gpu/drm/radeon/evergreen.c
+@@ -5106,6 +5106,11 @@ static int evergreen_startup(struct rade
+ /* enable aspm */
+ evergreen_program_aspm(rdev);
+
++ /* scratch needs to be initialized before MC */
++ r = r600_vram_scratch_init(rdev);
++ if (r)
++ return r;
++
+ evergreen_mc_program(rdev);
+
+ if (ASIC_IS_DCE5(rdev)) {
+@@ -5131,10 +5136,6 @@ static int evergreen_startup(struct rade
+ }
+ }
+
+- r = r600_vram_scratch_init(rdev);
+- if (r)
+- return r;
+-
+ if (rdev->flags & RADEON_IS_AGP) {
+ evergreen_agp_enable(rdev);
+ } else {
+--- a/drivers/gpu/drm/radeon/ni.c
++++ b/drivers/gpu/drm/radeon/ni.c
+@@ -2083,6 +2083,11 @@ static int cayman_startup(struct radeon_
+ /* enable aspm */
+ evergreen_program_aspm(rdev);
+
++ /* scratch needs to be initialized before MC */
++ r = r600_vram_scratch_init(rdev);
++ if (r)
++ return r;
++
+ evergreen_mc_program(rdev);
+
+ if (rdev->flags & RADEON_IS_IGP) {
+@@ -2109,10 +2114,6 @@ static int cayman_startup(struct radeon_
+ }
+ }
+
+- r = r600_vram_scratch_init(rdev);
+- if (r)
+- return r;
+-
+ r = cayman_pcie_gart_enable(rdev);
+ if (r)
+ return r;
+--- a/drivers/gpu/drm/radeon/r600.c
++++ b/drivers/gpu/drm/radeon/r600.c
+@@ -3334,6 +3334,11 @@ static int r600_startup(struct radeon_de
+ /* enable pcie gen2 link */
+ r600_pcie_gen2_enable(rdev);
+
++ /* scratch needs to be initialized before MC */
++ r = r600_vram_scratch_init(rdev);
++ if (r)
++ return r;
++
+ r600_mc_program(rdev);
+
+ if (!rdev->me_fw || !rdev->pfp_fw || !rdev->rlc_fw) {
+@@ -3344,10 +3349,6 @@ static int r600_startup(struct radeon_de
+ }
+ }
+
+- r = r600_vram_scratch_init(rdev);
+- if (r)
+- return r;
+-
+ if (rdev->flags & RADEON_IS_AGP) {
+ r600_agp_enable(rdev);
+ } else {
+--- a/drivers/gpu/drm/radeon/rv770.c
++++ b/drivers/gpu/drm/radeon/rv770.c
+@@ -1829,6 +1829,11 @@ static int rv770_startup(struct radeon_d
+ /* enable pcie gen2 link */
+ rv770_pcie_gen2_enable(rdev);
+
++ /* scratch needs to be initialized before MC */
++ r = r600_vram_scratch_init(rdev);
++ if (r)
++ return r;
++
+ rv770_mc_program(rdev);
+
+ if (!rdev->me_fw || !rdev->pfp_fw || !rdev->rlc_fw) {
+@@ -1839,10 +1844,6 @@ static int rv770_startup(struct radeon_d
+ }
+ }
+
+- r = r600_vram_scratch_init(rdev);
+- if (r)
+- return r;
+-
+ if (rdev->flags & RADEON_IS_AGP) {
+ rv770_agp_enable(rdev);
+ } else {
+--- a/drivers/gpu/drm/radeon/si.c
++++ b/drivers/gpu/drm/radeon/si.c
+@@ -6422,6 +6422,11 @@ static int si_startup(struct radeon_devi
+ /* enable aspm */
+ si_program_aspm(rdev);
+
++ /* scratch needs to be initialized before MC */
++ r = r600_vram_scratch_init(rdev);
++ if (r)
++ return r;
++
+ si_mc_program(rdev);
+
+ if (!rdev->me_fw || !rdev->pfp_fw || !rdev->ce_fw ||
+@@ -6439,10 +6444,6 @@ static int si_startup(struct radeon_devi
+ return r;
+ }
+
+- r = r600_vram_scratch_init(rdev);
+- if (r)
+- return r;
+-
+ r = si_pcie_gart_enable(rdev);
+ if (r)
+ return r;
--- /dev/null
+From 95663948ba22a4be8b99acd67fbf83e86ddffba4 Mon Sep 17 00:00:00 2001
+From: Alex Deucher <alexander.deucher@amd.com>
+Date: Tue, 20 Aug 2013 14:59:01 -0400
+Subject: drm/radeon: fix LCD record parsing
+
+From: Alex Deucher <alexander.deucher@amd.com>
+
+commit 95663948ba22a4be8b99acd67fbf83e86ddffba4 upstream.
+
+If the LCD table contains an EDID record, properly account
+for the edid size when walking through the records.
+
+This should fix error messages about unknown LCD records.
+
+Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/gpu/drm/radeon/radeon_atombios.c | 4 +++-
+ 1 file changed, 3 insertions(+), 1 deletion(-)
+
+--- a/drivers/gpu/drm/radeon/radeon_atombios.c
++++ b/drivers/gpu/drm/radeon/radeon_atombios.c
+@@ -1672,7 +1672,9 @@ struct radeon_encoder_atom_dig *radeon_a
+ kfree(edid);
+ }
+ }
+- record += sizeof(ATOM_FAKE_EDID_PATCH_RECORD);
++ record += fake_edid_record->ucFakeEDIDLength ?
++ fake_edid_record->ucFakeEDIDLength + 2 :
++ sizeof(ATOM_FAKE_EDID_PATCH_RECORD);
+ break;
+ case LCD_PANEL_RESOLUTION_RECORD_TYPE:
+ panel_res_record = (ATOM_PANEL_RESOLUTION_PATCH_RECORD *)record;
--- /dev/null
+From bc01a8c7a24169f8b111b7dda6f5d8e7088309af Mon Sep 17 00:00:00 2001
+From: Alex Deucher <alexander.deucher@amd.com>
+Date: Mon, 19 Aug 2013 11:39:27 -0400
+Subject: drm/radeon: update line buffer allocation for dce8
+
+From: Alex Deucher <alexander.deucher@amd.com>
+
+commit bc01a8c7a24169f8b111b7dda6f5d8e7088309af upstream.
+
+We need to allocate line buffer to each display when
+setting up the watermarks. Failure to do so can lead
+to a blank screen. This fixes blank screen problems
+on dce8 asics.
+
+Based on an initial fix from:
+Jay Cornwall <jay.cornwall@amd.com>
+
+Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/gpu/drm/radeon/cik.c | 29 ++++++++++++++++++++++-------
+ drivers/gpu/drm/radeon/cikd.h | 4 ++++
+ 2 files changed, 26 insertions(+), 7 deletions(-)
+
+--- a/drivers/gpu/drm/radeon/cik.c
++++ b/drivers/gpu/drm/radeon/cik.c
+@@ -6441,8 +6441,8 @@ static u32 dce8_line_buffer_adjust(struc
+ struct radeon_crtc *radeon_crtc,
+ struct drm_display_mode *mode)
+ {
+- u32 tmp;
+-
++ u32 tmp, buffer_alloc, i;
++ u32 pipe_offset = radeon_crtc->crtc_id * 0x20;
+ /*
+ * Line Buffer Setup
+ * There are 6 line buffers, one for each display controllers.
+@@ -6452,22 +6452,37 @@ static u32 dce8_line_buffer_adjust(struc
+ * them using the stereo blender.
+ */
+ if (radeon_crtc->base.enabled && mode) {
+- if (mode->crtc_hdisplay < 1920)
++ if (mode->crtc_hdisplay < 1920) {
+ tmp = 1;
+- else if (mode->crtc_hdisplay < 2560)
++ buffer_alloc = 2;
++ } else if (mode->crtc_hdisplay < 2560) {
+ tmp = 2;
+- else if (mode->crtc_hdisplay < 4096)
++ buffer_alloc = 2;
++ } else if (mode->crtc_hdisplay < 4096) {
+ tmp = 0;
+- else {
++ buffer_alloc = (rdev->flags & RADEON_IS_IGP) ? 2 : 4;
++ } else {
+ DRM_DEBUG_KMS("Mode too big for LB!\n");
+ tmp = 0;
++ buffer_alloc = (rdev->flags & RADEON_IS_IGP) ? 2 : 4;
+ }
+- } else
++ } else {
+ tmp = 1;
++ buffer_alloc = 0;
++ }
+
+ WREG32(LB_MEMORY_CTRL + radeon_crtc->crtc_offset,
+ LB_MEMORY_CONFIG(tmp) | LB_MEMORY_SIZE(0x6B0));
+
++ WREG32(PIPE0_DMIF_BUFFER_CONTROL + pipe_offset,
++ DMIF_BUFFERS_ALLOCATED(buffer_alloc));
++ for (i = 0; i < rdev->usec_timeout; i++) {
++ if (RREG32(PIPE0_DMIF_BUFFER_CONTROL + pipe_offset) &
++ DMIF_BUFFERS_ALLOCATED_COMPLETED)
++ break;
++ udelay(1);
++ }
++
+ if (radeon_crtc->base.enabled && mode) {
+ switch (tmp) {
+ case 0:
+--- a/drivers/gpu/drm/radeon/cikd.h
++++ b/drivers/gpu/drm/radeon/cikd.h
+@@ -43,6 +43,10 @@
+
+ #define DMIF_ADDR_CALC 0xC00
+
++#define PIPE0_DMIF_BUFFER_CONTROL 0x0ca0
++# define DMIF_BUFFERS_ALLOCATED(x) ((x) << 0)
++# define DMIF_BUFFERS_ALLOCATED_COMPLETED (1 << 4)
++
+ #define SRBM_GFX_CNTL 0xE44
+ #define PIPEID(x) ((x) << 0)
+ #define MEID(x) ((x) << 2)
drm-ast-fix-the-ast-open-key-function.patch
drm-ttm-fix-the-tt_populated-check-in-ttm_tt_destroy.patch
radeon-kms-fix-uninitialised-hotplug-work-usage-in-r100_irq_process.patch
+drm-nv50-disp-prevent-false-output-detection-on-the-original-nv50.patch
+drm-radeon-fix-lcd-record-parsing.patch
+drm-radeon-dpm-add-reclocking-quirk-for-asus-k70af.patch
+drm-radeon-fix-endian-bugs-in-hw-i2c-atom-routines.patch
+drm-radeon-enable-uvd-interrupts-on-cik.patch
+drm-radeon-fill-in-gpu_init-for-berlin-gpu-cores.patch
+drm-radeon-update-line-buffer-allocation-for-dce8.patch
+drm-radeon-fix-init-ordering-for-r600.patch
+drm-radeon-cik-update-gpu_init-for-an-additional-berlin-gpu.patch
+drm-radeon-add-berlin-pci-ids.patch
projects / thirdparty / kernel / stable-queue.git / commitdiff
