pinctrl: airoha: fix wrong MDIO function bitmaks

With further testing with an attached Aeonsemi it was discovered that
the pinctrl MDIO function applied the wrong bitmask. The error was
probably caused by the confusing documentation related to these bits.

Inspecting what the bootloader actually configure, the SGMII_MDIO_MODE
is never actually set but instead it's set force enable to the 2 GPIO
(gpio 1-2) for MDC and MDIO pin.

The usage of GPIO might be confusing but this is just to instruct the
SoC to not mess with those 2 PIN and as Benjamin reported it's also an
Errata of 7581. The FORCE_GPIO_EN doesn't set them as GPIO function
(that is configured by a different register) but it's really to actually
""enable"" those lines.

Normally the SoC should autodetect this by HW but it seems AN7581 have
problem with this and require this workaround to force enable the 2 pin.

Applying this configuration permits correct functionality of any
externally attached PHY.

Cc: stable@vger.kernel.org
Fixes: 1c8ace2d0725 ("pinctrl: airoha: Add support for EN7581 SoC")
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Acked-by: Benjamin Larsson <benjamin.larsson@genexis.eu>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

diff --git a/drivers/pinctrl/mediatek/pinctrl-airoha.c b/drivers/pinctrl/mediatek/pinctrl-airoha.c
index ee5b9bab4552587b36564944d9cde3f2e18c2339..b405dfa2089135385a2605ad2ac650b9d436ef43 100644 (file)
--- a/drivers/pinctrl/mediatek/pinctrl-airoha.c
+++ b/drivers/pinctrl/mediatek/pinctrl-airoha.c
@@ -108,6 +108,9 @@
 #define JTAG_UDI_EN_MASK                       BIT(4)
 #define JTAG_DFD_EN_MASK                       BIT(3)
 
+#define REG_FORCE_GPIO_EN                      0x0228
+#define FORCE_GPIO_EN(n)                       BIT(n)
+
 /* LED MAP */
 #define REG_LAN_LED0_MAPPING                   0x027c
 #define REG_LAN_LED1_MAPPING                   0x0280
@@ -718,17 +721,17 @@ static const struct airoha_pinctrl_func_group mdio_func_group[] = {
        {
                .name = "mdio",
                .regmap[0] = {
-                       AIROHA_FUNC_MUX,
-                       REG_GPIO_PON_MODE,
-                       GPIO_SGMII_MDIO_MODE_MASK,
-                       GPIO_SGMII_MDIO_MODE_MASK
-               },
-               .regmap[1] = {
                        AIROHA_FUNC_MUX,
                        REG_GPIO_2ND_I2C_MODE,
                        GPIO_MDC_IO_MASTER_MODE_MODE,
                        GPIO_MDC_IO_MASTER_MODE_MODE
                },
+               .regmap[1] = {
+                       AIROHA_FUNC_MUX,
+                       REG_FORCE_GPIO_EN,
+                       FORCE_GPIO_EN(1) | FORCE_GPIO_EN(2),
+                       FORCE_GPIO_EN(1) | FORCE_GPIO_EN(2)
+               },
                .regmap_size = 2,
        },
 };