crypto: octeontx2 - Fix address alignment on CN10KB and CN10KA-B0

octeontx2 crypto driver allocates memory using kmalloc/kzalloc,
and uses this memory for dma (does dma_map_single()). It assumes
that kmalloc/kzalloc will return 128-byte aligned address. But
kmalloc/kzalloc returns 8-byte aligned address after below changes:
  "9382bc44b5f5 arm64: allow kmalloc() caches aligned to the
   smaller cache_line_size()

Memory allocated are used for following purpose:
 - Input data or scatter list address - 8-Byte alignment
 - Output data or gather list address - 8-Byte alignment
 - Completion address - 32-Byte alignment.

This patch ensures all addresses are aligned as mentioned above.

Signed-off-by: Bharat Bhushan <bbhushan2@marvell.com>
Cc: <stable@vger.kernel.org> # v6.8+
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>

diff --git a/drivers/crypto/marvell/octeontx2/otx2_cpt_reqmgr.h b/drivers/crypto/marvell/octeontx2/otx2_cpt_reqmgr.h
index 98de93851ba191b959121de13a94a22d7425bb67..90a031421aacbffe7313aec23be66727845af9a8 100644 (file)
--- a/drivers/crypto/marvell/octeontx2/otx2_cpt_reqmgr.h
+++ b/drivers/crypto/marvell/octeontx2/otx2_cpt_reqmgr.h
@@ -350,22 +350,48 @@ static inline struct otx2_cpt_inst_info *
 cn10k_sgv2_info_create(struct pci_dev *pdev, struct otx2_cpt_req_info *req,
                       gfp_t gfp)
 {
-       u32 dlen = 0, g_len, sg_len, info_len;
-       int align = OTX2_CPT_DMA_MINALIGN;
+       u32 dlen = 0, g_len, s_len, sg_len, info_len;
        struct otx2_cpt_inst_info *info;
-       u16 g_sz_bytes, s_sz_bytes;
        u32 total_mem_len;
        int i;
 
-       g_sz_bytes = ((req->in_cnt + 2) / 3) *
-                     sizeof(struct cn10kb_cpt_sglist_component);
-       s_sz_bytes = ((req->out_cnt + 2) / 3) *
-                     sizeof(struct cn10kb_cpt_sglist_component);
+       /* Allocate memory to meet below alignment requirement:
+        *  ------------------------------------
+        * |    struct otx2_cpt_inst_info       |
+        * |    (No alignment required)         |
+        * |    --------------------------------|
+        * |   | padding for ARCH_DMA_MINALIGN  |
+        * |   | alignment                      |
+        * |------------------------------------|
+        * |    SG List Gather/Input memory     |
+        * |    Length = multiple of 32Bytes    |
+        * |    Alignment = 8Byte               |
+        * |----------------------------------  |
+        * |    SG List Scatter/Output memory   |
+        * |    Length = multiple of 32Bytes    |
+        * |    Alignment = 8Byte               |
+        * |     -------------------------------|
+        * |    | padding for 32B alignment     |
+        * |------------------------------------|
+        * |    Result response memory          |
+        * |    Alignment = 32Byte              |
+        *  ------------------------------------
+        */
+
+       info_len = sizeof(*info);
+
+       g_len = ((req->in_cnt + 2) / 3) *
+                sizeof(struct cn10kb_cpt_sglist_component);
+       s_len = ((req->out_cnt + 2) / 3) *
+                sizeof(struct cn10kb_cpt_sglist_component);
+       sg_len = g_len + s_len;
 
-       g_len = ALIGN(g_sz_bytes, align);
-       sg_len = ALIGN(g_len + s_sz_bytes, align);
-       info_len = ALIGN(sizeof(*info), align);
-       total_mem_len = sg_len + info_len + sizeof(union otx2_cpt_res_s);
+       /* Allocate extra memory for SG and response address alignment */
+       total_mem_len = ALIGN(info_len, OTX2_CPT_DPTR_RPTR_ALIGN);
+       total_mem_len += (ARCH_DMA_MINALIGN - 1) &
+                         ~(OTX2_CPT_DPTR_RPTR_ALIGN - 1);
+       total_mem_len += ALIGN(sg_len, OTX2_CPT_RES_ADDR_ALIGN);
+       total_mem_len += sizeof(union otx2_cpt_res_s);
 
        info = kzalloc(total_mem_len, gfp);
        if (unlikely(!info))
@@ -375,7 +401,8 @@ cn10k_sgv2_info_create(struct pci_dev *pdev, struct otx2_cpt_req_info *req,
                dlen += req->in[i].size;
 
        info->dlen = dlen;
-       info->in_buffer = (u8 *)info + info_len;
+       info->in_buffer = PTR_ALIGN((u8 *)info + info_len, ARCH_DMA_MINALIGN);
+       info->out_buffer = info->in_buffer + g_len;
        info->gthr_sz = req->in_cnt;
        info->sctr_sz = req->out_cnt;
 
@@ -387,7 +414,7 @@ cn10k_sgv2_info_create(struct pci_dev *pdev, struct otx2_cpt_req_info *req,
        }
 
        if (sgv2io_components_setup(pdev, req->out, req->out_cnt,
-                                   &info->in_buffer[g_len])) {
+                                   info->out_buffer)) {
                dev_err(&pdev->dev, "Failed to setup scatter list\n");
                goto destroy_info;
        }
@@ -404,8 +431,10 @@ cn10k_sgv2_info_create(struct pci_dev *pdev, struct otx2_cpt_req_info *req,
         * Get buffer for union otx2_cpt_res_s response
         * structure and its physical address
         */
-       info->completion_addr = info->in_buffer + sg_len;
-       info->comp_baddr = info->dptr_baddr + sg_len;
+       info->completion_addr = PTR_ALIGN((info->in_buffer + sg_len),
+                                         OTX2_CPT_RES_ADDR_ALIGN);
+       info->comp_baddr = ALIGN((info->dptr_baddr + sg_len),
+                                OTX2_CPT_RES_ADDR_ALIGN);
 
        return info;