]> git.ipfire.org Git - thirdparty/binutils-gdb.git/commitdiff
Add support for the Samsung Exynos M1 processor.
authorEvandro Menezes <e.menezes@samsung.com>
Wed, 1 Apr 2015 23:13:09 +0000 (18:13 -0500)
committerAdhemerval Zanella <adhemerval.zanella@linaro.org>
Thu, 24 Aug 2017 12:46:55 +0000 (09:46 -0300)
gas/
        * config/tc-arm.c: Add support for Samsung Exynos M1.
        * doc/c-arm.texi (-mcpu=): Add "exynos-m1".

gas/ChangeLog
gas/config/tc-arm.c
gas/doc/c-arm.texi

index 6feb01b67d3a6c9ff91f4e7bb48af0b71722881a..2b74942d5013c6c028bb86c6213289e07215c9ec 100644 (file)
@@ -1,3 +1,8 @@
+2015-04-06  Evandro Menezes  <e.menezes@samsung.com>
+
+       * config/tc-arm.c: Add support for Samsung Exynos M1.
+       * doc/c-arm.texi (-mcpu=): Add "exynos-m1".
+
 2015-04-04  Alan Modra  <amodra@gmail.com>
 
        Apply from master.
index 7f647888ef5eaffa82835e004898fa023a9b7d40..c8c6fe6a0e2fa59e069a14091d916495d424aa35 100644 (file)
@@ -24484,6 +24484,9 @@ static const struct arm_cpu_option_table arm_cpus[] =
   ARM_CPU_OPT ("cortex-m1",    ARM_ARCH_V6SM,   FPU_NONE,        "Cortex-M1"),
   ARM_CPU_OPT ("cortex-m0",    ARM_ARCH_V6SM,   FPU_NONE,        "Cortex-M0"),
   ARM_CPU_OPT ("cortex-m0plus",        ARM_ARCH_V6SM,   FPU_NONE,        "Cortex-M0+"),
+  ARM_CPU_OPT ("exynos-m1",    ARM_ARCH_V8A,    FPU_ARCH_CRYPTO_NEON_VFP_ARMV8,
+                                                                 "Samsung " \
+                                                                 "Exynos M1"),
   /* ??? XSCALE is really an architecture.  */
   ARM_CPU_OPT ("xscale",       ARM_ARCH_XSCALE, FPU_ARCH_VFP_V2, NULL),
   /* ??? iwmmxt is not a processor.  */
index b6ce0c56af2aa319ec98304dfa70f19a9ccb30c0..4112510d11763c4932ce95dca23dd91ff92b5365 100644 (file)
@@ -129,6 +129,7 @@ recognized:
 @code{cortex-m0},
 @code{cortex-m0plus},
 @code{ep9312} (ARM920 with Cirrus Maverick coprocessor),
+@code{exynos-m1},
 @code{i80200} (Intel XScale processor)
 @code{iwmmxt} (Intel(r) XScale processor with Wireless MMX(tm) technology coprocessor)
 and