RISC-V: Force scalable vector on all vsetvl tests

Since when VLEN = 128bits and FIXED-VLMAX, vsetvli a5,zero will be optimized
into vsetivli zero, 16 for SEW = 16.
Such situation will cause many bogus FAILs in FIXED-VLMAX of full coverage
testing.

Force them all scalable vectors to supress those bogus FAILs.

gcc/testsuite/ChangeLog:

	* gcc.target/riscv/rvv/vsetvl/avl_multiple-1.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/avl_multiple-10.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/avl_multiple-11.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/avl_multiple-12.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/avl_multiple-13.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/avl_multiple-14.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/avl_multiple-15.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/avl_multiple-16.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/avl_multiple-2.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/avl_multiple-3.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/avl_multiple-4.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/avl_multiple-5.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/avl_multiple-6.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/avl_multiple-7.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/avl_multiple-8.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/avl_multiple-9.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/avl_prop-1.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/avl_prop-2.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/avl_single-1.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/avl_single-10.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/avl_single-100.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/avl_single-101.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/avl_single-102.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/avl_single-103.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/avl_single-104.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/avl_single-105.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/avl_single-106.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/avl_single-107.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/avl_single-108.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/avl_single-109.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/avl_single-11.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/avl_single-12.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/avl_single-13.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/avl_single-14.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/avl_single-15.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/avl_single-16.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/avl_single-17.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/avl_single-18.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/avl_single-19.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/avl_single-2.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/avl_single-20.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/avl_single-21.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/avl_single-22.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/avl_single-23.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/avl_single-24.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/avl_single-25.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/avl_single-26.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/avl_single-27.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/avl_single-28.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/avl_single-29.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/avl_single-3.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/avl_single-30.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/avl_single-31.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/avl_single-32.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/avl_single-33.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/avl_single-34.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/avl_single-35.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/avl_single-36.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/avl_single-37.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/avl_single-38.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/avl_single-39.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/avl_single-4.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/avl_single-40.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/avl_single-41.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/avl_single-42.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/avl_single-43.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/avl_single-44.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/avl_single-45.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/avl_single-46.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/avl_single-47.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/avl_single-48.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/avl_single-49.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/avl_single-5.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/avl_single-50.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/avl_single-51.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/avl_single-52.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/avl_single-53.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/avl_single-54.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/avl_single-55.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/avl_single-56.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/avl_single-57.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/avl_single-58.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/avl_single-59.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/avl_single-6.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/avl_single-60.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/avl_single-61.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/avl_single-62.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/avl_single-63.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/avl_single-64.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/avl_single-65.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/avl_single-66.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/avl_single-67.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/avl_single-68.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/avl_single-69.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/avl_single-7.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/avl_single-70.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/avl_single-71.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/avl_single-72.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/avl_single-73.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/avl_single-74.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/avl_single-75.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/avl_single-76.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/avl_single-77.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/avl_single-78.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/avl_single-79.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/avl_single-8.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/avl_single-80.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/avl_single-81.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/avl_single-82.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/avl_single-83.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/avl_single-84.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/avl_single-85.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/avl_single-86.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/avl_single-87.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/avl_single-88.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/avl_single-89.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/avl_single-9.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/avl_single-90.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/avl_single-91.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/avl_single-92.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/avl_single-93.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/avl_single-94.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/avl_single-95.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/avl_single-96.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/avl_single-97.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/avl_single-98.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/avl_single-99.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/dump-1.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/ffload-1.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/ffload-2.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/ffload-3.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/ffload-5.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/ffload-6.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/ffload-7.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/imm_bb_prop-1.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/imm_bb_prop-10.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/imm_bb_prop-11.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/imm_bb_prop-12.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/imm_bb_prop-13.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/imm_bb_prop-2.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/imm_bb_prop-3.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/imm_bb_prop-4.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/imm_bb_prop-5.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/imm_bb_prop-6.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/imm_bb_prop-7.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/imm_bb_prop-8.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/imm_bb_prop-9.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/imm_conflict-1.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/imm_conflict-2.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/imm_conflict-3.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/imm_conflict-4.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/imm_conflict-5.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-1.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-10.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-11.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-12.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-13.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-14.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-15.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-16.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-17.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-2.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-3.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-4.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-5.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-6.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-7.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-8.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-9.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/imm_switch-1.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/imm_switch-2.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/imm_switch-3.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/imm_switch-4.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/imm_switch-5.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/imm_switch-6.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/imm_switch-7.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/imm_switch-8.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/imm_switch-9.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/pr108270.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/pr109399.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/pr109547.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/pr109615.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/pr109743-1.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/pr109743-2.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/pr109743-3.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/pr109743-4.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/pr109748.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/pr109773-1.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/pr109773-2.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/pr109974.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/pr111037-1.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/pr111037-2.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/pr111037-3.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/pr111037-4.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/pr111234.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/pr111255.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/pr111927.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/pr111947.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/pr112092-1.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/pr112092-2.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/pr112713-1.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/pr112713-2.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/pr112776.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/pr112813-1.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/pr112929-1.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/pr112988-1.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-1.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-10.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-11.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-12.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-13.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-14.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-15.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-16.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-17.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-18.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-19.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-2.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-20.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-21.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-22.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-23.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-24.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-25.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-26.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-27.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-28.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-29.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-3.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-30.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-31.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-32.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-33.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-34.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-35.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-36.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-37.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-38.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-39.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-4.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-40.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-41.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-42.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-43.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-44.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-45.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-46.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-5.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-6.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-7.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-8.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-9.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-1.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-10.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-11.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-12.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-13.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-14.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-15.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-16.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-17.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-18.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-19.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-2.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-20.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-21.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-22.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-23.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-24.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-25.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-26.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-27.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-28.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-3.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-4.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-5.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-6.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-7.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-8.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-9.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vlmax_call-1.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vlmax_call-2.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vlmax_call-3.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vlmax_call-4.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vlmax_complex_loop-1.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vlmax_complex_loop-2.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vlmax_conflict-1.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vlmax_conflict-10.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vlmax_conflict-11.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vlmax_conflict-12.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vlmax_conflict-13.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vlmax_conflict-2.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vlmax_conflict-3.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vlmax_conflict-4.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vlmax_conflict-5.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vlmax_conflict-6.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vlmax_conflict-7.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vlmax_conflict-8.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vlmax_conflict-9.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-1.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-10.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-11.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-12.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-13.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-14.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-15.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-16.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-17.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-18.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-19.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-2.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-20.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-21.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-22.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-23.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-24.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-25.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-26.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-27.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-28.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-3.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-4.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-5.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-6.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-7.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-8.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-9.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vlmax_phi-1.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vlmax_phi-10.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vlmax_phi-11.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vlmax_phi-12.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vlmax_phi-13.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vlmax_phi-14.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vlmax_phi-15.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vlmax_phi-16.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vlmax_phi-17.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vlmax_phi-18.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vlmax_phi-19.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vlmax_phi-2.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vlmax_phi-20.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vlmax_phi-21.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vlmax_phi-22.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vlmax_phi-23.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vlmax_phi-24.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vlmax_phi-25.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vlmax_phi-26.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vlmax_phi-27.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vlmax_phi-28.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vlmax_phi-3.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vlmax_phi-4.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vlmax_phi-5.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vlmax_phi-6.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vlmax_phi-7.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vlmax_phi-8.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vlmax_phi-9.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vlmax_single_block-1.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vlmax_single_block-10.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vlmax_single_block-11.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vlmax_single_block-12.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vlmax_single_block-13.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vlmax_single_block-14.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vlmax_single_block-15.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vlmax_single_block-16.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vlmax_single_block-17.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vlmax_single_block-18.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vlmax_single_block-19.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vlmax_single_block-2.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vlmax_single_block-3.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vlmax_single_block-4.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vlmax_single_block-5.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vlmax_single_block-6.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vlmax_single_block-7.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vlmax_single_block-8.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vlmax_single_block-9.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vlmax_single_vtype-1.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vlmax_single_vtype-2.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vlmax_single_vtype-3.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vlmax_single_vtype-4.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vlmax_single_vtype-5.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vlmax_single_vtype-6.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vlmax_single_vtype-7.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vlmax_single_vtype-8.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-1.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-10.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-11.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-12.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-13.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-14.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-15.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-16.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-2.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-3.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-4.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-5.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-6.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-7.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-8.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-9.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vsetvl-1.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vsetvl-10.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vsetvl-11.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vsetvl-12.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vsetvl-13.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vsetvl-14.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vsetvl-15.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vsetvl-16.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vsetvl-17.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vsetvl-18.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vsetvl-19.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vsetvl-2.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vsetvl-20.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vsetvl-21.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vsetvl-22.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vsetvl-23.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vsetvl-24.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vsetvl-3.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vsetvl-4.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vsetvl-5.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vsetvl-6.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vsetvl-7.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vsetvl-8.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vsetvl-9.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vsetvl_bug-1.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vsetvl_bug-2.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vsetvl_int.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vsetvlmax-1.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vsetvlmax-10.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vsetvlmax-11.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vsetvlmax-12.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vsetvlmax-13.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vsetvlmax-14.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vsetvlmax-15.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vsetvlmax-16.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vsetvlmax-17.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vsetvlmax-18.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vsetvlmax-19.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vsetvlmax-2.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vsetvlmax-20.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vsetvlmax-3.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vsetvlmax-4.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vsetvlmax-5.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vsetvlmax-6.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vsetvlmax-7.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vsetvlmax-8.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/vsetvlmax-9.c: Force scalable vector.
	* gcc.target/riscv/rvv/vsetvl/wredsum_vlmax.c: Force scalable vector.

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_multiple-1.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_multiple-1.c
index 7bad3fb9a3f8120fd0b628796b2e716e856c8549..70eb5d77897299ac1699678c2a8f460ccca66879 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_multiple-1.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_multiple-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_multiple-10.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_multiple-10.c
index 77adaa7d07354344bb252050e77cdec19d4e4548..d98d9652d1378174b693201b6c584439ae528e10 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_multiple-10.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_multiple-10.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_multiple-11.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_multiple-11.c
index 06cae83ef1e7528772cb1992be7ac76b76aa6d00..799e29b535165fd2ce2b07e42911faf79d066b45 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_multiple-11.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_multiple-11.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_multiple-12.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_multiple-12.c
index c94c38710a485f4d2704bfef754c146ad365b905..36de289ce61960f18ee32611f0a7f6b46f39cb48 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_multiple-12.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_multiple-12.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_multiple-13.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_multiple-13.c
index 41674f4f557dec158df1f09cb3e6424e33b9e609..00e1931252e00a2fc1409e6824df4aa2e2c25927 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_multiple-13.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_multiple-13.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_multiple-14.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_multiple-14.c
index 10be734dd9b2faa300d277a34f0980d8525dddb7..4c43ae0cd1477b9dd0e731bb18c81e0d3099f3a1 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_multiple-14.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_multiple-14.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_multiple-15.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_multiple-15.c
index 2e2eb3efce2156dca881e5faab7ed32d827df8c6..a5b576aef8832107c08e15c85d5565560100f04c 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_multiple-15.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_multiple-15.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_multiple-16.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_multiple-16.c
index 777d9095d3779a5b9d6d972738e559f430a3d180..48abfd1964053919888042e733f3fc19c4902b96 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_multiple-16.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_multiple-16.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_multiple-2.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_multiple-2.c
index 0f0370d056c77f1c20c39df2214853f5b569a7d6..844d1fc6350f68f6768e396f0e3120ae35d7becc 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_multiple-2.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_multiple-2.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_multiple-3.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_multiple-3.c
index 43f272f267cead3b9264d31c2e4dd093e4d6f6c7..da69a5b9cbd5f40cc944190f5173db646410f68d 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_multiple-3.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_multiple-3.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_multiple-4.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_multiple-4.c
index c1f3cfc44bad80c4af85cf9ef7535fb791568573..1d1bf10b3bf361e5ee67e68e8fed7a7338ddf135 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_multiple-4.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_multiple-4.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_multiple-5.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_multiple-5.c
index 374b7af107385d04e8cae7496ab4c41c20fd87f6..a3ffc3ca7a5036580ef0313e46be41bad73adda6 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_multiple-5.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_multiple-5.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_multiple-6.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_multiple-6.c
index efd1e4efdaa2e284f3189870ed24c333a3696cf9..ea91076ad134cd3c3161ac379ceded4c0980ad87 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_multiple-6.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_multiple-6.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_multiple-7.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_multiple-7.c
index 96dc76faa0d80debc33743f162e208d72d86f5a7..e605331b65f19a37c8587d74f7af9ed50afe5806 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_multiple-7.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_multiple-7.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_multiple-8.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_multiple-8.c
index 9ada32e3d06ae1dc9c508b8066a71156adb83892..024087a0a22dd57eda278d4c1ff88a2255fa78a5 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_multiple-8.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_multiple-8.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_multiple-9.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_multiple-9.c
index 803c6961e31b2628724002f23f3d59dff465f39b..85a59f853626cf1fa3e18bd5566844c4eac1f68e 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_multiple-9.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_multiple-9.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_prop-1.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_prop-1.c
index 19ea0f14df55b20a3c3651fddd9eeab06e14b4f5..6e0798853bfc35d18c6fef9e8d71ab2757d6e7c2 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_prop-1.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_prop-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_prop-2.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_prop-2.c
index fdef8e37ce5fac1df6a2a9a847f8d5d8fbd32705..567e50a7396898c85b482efac0444012801c053e 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_prop-2.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_prop-2.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc_zve32f -mabi=lp64d -O3 --param=riscv-autovec-preference=fixed-vlmax" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv64gc_zve32f -mabi=lp64d -O3 --param=riscv-autovec-preference=fixed-vlmax" } */
 
 int d0, sj, v0, rp, zi;
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-1.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-1.c
index 83f7f1da49f159951d3fbff5f7436738f04ccbce..4ef4c51478f5bd5fd016f50f7fa4e060753807d2 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-1.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-10.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-10.c
index 01fc236114cdeb56b76d4fc9092aa69abaca2a59..248e80a9e7e524a46d379b6662cfbc622fe50a1c 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-10.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-10.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-100.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-100.c
index d2c5a4b498d43aa5c0763008ca9a2220a8c0ce08..04bb68124222f1127ad6eea14728593d9e081edf 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-100.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-100.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize -frename-registers" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize -frename-registers" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-101.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-101.c
index 4be7d83104c3bbd03f7e74155eaa53eeb69cf990..ba341c75538fb91f926a7bf41296ba2e8d7a2393 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-101.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-101.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize -frename-registers" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize -frename-registers" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-102.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-102.c
index ae1208cd7aa63bb99728077b2547e7cd2b7684d8..739c5502d69fb488c8cff1db43ef04a68c4aa70a 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-102.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-102.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize -frename-registers" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize -frename-registers" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-103.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-103.c
index 51306fd7a63fa64d91b69a7f135d01de1808f903..c9c4c928ce5e77b772ebca00443c5c7a41b3e322 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-103.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-103.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-104.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-104.c
index fb3577dcb9803d3091959cc1d7fc931d274fd000..9c2fa0ae04f6da54b07deb013763dc4ee44d8931 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-104.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-104.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-105.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-105.c
index 708a3bdf455866f63f96d5e7e4b8e3a452d91352..3f0a6be3daf163e0bb9df2ff1c199af155ac41e2 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-105.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-105.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-106.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-106.c
index e63d52d8ef2a28b639e557bcb4ded51faa4480b4..b21adc01684d0652e0ce824b53b9cd8f61f80693 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-106.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-106.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-107.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-107.c
index e424b4ba435e4008a4acbd1e6bb4b24f742dc9ef..dce918e40fd3fb727a3e3e18d4f30a702ca35888 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-107.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-107.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-108.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-108.c
index 95f1a955296d9d55cae3d48832ea99b9a2697720..325bc59de388cad940175996d60ee294f22203e8 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-108.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-108.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-109.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-109.c
index a45e52befbf70ad1f06e8d175990312909932de0..f99126cc80a6bbc4f98cb424ecce0c8457db2fa4 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-109.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-109.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-11.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-11.c
index 3cb776eaefbd78e34dabd0a9f5087e916ec72942..37ac5da98bbbe9e59ca4eb75158f8894139e68e3 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-11.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-11.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-12.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-12.c
index 027bc387a5e55969f3f28fd9788c609ca59f0e01..ca5ffad5912e152aa3609a735a9f8c4aecc1c1e3 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-12.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-12.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-13.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-13.c
index 984d5593160f69df71fb297a3e10dad2fd1f240b..33e9572398d46155bc5cc8f96b96579e3614b4c7 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-13.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-13.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-14.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-14.c
index e464ceb0bd6734a5491c1fd07d91dcd63918c325..2c9a896fa804b6a3efad69ece706be09736866cc 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-14.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-14.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-15.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-15.c
index e32b60f05f9ae7e5f602796b2a7e836637124077..135cdbffe5075be4d172425714492fd9ef8b3513 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-15.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-15.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-16.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-16.c
index d15499b3bf6664207acbc0ce50b426259908b2a7..7b8ec6265a1f11048e16ffb2d7aa7740604caae1 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-16.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-16.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-17.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-17.c
index ad2b34095ebaa52368eff0d996efb98519155d5a..5e0906fd63e54291cf160d8c308e8bf1d6501bc0 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-17.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-17.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-18.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-18.c
index 3860c6d54ffe6422fb9129a9f45b841578419ef5..b73ef38637c46e429868f820b6c3ca6a18dbce6f 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-18.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-18.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-19.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-19.c
index 350e1d081803d8e9ebbdc381a023336851f2f83c..a2ba5090359d1742d41e2c0aa0bd0057af684abc 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-19.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-19.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-2.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-2.c
index 4108dd30cd228047561667ed92f98892202b2106..721ae1387895a1acae84abe48b4637c466cafd6c 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-2.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-2.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-20.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-20.c
index cda2e0ea2f44b62e4ab8f378487bcc919a621782..8af726590be98505ea5d183778081261539a89b0 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-20.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-20.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-21.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-21.c
index d949933f841a9af1bc62dd35e68ed56b4d0ec45c..d461781a1734db2d4377d47b318f6a5e74ea6fb7 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-21.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-21.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-22.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-22.c
index d5e5f5a8dd538345d02c16cfe27262e065f61b16..99398346b1147307c3065a305b751698fbb990a1 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-22.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-22.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-23.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-23.c
index ec59d58c258e78cc9261ce5f6a1220d198707502..6f8e71402d85e9fc149e12f328d05c4b3be9610e 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-23.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-23.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-24.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-24.c
index 2fd09649c0fc45c30524827fc0738dc9abb7fd5b..a2d0ecac7f87f23999f626762027ef7258145c8e 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-24.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-24.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-25.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-25.c
index cfb7d789758007454690fafc659c3caca509a035..c19958c05d578b5213809f0b2b77b21378b894cf 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-25.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-25.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-26.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-26.c
index a7e067e9b39ed68d78d5d870972e0600b17503fc..769673a00ca44cc66f5af81ef0ef45fa3d4981ea 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-26.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-26.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-27.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-27.c
index 0fa72c3d314a3267714765e76a920716ceb160d6..1d422e91abb8240e925ba56da333fe061190e0c8 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-27.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-27.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-28.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-28.c
index d5f909168c65b0bf4be7036478402ee4c799ddeb..386fb5b6cb0c62ce9f6ccfce41c4e82eccda5305 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-28.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-28.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-29.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-29.c
index 44297d11147d588915a104a6db24f0dada13e5a9..652d3ebd2460af87f219a906ea630aeb2984d917 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-29.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-29.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-3.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-3.c
index 136dcb483caec4f595f4b93695e3600fda4ea190..754f426b64ab4fd769b70cb62332077d051950ee 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-3.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-3.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-30.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-30.c
index 92df1783b0b767173fe7d2deceb5ff7cca0271b1..305caf369f6c967efed89d8fbcaab5d2b3ad3a03 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-30.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-30.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-31.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-31.c
index 9afa5470b3c45f96ec7475f0e537fd85fe4c6482..3defd390f86e124aaa6f717da8550957ebf8a574 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-31.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-31.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-32.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-32.c
index 31363d2624d386686b1760cefc5c336df6d40a44..370171b305729e1eb54ff21f1375cfb93adcdb6d 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-32.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-32.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-33.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-33.c
index f4f58cd2c3bc61a7d7b15ca217731bd199ec7e09..43ee0669b6a753fd79e86c2ddf2daa59c7185e26 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-33.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-33.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-34.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-34.c
index d28c12bdd49db933550bd77efb1525b06e890faf..6d63a8b25db25db91cc0f61555981e9b3be8d1e9 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-34.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-34.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-35.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-35.c
index d1daafdee86fc9f3fdf72e053d7786cca8cca946..8fdadff7a9b66bb5a55d5d0bb16ae40443413bd7 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-35.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-35.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-36.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-36.c
index 7db2dc55d0911f141ea8f8746395678ee93f435a..1db27d854ecc13d2d795ca72cbb382644fd4da58 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-36.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-36.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-37.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-37.c
index 0c6a25170cd66fb6a5c661f2ba283173723a8751..092e2aa2e72b11b079e5876e7229c2d2037bfc55 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-37.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-37.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-38.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-38.c
index 8606b10268d3f791f9651a51076e5a11c7d929fc..9f5896bfe8fa552ae9bd458637f40ea42e358b9d 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-38.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-38.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-39.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-39.c
index 20e0e4d867fb3b2f0db03b5e2cb694530883d5e1..d278db532166de68380b53a200851b6e60164d7a 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-39.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-39.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-4.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-4.c
index 51c1f8319ec348329db3eec61395cfe8eb66bed9..1f4d78410d84aad0e6716a213020db3f091962de 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-4.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-4.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-40.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-40.c
index 796b40fe494ef0969944360eb026892ced4b1d09..926dc63342999115490da6024640de747d8f7f39 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-40.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-40.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-41.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-41.c
index 5b79594f9fa063a550e70846f5b116b438107169..4dedf3674ac6e1810f634ad324430028dcc0963a 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-41.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-41.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-42.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-42.c
index 5e66bc4dbb6178ed0d4e2fb7d9984397b31f8da1..86c51f92875bf61b523690fd84f7e57ecb1b784e 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-42.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-42.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-43.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-43.c
index 1523d4bd7b61ea74729a3e102492ad13dbdbd613..8f2205602650ec6ea7ac59b1809c27ae7a0b5bad 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-43.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-43.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-44.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-44.c
index 443758d7793cf3c2437bcdd8f151f14afcca7f8c..5b7582b574ad1b535a3af42aa9646b4a4199a3a0 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-44.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-44.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-45.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-45.c
index 0ff82266bea1904cb4ec3ad76cab2b32fc2c4957..8b02f992f51c5c45505c9f50a51702e2fde337f9 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-45.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-45.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-46.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-46.c
index a60674d917933b81531da55b51ea31b3099c3cef..0f0feec964dcd80a231d42524df251f925196a17 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-46.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-46.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-47.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-47.c
index 11403203aa9d05a7602b5934b0f8030197f94203..5c451d32df11dc2d15a10f882372379f858b23da 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-47.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-47.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-48.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-48.c
index f1453487ee2d55957e9b12e9fbe1ef4a5d660504..921a6d20fe8a2a7687f1735e08e2d4c86c94a0c8 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-48.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-48.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-49.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-49.c
index 77fe05b68a72f6e70bd86c6864a9eca6df3e4c53..67f3d4559536d65a97b2e7893094549a05508276 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-49.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-49.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-5.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-5.c
index aa3b93777cfbf97be715892023d04a4e4aa64af0..9aa0c99d84832b085057ba35b7d171e70f1715b2 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-5.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-5.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-50.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-50.c
index e7bdb6dd035e3d3c201cc5c138b4c582d974a25b..786d5d63f731b971ced850e87f4673a82936bc64 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-50.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-50.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-51.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-51.c
index 2451e7c8dbe34c989cc6116df05d389b83fccb18..3f4ee86e3301cad10714614f812db0134185914b 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-51.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-51.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-52.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-52.c
index 882576e30d4df383a21afbe8c49d321c8275e374..69c89a7eda0a29dca6d54e9426ab998fb70b88ea 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-52.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-52.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-53.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-53.c
index dbdb025986e8a756cbea76a91112c6d1b0863491..645cf0669b0581542cc8df3ff7890da154d84ada 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-53.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-53.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-54.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-54.c
index 7b85cc7072f67a676a999c875d67984a27b0c0ce..c8bba03f07192be7f656e2bcd8c95ea9f9bf3317 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-54.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-54.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-55.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-55.c
index 6c7aeea5f34bf9b6dc512790a0262a8097d9fe37..e9fbc73026d1b24312ff951da0e016bb042bbda2 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-55.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-55.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-56.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-56.c
index 5d0584e981feceaa4efbc83dc1e66ff44b011701..f5a02fe21f590ab39eece57bcbf7d3ae3b9cf801 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-56.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-56.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-57.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-57.c
index a41065b57102a6bed1ef52de7a8aa28ed01bd6bb..2eb6e4333402f83db60bc11f64fa6a5fa3f84951 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-57.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-57.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-58.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-58.c
index 610b731aaba017ab12ed430b643f590bb4882d89..6f572003984482d81ed2debf5cb387c53eeae008 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-58.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-58.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-59.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-59.c
index 82b82aed983034822cb64cd0d5562a6156d780a7..9ea60a12de34b5d5e22ac4c46536b5cfbd2c0612 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-59.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-59.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-6.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-6.c
index 1ed03555c199fce68f59c4bfd8738ca6eebf9c06..a928e467d85dd392a8885b203c112cce3ddb929e 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-6.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-6.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-60.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-60.c
index 731184d5e4f011d7790f24556dafcf8bcfb4e9d6..d156c39604553fc8a90172c4dc99ebd4cf40f1f1 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-60.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-60.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-61.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-61.c
index 5e7dabf45a3b78ef97d0743e9a8b4926c35413c0..5bffa37ba2d345f407bb276cb2e3c8d7ec0b3df1 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-61.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-61.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-62.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-62.c
index fbc4d58881b5fe2e0c6bc24bcd66c1f81212d833..e196906f4361bfb99fd1fdf45e729f020170ad98 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-62.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-62.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-63.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-63.c
index 5433b18cfc2456b0ba834c8ac3855866dde8e86f..0e62ad3e4051df1a2e96a734c1d853c8dc22c046 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-63.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-63.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-64.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-64.c
index 093f67f6767ce8c0eecb55ffbd9e87c6fb10946a..290e9411266c1dcb48a1a7d6fa0ac8331aec0e47 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-64.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-64.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-65.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-65.c
index 1ccd23462ec067c077ce592280cc7e4f4200c998..775f72fd83b9325838f9a5ba51ae99d0f2a6d770 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-65.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-65.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-66.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-66.c
index aac6b52c752c88ffd267c367cea3bbe14b02c3dd..9cc630c7f68697695da71d383b73aa183de017de 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-66.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-66.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-67.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-67.c
index 7e77e0eff442ac6da29f97c2e4db407f6273cf9b..2a2c35a619b0de74b48163bce83f6d78e18f286c 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-67.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-67.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-68.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-68.c
index a366a15f71bc8790b309cc467653d2de97dd6e92..632d464639ca4d135731b8191b3b7ee93c9bee24 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-68.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-68.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-69.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-69.c
index 633c4afd4f22778cfe242c5a8893e88115d6c35d..369961f4d0802b8eb319acddeff30ee47260ce74 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-69.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-69.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-7.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-7.c
index bd407b25d546e1f4f8b79d54a62500ed0883b31f..8e82034f558add1c91d8e6a6e012b0dbd10025c9 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-7.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-7.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-70.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-70.c
index 8927fb128fb39c4360055572c4a4f3212a9e4922..acd96f68a51a8203d5e3e3eb223701748e7665e9 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-70.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-70.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-71.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-71.c
index c59cc008e981bce4748e8147fe15b30ff752a648..e94588243383b6d589b1d2339dd48fee644d8392 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-71.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-71.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-72.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-72.c
index 45b00f68ba3371d3c5b560abf31795b4d4be319c..0c00da470da22b33d1a3f5bd27bdff54fb7a9dd1 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-72.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-72.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-73.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-73.c
index 53d4500c8cf733e217b85097ddce4af825859831..7360c87fc6ea2c8ca5829bd979776d1513a0a14c 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-73.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-73.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-74.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-74.c
index cc4f88be88872a0afcb14d95b262dbd44af067e0..fb7d874549f15071df46358f49f2e8d1c7e8bfc1 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-74.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-74.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-75.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-75.c
index c85f186518bb68241d6f68d260e89dd6a2e95d0f..9198a624d9e5834a67e18981cc5fdba0532e030f 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-75.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-75.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-76.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-76.c
index 142e43c2baab2a050396624d22f997543120771c..d7975b94161d19c24b64fcd07d8e8eb25c29e3a6 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-76.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-76.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-77.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-77.c
index ddd6766e1ef509d3019c4bf8f0cf08d58ea35bac..a638d21df227639c688df162845c8e8340d080a3 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-77.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-77.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-78.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-78.c
index 7df8f2461f856e474d8416223a7d4c8db9812b31..5d9778d143564e8e0d01a32ec96e938a4d152f7b 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-78.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-78.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-79.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-79.c
index 344909ad3223c7f811a649eedc1ad51e2e3f677a..5bb00de33bbd2b2ed53b41acdf8aeedf47f3a86e 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-79.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-79.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-8.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-8.c
index 1eb7546166abc526289a2247b3a0496f50f81dab..718abcf7c89e641adb0fc70e504f7141d7012952 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-8.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-8.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-80.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-80.c
index 0200d72c00aa743a44649df4fafc5da772c2a9a1..5ea4757e976b5fa57b3de78a9069388e6964f5fa 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-80.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-80.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-81.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-81.c
index fe67357740eca0cb2e9556fb139215ef39de6b95..be0787d6590480b1c21b033be9388ee8b4ca0c1a 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-81.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-81.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-82.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-82.c
index 17bac422508fe82fb962aa33b778a5235115cfc1..0cdd6568886d6444167acf8275d77105432c3a8f 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-82.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-82.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-83.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-83.c
index c7a3383d02ef875fe55b17499dfc4cac742555c3..dd39a65f5ba70e3d8ec0b1bfba5886600884d112 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-83.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-83.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-84.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-84.c
index 5cd0f285029035b8a39d3112c8544bdd3566eb1d..91c899c3da5e64ce78afda3119dfcb78dbe9bb39 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-84.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-84.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-85.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-85.c
index f071fa2548aa4edda0b6b38e1bac6029906370e8..b513beb99c812947afd185a02cd1fefeba163c75 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-85.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-85.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-86.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-86.c
index 48636f562f90172345978321ff62d3fa109dcb33..9a4217f88870f12709edd750f26bb4bf9a55aa59 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-86.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-86.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-87.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-87.c
index 5463cd86a31d2650c0d1b168c13a19a8ce3d2ad4..0b22c04627f4c4de1be7d48c637b481ee6281fc6 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-87.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-87.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize -frename-registers" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize -frename-registers" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-88.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-88.c
index 5b64cfea8d37366aa3d795596fdb1bc0c2fa603a..ff0f7460731ee761f94e928eeb471ff0461b6585 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-88.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-88.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize -frename-registers" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize -frename-registers" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-89.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-89.c
index 65bff4d8ddc253f0db5de95b837c84f2a1c74f7e..bdd74d6b87060e838808a85433bdbe01d61fb6e3 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-89.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-89.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize -frename-registers" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize -frename-registers" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-9.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-9.c
index 8f47258d80b32ee78d7a4bd3c496d67f621f13a4..a81ed65709797c3de210a852ace18d010540c856 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-9.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-9.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-90.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-90.c
index 92fee67c54183a8c80773205b5f1ace723a24d15..1c98ec50f6e024ec3fc42e08d4b3fc25d8fafff1 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-90.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-90.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize -frename-registers" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize -frename-registers" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-91.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-91.c
index 3eadab38037e135ec8c5d41aa8db43fdd7e57f6b..c39fea4c1a685a6568ce1b00419b9136e497abb3 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-91.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-91.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize -frename-registers" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize -frename-registers" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-92.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-92.c
index ae60519cad59c2f595f57f8649b755f10fc705e8..1ff85ad9f94778efd72caed05192060b566e8613 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-92.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-92.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize -frename-registers" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize -frename-registers" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-93.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-93.c
index eaed7f1a12768b6966c8aec9a0e5de224e3f7b80..1701f6b94936b71d6fc89fb3c9ab985eb92cc310 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-93.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-93.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize -frename-registers" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize -frename-registers" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-94.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-94.c
index a2f32dff7c18806fd3e973531b94d094d3f83d72..d36d69fd051b0bbfc7bed3868da30752e5f807df 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-94.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-94.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize -frename-registers" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize -frename-registers" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-95.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-95.c
index 128a62953e9b04bd660669315bb580c3287240a3..a075688253de39ae1d263f4e16ce43ba66e41b04 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-95.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-95.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize -frename-registers" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize -frename-registers" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-96.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-96.c
index 19516eb271ecbb7742b039dafd387580abda9b08..abe54e86c5ebda5563a708db6a0d6bdf21d36cf3 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-96.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-96.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize -frename-registers" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize -frename-registers" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-97.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-97.c
index 46437a1aa1981957340ab3dd35c6ea1f8402dc8c..6e62419e9c38f406d0c83a39479e4aa1f266c34f 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-97.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-97.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize -frename-registers" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize -frename-registers" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-98.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-98.c
index 96e337179d57040853e19fd1e5fe428b6805fa95..7aab0e096fa2fb07818399c8ed399df2faefd512 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-98.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-98.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize -frename-registers" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize -frename-registers" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-99.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-99.c
index 423dba78a4d123966537071227fe47a5e031fdca..7a06d7083c69b0c714c116a54f9b33f99191d2df 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-99.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-99.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize -frename-registers" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize -frename-registers" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/dump-1.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/dump-1.c
index fb4edb459a04bb02ef326892aff084916e88f5c3..5b4bd435bf34a1fa4a015e8c1471dbd062a2a946 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/dump-1.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/dump-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fdump-rtl-vsetvl-details" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fdump-rtl-vsetvl-details" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/ffload-1.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/ffload-1.c
index b2b7eafa945d5ae913d454ed599479adaef9d22c..5e871919e9f50a2f8367eedb9761c83bfd88a81d 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/ffload-1.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/ffload-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/ffload-2.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/ffload-2.c
index c0e21d461e7a06824693409e92447e0a74acbca1..211a1c5b694bffeb5336d76f1c18f2e3c6b56154 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/ffload-2.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/ffload-2.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/ffload-3.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/ffload-3.c
index 9e90b189bd6298f19c1e5c30489d8e6f5f5a5079..6113e3658a350f93b87bd5d3aff78e822328179d 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/ffload-3.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/ffload-3.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/ffload-5.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/ffload-5.c
index 04eb78b91c634692708e4960a60a3196f050e7a3..d893492557c46bd12444b2507e95496498cd8b8c 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/ffload-5.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/ffload-5.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/ffload-6.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/ffload-6.c
index 1b32f4ab24b84fb249a0268f924dd2bd0ccc6b12..78c785a391a537c36a2aa3bc6c2b1910a26960fa 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/ffload-6.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/ffload-6.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/ffload-7.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/ffload-7.c
index 1c08b75873d8f0df44897f1f018b9370ae4c7660..0cf6c4f8c4d35767058e564b8b87a54d1e1e0395 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/ffload-7.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/ffload-7.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_bb_prop-1.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_bb_prop-1.c
index 691980f04e9d4ac347af11bcfdd9fb11f8b86e44..19044ea619f96e88414eddfb21c1625c707af48a 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_bb_prop-1.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_bb_prop-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_bb_prop-10.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_bb_prop-10.c
index cdb2c8f948eaf5ecb208cdaa8e109ce3552b8080..e540e969c145c5d75fdd65e09a38b5f6157300e5 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_bb_prop-10.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_bb_prop-10.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_bb_prop-11.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_bb_prop-11.c
index ba2d57ea5700e1e4f05892ed0e2a309e616208fe..7afac6468e257499e172934e707dd29d76d9c359 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_bb_prop-11.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_bb_prop-11.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_bb_prop-12.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_bb_prop-12.c
index ced6cb8c408fbeb5b804b85f3367342025de641f..9097f723dfe7b02b001a5c0df4b799dce852035f 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_bb_prop-12.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_bb_prop-12.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_bb_prop-13.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_bb_prop-13.c
index fd75172a89a9877d712f504cc9780f1c14eef750..28c6d3527e2b09c810a5381839d80f8396892466 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_bb_prop-13.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_bb_prop-13.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_bb_prop-2.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_bb_prop-2.c
index 3fa7cf3bcbe3a07fa1cab28bf04c343523f574da..ac65a12d7106416fd09b82e217cab87a91f1f7da 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_bb_prop-2.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_bb_prop-2.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_bb_prop-3.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_bb_prop-3.c
index a6894749017286c5f5e58058e5a21a86afa03a41..e9273f0638a2f95601b9eb994e5dc6f10641b5b5 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_bb_prop-3.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_bb_prop-3.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_bb_prop-4.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_bb_prop-4.c
index 13d7c23ec6e700ecc40decb0bede505c962bde27..d22aef6a5ad1b955429ffc352b0d7d743eda3b74 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_bb_prop-4.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_bb_prop-4.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_bb_prop-5.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_bb_prop-5.c
index 21be9c08250ba29c62d45b9c6a3705330dfd5a27..3189929c72f31b727505d8b2377dceb64a14db69 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_bb_prop-5.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_bb_prop-5.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_bb_prop-6.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_bb_prop-6.c
index 92d830ce63850f578c34b58bf804427030acb348..381589e9a2002d5bdb4fa969331d6ef7573f9ea4 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_bb_prop-6.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_bb_prop-6.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_bb_prop-7.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_bb_prop-7.c
index 550c3a38eb100d0023d90a19fcb1ea7688def061..b3d290741286b8b5c21e0824a35034c5f41d9631 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_bb_prop-7.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_bb_prop-7.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_bb_prop-8.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_bb_prop-8.c
index 667effa8ba51abb3db9b46b5b355083e226bd244..9ca53ab98e435c7cd29275fc1f34f40227b052d8 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_bb_prop-8.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_bb_prop-8.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_bb_prop-9.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_bb_prop-9.c
index 94d08bce54d6ed3914e70e7e8d5af7dc9b0597ba..82872f100500a2daf8bd6b65c29b1fccbcfbd938 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_bb_prop-9.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_bb_prop-9.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_conflict-1.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_conflict-1.c
index 331ebab6e3bc9aa8b12079b1efb1c6f3708f7b67..22645c0479552ac4dcd6e7b72643970fc5975e92 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_conflict-1.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_conflict-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_conflict-2.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_conflict-2.c
index 3ed73ea32b6340b863f478a629fd832c27531bfe..55419d28d114b05c5b3ffc0e3b10aad1e484137f 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_conflict-2.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_conflict-2.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_conflict-3.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_conflict-3.c
index 2fa29c01dbc480c051a4b2b2857dd332e7d9fa3c..a82f76b8773ea5c7eb53bba13c61f4f92ef39c53 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_conflict-3.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_conflict-3.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_conflict-4.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_conflict-4.c
index 0262ff1cb3c930a6bf7d0c0797f922cb62184fdd..48ba5362a933efb9328ab71fe1f2e3677958d81f 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_conflict-4.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_conflict-4.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_conflict-5.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_conflict-5.c
index 9b5917e15055649d53ba5abf9bc0c610c82a4a76..611c35a609104b93d89227249c6881f4bfd42373 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_conflict-5.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_conflict-5.c
@@ -1,7 +1,7 @@
 #include "riscv_vector.h"
 
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-1.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-1.c
index 618adb78577c3a992ab48000c4a62db319d2712f..e198892dc5ca523230960adc40144d75577a0137 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-1.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-10.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-10.c
index c9d4950e7d8d9d0701a2f9ee013ee60601fe14fe..a04568154a48e6551600b6e93547c0355476bd9f 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-10.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-10.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-11.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-11.c
index 2e8647ed4bffff407ca009c92c872854afffe6a1..79061f4e05169ca492b767ece0205232aa7df096 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-11.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-11.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-12.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-12.c
index bca708906e02a833a87d305897bd27e52ed96e40..3945dcaf436bd46b497d43cf45ec8d3941b76c60 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-12.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-12.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-13.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-13.c
index 21cd0298e2432b8079e7c085660c65d45ca8f2c5..7266c59695f987b929844a644fd5e9b5d52f173d 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-13.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-13.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-14.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-14.c
index 834328db017e2a4ce2eee27b4764698944074e07..9a02380f64f43eeac191af6e46d9e4695e9e219c 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-14.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-14.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-15.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-15.c
index e535f8dab0cad13bdd8e25b373b706facc8ca36e..cceabd789115cdbe4410d9265175433419af151b 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-15.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-15.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-16.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-16.c
index b4dee19fd8bca5b8b708190f1c515e4ee03fc9dc..185f9710db48b55c0b4912a2a3b4d46748274d35 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-16.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-16.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-17.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-17.c
index a8c19a24fe58cee7702f245d102b21e097c96ed9..48ec42d8fae3c5415937b60f1778e01eb3582a5c 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-17.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-17.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-2.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-2.c
index 32f33948d7a1c0f9afe79a8a9418856ab65d5301..8a601c155b09fc00772f7a8302a346434aa395bd 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-2.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-2.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-3.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-3.c
index 4d08475271e31f311f62afa5ba7678a2fa7ec70c..80dfbffd622c4a9500c57d109dbe7f38e581980d 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-3.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-3.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-4.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-4.c
index 976d38958d72946697a3b056ab031478ad3bb7b2..e2bac850ae17c80e696f4fbaa9193a676a6fad2e 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-4.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-4.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-5.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-5.c
index defeb86d7741f749aa6ab28906863a38847fae4d..784ff3c7b92b3922a3421e61d1481c51aebe25f6 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-5.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-5.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-6.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-6.c
index 1ae8a034ea740f88c81bdaf1f53d9ab85e1f451c..ade612b0a9fe8c164fc27b3ba39ad5928f08e42d 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-6.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-6.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-7.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-7.c
index ac943abeaf98396b782e6c3764e2166b2f44610f..7ae5c5a929d0602b32e51f23d35eeda29ab60ac0 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-7.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-7.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-8.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-8.c
index 731930ef9e6ed7ec21881c7c2fe071c0b1f7cc96..1b7ce74ecef5af68e887b0b8d4e673052ba85217 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-8.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-8.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-9.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-9.c
index 2dfca074bf4d6f3c981edeedf1066bb804943b55..b6c5bcd6c93283fa8b8a219178375c900faf503d 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-9.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-9.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_switch-1.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_switch-1.c
index b084eea5403487ea5d39139f3fe59b5b5f086d62..bcdbe7512b4f1ee80601d83e2269702c17c002a9 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_switch-1.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_switch-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_switch-2.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_switch-2.c
index c55faa5fa47344a7d8b5ec8ca5f85e705b5fdade..6477dafbcd39068402bcddf8defec629c7c3498d 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_switch-2.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_switch-2.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_switch-3.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_switch-3.c
index a751700b2a0efba4039e2f4f27e6a9c4fb69216e..79d2eb82f1d4a57f0db570b750036f98a7b8e0f8 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_switch-3.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_switch-3.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-move-loop-invariants" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-move-loop-invariants" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_switch-4.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_switch-4.c
index b8aac96f9bbad3291352ea0486396f6a613d2489..642a089068ab147ff7a5cbb30d23afb0e380f446 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_switch-4.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_switch-4.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_switch-5.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_switch-5.c
index 7adf9aaf9973409dbc6a544eccc90050c9c7097d..a47699423d3913349f71ce573bde56d30d69d7b6 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_switch-5.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_switch-5.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_switch-6.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_switch-6.c
index e4f379d4ff729388292c0ad382e5e2825e379b34..5fa6c8bd2a82a9579e6caa76da1354b671fd7b16 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_switch-6.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_switch-6.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_switch-7.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_switch-7.c
index af110ec3ba58201d81ff24d5267a1ffd2b4bc0fd..e8a1fd0bd0b8201d731b1ea7fb5eb327708b753d 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_switch-7.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_switch-7.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_switch-8.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_switch-8.c
index f8568a8c8981437d53a9d562062b1b2ce1b9593f..c92e59e55b2308572aeeaba69f243fb54f3c39d5 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_switch-8.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_switch-8.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_switch-9.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_switch-9.c
index 322e2719f3e9fa1df11a5d08e8716e47970290be..19bee671ba3dd068821575789351e6a06e1da546 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_switch-9.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/imm_switch-9.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr108270.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr108270.c
index d2ae43bf263c53698be81f9a2736e2490cf1a7ce..4fab8e47c32d57137caea8a6aa4fa17b4b36a294 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr108270.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr108270.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr109399.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr109399.c
index b3abad7a8bfb61c07ac688c3e394c9adeef117aa..1daba8f2362403a8bc3f7c964fb4b6206db79e5c 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr109399.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr109399.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr109547.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr109547.c
index 88dd87709ab56f7db4e64993a1613a179881ab94..0ddb261dd746cfd8b0961f90b80b95da6f52df08 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr109547.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr109547.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv -mabi=lp64d -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv64gcv -mabi=lp64d -fno-schedule-insns -fno-schedule-insns2" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr109615.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr109615.c
index 90b0bb79937acc3dac7e9b4b2859a5834dcec0c8..33a073afcacf9f815a9a1f09224bfc629f704c6e 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr109615.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr109615.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr109743-1.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr109743-1.c
index e927829c15106615bb988d67acb33683d5680e0c..273eb4353f7ac26db748a1be576e2fad400f5ec6 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr109743-1.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr109743-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr109743-2.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr109743-2.c
index e87dc032b9b5dd50cddc5086078a1a0fbb159905..7fe7be6d71b80a7daf3b55883d576810ffd6fd84 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr109743-2.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr109743-2.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr109743-3.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr109743-3.c
index 98630a1ca02e3aa7c709b95b83ff1b49fada758e..3f06b6e0ce636885c32e4c9607054fbd872bc3ae 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr109743-3.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr109743-3.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr109743-4.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr109743-4.c
index edd12855f58b4a9c624c335a6fcae90943c5afaf..87ec80e127b4d7a5aa34191836b9dff46c077e00 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr109743-4.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr109743-4.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr109748.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr109748.c
index 81c42c5a82a0c0ced4979d14f86fb963a3d883f0..9bb1302191739edb35ebd0cb4bd52f137b74c5c1 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr109748.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr109748.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr109773-1.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr109773-1.c
index 7a9882b77e2cdaee2cc3050e19a278224308cc94..7848ff2a824cc1bbc786eed2d2c0e9d8146df3f3 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr109773-1.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr109773-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr109773-2.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr109773-2.c
index 7bfbaaf3713afa9bdcba1bef0c8cf7348ce26d18..80e9abc5261656d4c3d96c27aac839182295372b 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr109773-2.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr109773-2.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr109974.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr109974.c
index 06a8562ebab60761fa93d7c4761fc32777558df3..0efd15b83485799ad9bd4862d71006d9df438386 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr109974.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr109974.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv_zbb -mabi=ilp32d --param riscv-autovec-preference=fixed-vlmax -O3" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv_zbb -mabi=ilp32d --param riscv-autovec-preference=fixed-vlmax -O3" } */
 
 #include <stdint-gcc.h>
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr111037-1.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr111037-1.c
index 0b7b32fc3e6170d3a46e28be0995b348d970ee2e..64ca51bf07663f9eb73cf906cbbad5aeb5fb37c9 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr111037-1.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr111037-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gc_zve64f_zvfh -mabi=ilp32d -O3" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gc_zve64f_zvfh -mabi=ilp32d -O3" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr111037-2.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr111037-2.c
index ac50da71726b332524a1da51b94658fc51e2f9c0..71d2c9a66adbbb6f9f74876ccafa8ecc42c08fc7 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr111037-2.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr111037-2.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gc_zve64d_zvfh -mabi=ilp32d -O3" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gc_zve64d_zvfh -mabi=ilp32d -O3" } */
 
 #include "pr111037-1.c"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr111037-3.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr111037-3.c
index 13344ecdd3ba8349023047d8b7915637477073a9..110e55b3cbeb21337914ffca00d6ddca269f85db 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr111037-3.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr111037-3.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gc_zve64f_zvfh -mabi=ilp32d -O3" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gc_zve64f_zvfh -mabi=ilp32d -O3" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr111037-4.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr111037-4.c
index 1a0fcf7232623da7d307c86b4965620f3e56e7fa..76dd7cbc157e9f58a0e262d57b5fe9398c61133b 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr111037-4.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr111037-4.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gc_zve64f_zvfh -mabi=ilp32d -O3" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gc_zve64f_zvfh -mabi=ilp32d -O3" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr111234.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr111234.c
index ee5eec4a2575bb78994b18535cf99f863d6eac2b..d8f2cbddccf67b9b7c8d67b0063d5e5bae816790 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr111234.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr111234.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv -mabi=lp64d -O3" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv64gcv -mabi=lp64d -O3" } */
 
 #include <riscv_vector.h>
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr111255.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr111255.c
index d667dbc874b3ea05af431f8ad102acc46f40c48c..a19d920b5c15e59b317d8f06a979808829a2a298 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr111255.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr111255.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv -mabi=lp64d -O3 --param riscv-autovec-lmul=m2 -fno-vect-cost-model" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv64gcv -mabi=lp64d -O3 --param riscv-autovec-lmul=m2 -fno-vect-cost-model" } */
 
 #include <stdint-gcc.h>
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr111927.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr111927.c
index ab599add57faac9600c795311480fd3ed78a7f63..61dcc53cd737acc244712cd58b838d110d431801 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr111927.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr111927.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv -mabi=lp64d -O3" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv64gcv -mabi=lp64d -O3" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr111947.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr111947.c
index cea19b70e200af2c4b372113d456c815d6409257..14192be9db446f50191508f05f749ba9f7a248fa 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr111947.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr111947.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv -mabi=lp64d -O2 -Wno-implicit-int" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv64gcv -mabi=lp64d -O2 -Wno-implicit-int" } */
 
 char *a;
 b() {

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr112092-1.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr112092-1.c
index 857ab0cd1e6e76613445fed5261e48eaba2b53d8..77227512993e8d55599963ac9e5d51ebba5b6fce 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr112092-1.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr112092-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr112092-2.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr112092-2.c
index 2b0844ff977ea33d670cc828bae006dab8b91ced..727b2db72e798a966482be9ccd3045e20b40f705 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr112092-2.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr112092-2.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr112713-1.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr112713-1.c
index 76402ab61671640f69cfd2830afaf67b64a89505..06e4b2dabaff8585530c8767727fdaa4ba9578eb 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr112713-1.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr112713-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv -mabi=lp64d -O3" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv64gcv -mabi=lp64d -O3" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr112713-2.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr112713-2.c
index 04539d998cfcbad7c3c15351839f661552b939c0..2cae1b4d3950b934bb130bb2c14eafa7f8f77244 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr112713-2.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr112713-2.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv -mabi=lp64d -O3" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv64gcv -mabi=lp64d -O3" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr112776.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr112776.c
index 853690178ace4b93d2e800b03c37d2c249eea44c..b60853db2103a4620586ac01d7af40e9aa45529a 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr112776.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr112776.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv -mabi=lp64d -O3" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv64gcv -mabi=lp64d -O3" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr112813-1.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr112813-1.c
index 5aab9c2bf09adf40e45fefc6d0402bfa84aa8386..c0a6bf2dfea3d49d2e6bbc269f7ef1a8ca3b8f01 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr112813-1.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr112813-1.c
@@ -1,6 +1,6 @@
 /* Test that we do not have ice when compile */
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv_zvl256b -mabi=ilp32d -O3" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv_zvl256b -mabi=ilp32d -O3" } */
 
 int a, c, d, f, j;
 int b[7];

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr112929-1.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr112929-1.c
index 0435e5dbc564373770d3fe43386c0c3b2601e5ca..c3ecbf889180da1527935f684d51aec2b696ac1c 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr112929-1.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr112929-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv -mabi=lp64d -O3" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv64gcv -mabi=lp64d -O3" } */
 
 int printf(char *, ...);
 int a, l, i, p, q, t, n, o;

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr112988-1.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr112988-1.c
index b37166b2973e7c6fe9a7f86cbea21d82822f7ec8..27f0b180eb21dfd2d90cdda4474844d27080d2c7 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr112988-1.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr112988-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv -mabi=lp64d -O3" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv64gcv -mabi=lp64d -O3" } */
 
 int a = 0;
 int p, q, r, x = 230;

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-1.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-1.c
index b0c40e8a0cb22ffb5164424555ee296e305673ca..bb01691c6dcc27c6bafa0a5c5f2891a0275a5523 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-1.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-10.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-10.c
index d1713ba803dd30d8d7731e29c44fac5ba681f10d..3b42566b41dc2428cee203bf50b7b321a2780633 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-10.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-10.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-11.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-11.c
index 627debf7d6343a13dba136447e367e68a9dae00b..e8551ec63a9de9764c45209d591ec52d478b7a58 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-11.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-11.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-12.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-12.c
index 192f1f313f79f26f37dddfa95f5a2af76253d45d..50d8d0df35529d338e2dba4eeeb059f71224b67c 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-12.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-12.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-13.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-13.c
index 50c4fbd2a9afabbb0992bea9df1f03ea2987b284..44a07008617386dcd33474907e1c4d7341c93d3a 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-13.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-13.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-14.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-14.c
index efb45ff7105e679b9857f76c2e5409ba333a4779..e702c5ecf422c4690f3de17d1f765515fe896e37 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-14.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-14.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-15.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-15.c
index d0d9ec9fdf153e8ee450bb0c0ce8540b581fe273..9d037f63f0b842c3f1e1aac74b7fa4d055ad108c 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-15.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-15.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-16.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-16.c
index b0e23b9a4c3d83667e451b8297db47e2cf457eeb..899df3e2a56b6b6052bfe9d3cfcd1d9a624557e6 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-16.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-16.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-17.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-17.c
index 52f61b2afa43146c66095f239e04ed1450d3b1fd..f19897a1cde93f9c1fd2123a08e7c235481f8056 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-17.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-17.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-18.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-18.c
index 82d06f9e07a07159d4687bab3078539ff7868aa5..3a033bb0133ed2a28848c59badcda023c436e86e 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-18.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-18.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-19.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-19.c
index 604597d6b226f9988e19526cf0b3389d19f15664..2b9fbd248c18a6f41d60253e103150aeb84d830a 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-19.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-19.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-2.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-2.c
index a09f50439249bf4c4f407d9d6dd02a570ee6fa62..b5a02c021d4aadb4fb284d8f6b95d4614d40f4ea 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-2.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-2.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-20.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-20.c
index 52f61b2afa43146c66095f239e04ed1450d3b1fd..f19897a1cde93f9c1fd2123a08e7c235481f8056 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-20.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-20.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-21.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-21.c
index 9018deb917cbad19e61a4c218de2d10a9dae4ccb..9c0c319cea0d22a3c07df0c09bcd1d898726e420 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-21.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-21.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-22.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-22.c
index 6b773e0946ec42505db32a357b9b92a914a8aa8f..e293d86031d179fdfc69f7aaf8de879cac44fbd4 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-22.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-22.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-23.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-23.c
index 91e75b068c4707e8718432ed0da0b73e40ec6d77..f227e5c447bb5caacf26e48ef5973461ee85b68f 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-23.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-23.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-24.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-24.c
index fe41d15cb28160694b05dcbb50b6afcd7c16519f..df6e16ef3b2cc1da25ebe088f5308143c744d3d9 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-24.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-24.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-25.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-25.c
index d0fdc5fadb03532fd85efe6f35b219071dde8e87..71a608fa2bee9eaba874525250463ac08351aa5a 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-25.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-25.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-26.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-26.c
index d0e752581889799e9f286f54f148547980d9a467..83730673524791e32323b5470fba498697bdd92a 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-26.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-26.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-27.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-27.c
index f2391145cfcdb2fbce9df628cd4eb9a5724384bc..fb12365b841d7c5764918ae3a237ba0680556975 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-27.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-27.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-28.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-28.c
index 464457c6284ae85fef09362735e02852e37b439c..4583504bd5a81f119b6d71b914bf36889419a69d 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-28.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-28.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-29.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-29.c
index 2a20b3281ec3dbec7ea89aee4e37022a02b8a418..f16f4b9c37d350bd9d00c92c31a2efb678591954 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-29.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-29.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-3.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-3.c
index a16c5f506347217c5b5a383b0ae1190864c2eda9..93ec13ab48faf2e3d5ee745f2056b92932bca590 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-3.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-3.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-30.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-30.c
index 227ceed0ffb09768113aa4f5cfd5e11a43219dfc..9b0d88ddf97886164cacef1c30f4724c06420b6c 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-30.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-30.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-31.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-31.c
index 0632eacc999f800df03c88b65b6ed72c2886a826..ee321fc1fa09ed8686979a85460b757429af9906 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-31.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-31.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-32.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-32.c
index dfae53197861ae7ae2382f08757b8e0b0f5ce5a2..43b443be6cbf32cec476cdd7b3f9b2bef0e6ad97 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-32.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-32.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-33.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-33.c
index aa01648565778fe5e60202b9157bada69deeeeff..67855581fb2dfc46b9549e1a2a2c8d013318bbcc 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-33.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-33.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-34.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-34.c
index 6feecdfe959656f3358fc548f0188677151c6949..8c4c47effce5e6041e6595a4bcfb0ef77bc07769 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-34.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-34.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-35.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-35.c
index e0b5fbb403c53ec3650b1ad07d57079aa0a97c5c..99dbbbab71bb4b40c80316fb6ea085d3d884b666 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-35.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-35.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-36.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-36.c
index 9be774c958b5c3f39fd27913de18e63114c11b93..40bff0f5290fe4c6e9f2603a1744aa49b38377a8 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-36.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-36.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-37.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-37.c
index 3625f04b76379aa7617b0ff42012bdc599ba5a56..857dc3afa2212c1b40b96133f1044d27561ef61a 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-37.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-37.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-38.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-38.c
index cae22dd5164e28904cf89a2298ca5cd5e72fe96e..b067f9b41e67a72f6351938c6f32c184eeac87e4 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-38.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-38.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-39.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-39.c
index 9fca90c2c8bb05b9ed7701b4196451a6c6decd47..eeacb8eab3210d7320ace3b8ed376ea611490b91 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-39.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-39.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-4.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-4.c
index fd2ba4470e6f4d4f05c3dd04653cf099c3c753ed..75ef23ffc014f42c86bd80ae622da5e2238e1838 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-4.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-4.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-40.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-40.c
index c3acdea23fb70a86d09e6c547c6ffcedea82e357..b639251f2facf0331010336735b1e850c3ab73f5 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-40.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-40.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-41.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-41.c
index d8a6aa268398518e75485cdb11d12c7beab6b279..bea7ede18d2db94001dd50144e4815e8fc407d2b 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-41.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-41.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-42.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-42.c
index 739d4bcfe0cc981505a2c665d370f218ad72e84c..5a361b5873946d60a39b22fc5b605237b5f44c70 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-42.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-42.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-43.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-43.c
index f8e2c4da433be54cd03c28e8f089ab23c7569f08..f0e0ff69387a2da6e87abd6460920027bc1424b9 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-43.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-43.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-44.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-44.c
index e5239be1e3282988b1a71a853f86b4ddb2e9eb27..5e562fa353238b468ccd00f97948415a10a11db7 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-44.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-44.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-45.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-45.c
index 2721ebb55899404dacde6be2799bdb041a830320..9dc954ae47b5363cacd30d81e74014650a6ec30f 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-45.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-45.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-46.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-46.c
index ca64d4953ea6bb9dfb709bd23c3952417c18385c..fddaeae637f95e68507bb891288ddbe534672fc8 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-46.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-46.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-5.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-5.c
index b38e362b880595151fdb7dc037f5e17306cfb8d8..b353b0635bb3be667d78216f59688c2dfad33a7b 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-5.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-5.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-6.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-6.c
index e98596fa01c2a9a9f7a3ab3756914145f06d39a9..80a8046567442c4d259bf69d8115a4b1c7dfe13c 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-6.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-6.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-7.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-7.c
index b508abd9076d75f14396527787fedf0adadce1bd..d9965ca13f28ed973c2ed7d0923b6aaf0e1f3180 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-7.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-7.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-8.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-8.c
index dd4797bd65334a725132285060103411d66280e9..0e843943cf74fbc0bca9a8424898009aa2423043 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-8.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-8.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-9.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-9.c
index 4f31d1420898c82895a506e90e3d7d377ce59895..95a227bc79a7f03789dd7ab6dee576be2c3d2d47 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-9.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-9.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-1.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-1.c
index 20c2193c703854552ccedf1e660210becfd1b177..d6b6a2b9c103cff2fc08106ddf555e4408243c38 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-1.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-10.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-10.c
index db8c23ff36d3bdab38d77188fd2796494e34072e..9e01bffdd014fe4e837b99aa0365189d7e586742 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-10.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-10.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-11.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-11.c
index 025a6deaea265fa3ee9db5bb9a74a1ccab16d803..f9f24207874e48e17f9319e276d8e0109c8e67a2 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-11.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-11.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-12.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-12.c
index c18aa3cc1a261d16bd6c80c473412d8faf6cdb17..ecacd4bac1cf2af280eee83210d287dd23f9ce8b 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-12.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-12.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-13.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-13.c
index 76e360519f6f9af2abb76f0fbdb663023dff8788..fd4f6d51c003b3dc5035ae11ea20ba1e1f07a09f 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-13.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-13.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-14.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-14.c
index 3e5e88744fe5dc1895493626adb2d4b1bef5997f..4436cd968baa05a3582e26f9d335d76d6fddb495 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-14.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-14.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-15.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-15.c
index b66df6addbf104acb07b4630f0fb4a48f91d8814..16b2c326b349290945c090608c68d075cd2898dc 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-15.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-15.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-16.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-16.c
index 1b33c17ee2fd80a7c51059535b4c8b7d265931eb..12bb03d8e5eb1f98c1e5305bf2278c5dee4155a6 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-16.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-16.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-17.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-17.c
index 5b2b2e1e32a843a202c82a72c1b2e655a6bafb9b..0eadad1e1b8b985ab1723d3ad1092e15e3e3432d 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-17.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-17.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-18.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-18.c
index 618e81285a17283fb5e530175dd96ddf851300f3..8679fab8a9c2678c3743623065bced28d15a9879 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-18.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-18.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-19.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-19.c
index 6bdb2e9d1827e014d148e4806e50881cc50d3eab..9130d1cf9ceab863f1ac15cc8012800b367700fc 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-19.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-19.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-2.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-2.c
index e61eb40b7c5ce775e7e4350ddd67b3ae20e2668d..18e41b9739084ebc47581ff0093c9fcebd1d936b 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-2.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-2.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-20.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-20.c
index db4f9a1da86282610b40e81668d3fbdad899fa8f..394553d8dd77b8c00ef5b0d681001c1cf145cf53 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-20.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-20.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-21.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-21.c
index 26f115c5cf4ff8e9f82cb5f9b08dfee96dfe9f53..048087f0477fe375665f45fc7fe3801bd19bc4e0 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-21.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-21.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-22.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-22.c
index 6fb81c518b2cc98b8f14b07fcca7776ab5991a3c..1a4fdb13ac49a9efab94d6ad0e30440c0e44d1a4 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-22.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-22.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-23.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-23.c
index 728761d21dc4f062880b118960e1296028722d20..924758915ccd6c0ab7ce642c8da21d4dedb79adf 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-23.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-23.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-24.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-24.c
index 8dbcccdebe36209c6092d6ebcc6e7dc54330a751..9e811a9fe54a10d4d699239eae7c910435f35e9a 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-24.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-24.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-25.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-25.c
index 1dee56d1f8b04e8c0ec55ec2864d7e40eb14cae9..738b53f6dc354fc6545e7f0bd479335bf749e964 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-25.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-25.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-26.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-26.c
index 8547d4a35a7581e1dcce65c9cc62fe9cac1482d1..0cbc6a4c2bed9791bb2a878e9449f9be4182e8d1 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-26.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-26.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-27.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-27.c
index 5240fe33c2f8bf218e3b57efa6a1d40b28142b6a..e7846f07798a8b4e136f74ad9f42a952bc403ed2 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-27.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-27.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-28.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-28.c
index f0e1ada628666f6c9fa9c8138b02a34502065956..9b2b0ae97c563560952c676c79e3c0e5d2a932c1 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-28.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-28.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-3.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-3.c
index 830e91080dd3b7553920551d88848d1895034a99..c0735a5cd2b337cec3c28e8f3132f974e3211b78 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-3.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-3.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-4.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-4.c
index 81cdad2ea9d6db06c6f42ba793f6401060fe3cff..cb907505976b8a298ee052aab7a3fccab8e7f2f1 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-4.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-4.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-5.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-5.c
index de84f9ea32bdfb86d10035531a10a8c42eff953b..a63eae7730496ca0d3cb85a11d1e443ee080abf1 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-5.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-5.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-6.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-6.c
index 9054d86122d0d1e1f4ebb7541772cb4c1a28b04e..607c8020f1388a4374b6b7dc9176d116d8834382 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-6.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-6.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-7.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-7.c
index 8265b5ed2e167f999da8bf81d49c1130146c98fd..48f3cdf591d5433a84a64af1332fe4e413b04454 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-7.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-7.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-8.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-8.c
index 516153094e8e8455250155cdbbabcc702feaa841..610c944efec750437dfe975a3f099e3d05de55be 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-8.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-8.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-9.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-9.c
index 8dbc41b8a5b8ad6a61aee63acbc4dceec8fc38ce..7ea12185966f4541b6a811d60d46cfd93642cf10 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-9.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-9.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_call-1.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_call-1.c
index 3441b1f06b762754eabcd063b5e71afd42ffc8d0..1dae7071e137cda1bf245a0bfe1667a030a00eef 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_call-1.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_call-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -O3 -fno-tree-vectorize" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -O3 -fno-tree-vectorize" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_call-2.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_call-2.c
index da560972a0e6e2960d853f15ed76a3a04ff24425..1e72f616665efaa078422718c10b45110a746d35 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_call-2.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_call-2.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -O3 -fno-tree-vectorize" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -O3 -fno-tree-vectorize" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_call-3.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_call-3.c
index 748f54e391c30dfa448dce9317f76131aa53ecac..62d087de9c73551ea489a5a57d8455fdb6389a59 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_call-3.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_call-3.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -O3 -fno-tree-vectorize" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -O3 -fno-tree-vectorize" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_call-4.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_call-4.c
index 164c44a7eafea1629a557ae86d148ebb559d28d0..e52a55e09e55031ea899848a77f44969f83f59e2 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_call-4.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_call-4.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -O3 -fno-tree-vectorize" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -O3 -fno-tree-vectorize" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_complex_loop-1.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_complex_loop-1.c
index 6ca0d175b9a6413c96304208d44fd58771f3c4c5..03418457f7e26d1bac74838d10d33585e24046fe 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_complex_loop-1.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_complex_loop-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_complex_loop-2.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_complex_loop-2.c
index 2c436d8ce0cdde5dc5e7e3a5e3dd4584d70c8ee4..85686e846615bd863e53e861f0bfb4fd45188301 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_complex_loop-2.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_complex_loop-2.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_conflict-1.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_conflict-1.c
index bb75c509ffd20095821ce66791f26ee08c104f2a..0b03e75070bdf656ea6a0a6fbfb3437fd207ce7c 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_conflict-1.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_conflict-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_conflict-10.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_conflict-10.c
index 30de699d32ea03968e347d021b48ffb8095429de..d72414f4cabc21ee631427337adf1d26f2a865c1 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_conflict-10.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_conflict-10.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_conflict-11.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_conflict-11.c
index 653aba8a1980c390e88a69a80069c50b5bbfa70b..2a55f2d05247211b05f4c28125a5de3a4e87c72e 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_conflict-11.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_conflict-11.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_conflict-12.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_conflict-12.c
index 00a75948ba5e2ff310a00cd808568e0e7102bb98..eb2a71045da811ab41052d53e6430c69da558791 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_conflict-12.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_conflict-12.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_conflict-13.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_conflict-13.c
index d3676900eae818994befb616538a3a5d55d6b1c7..7a4b0a73679c200ad5ed63d3808feab0d0bf99b1 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_conflict-13.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_conflict-13.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -fno-schedule-insns -fno-schedule-insns2" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_conflict-2.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_conflict-2.c
index 72f49f3e53f71f074236d0f0675f1154f0ca9bd4..0dbda086df38391af3e298f026833eb2e8205ba2 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_conflict-2.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_conflict-2.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_conflict-3.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_conflict-3.c
index 88a565fd891b92b5be0f5225cbec51d37ed5badc..66e1b73c4d4084ddd660e86f78d94f0633c5ce26 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_conflict-3.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_conflict-3.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_conflict-4.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_conflict-4.c
index b0ca3942d42df92e3d06da411b298d1530d48d50..28ffe2c687a41f2510efd3356c59f61295bbdc11 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_conflict-4.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_conflict-4.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_conflict-5.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_conflict-5.c
index efba512269f69f06b10350c35fd9246285013a91..5a3e05e496109f95471e240bec4fd470f7bf9628 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_conflict-5.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_conflict-5.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_conflict-6.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_conflict-6.c
index 01396ef1c1b39a0b475de326a8d38713dd76cf9f..bb2ca39cf719b6500fc96c8c4ecaf03177b7f724 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_conflict-6.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_conflict-6.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_conflict-7.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_conflict-7.c
index dd0d51da834d2abad67282d4d6effef74998fbb1..293b1095124cbeecdd99ba4a303704e9f97774e1 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_conflict-7.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_conflict-7.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_conflict-8.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_conflict-8.c
index fbca9b00e54e1b3d0441113e0fcaaee52f88fa21..ddc293b205252ebf6dc18882820d0427459684ca 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_conflict-8.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_conflict-8.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_conflict-9.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_conflict-9.c
index bc52e5a88c0ca850e63ec6fd442bc58f2e160c01..87ea3970e02a40502560a204a220affa01443ce2 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_conflict-9.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_conflict-9.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-1.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-1.c
index 429d4942d75842a0eea364b811165e1addbc95bb..d296fe60d183847c8221cea2671aca1c697c873f 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-1.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-10.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-10.c
index 2fe6605bc1bb8205e5c48efcd52e1ce597d2c448..510e0de413f981ddad4cb2023ac1c8608ec95da1 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-10.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-10.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-11.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-11.c
index 3c45894489494391c77b8c5acdca627ea0fe7706..f5a9f6a88cb4fd5397dffd1bab6d98f1cfb93561 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-11.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-11.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-12.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-12.c
index 2f2f0893d87d375206e4c45e5741f7cf595391ec..73eb9c78e306ec8bb67863c91153d2ff47760647 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-12.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-12.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-13.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-13.c
index 8774155aa95d141d3f6c7fe4abf1f2a94d4b87db..c925bcf30db3fed2420ada5197edb1290f4b5269 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-13.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-13.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-14.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-14.c
index 8004854327a948b26d2b389a0e62a6691589c35f..94325b474ecda08ddb5ba22a1166fc1d9aeb4199 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-14.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-14.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-15.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-15.c
index 9e8f8018a86804e526450bafa4cd650d6ba50e48..9de3aa3da174e66864080f3fdf28ebbc259958bb 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-15.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-15.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-16.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-16.c
index 204fe958c450090e2fc26e3e4196f87fa1d42f24..9ed3bfd6919e649f495c5dc1ca791c9b8fe4ad4f 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-16.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-16.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-17.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-17.c
index 0868c0102f4dab4a3a3fbb65cb83e4d05b9754d2..ef3f76a0550fd69b4e34933839ab92a53b1cb393 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-17.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-17.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-18.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-18.c
index 44e170bbda1c18cfa75cfc24678454e9a0552753..302b2f64072bd4f4abe2c130bda060eafb0b80ce 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-18.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-18.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-19.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-19.c
index 80bd0081b24be896eb9b8dcbb274435a0d39b9fc..1dd7933aacd3a60f3c052e5d500bc03b39707142 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-19.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-19.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-2.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-2.c
index 9cdaa0649fae17bb3c55734c4688f748c0ac39d6..756036eb8b91620985e8e854e4ea79b31e9cb00a 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-2.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-2.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-20.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-20.c
index 55171805a7ed5219eb5195778026d3ae95c0d58f..a5d6c9af3f56c8063a1439ac4ef4689a3c9f47d3 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-20.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-20.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-21.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-21.c
index 26190478d5d44945f79271f2bdf40c0e07ada8cc..ffbe7c8e9f0cf39492a680e5f73d7226d84648c9 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-21.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-21.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-22.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-22.c
index d5e8728b42b783da44d007e93d5f9d0be149725f..0c5a119915001f1c53252ae30e8dd1bc84e906cc 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-22.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-22.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-23.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-23.c
index 19bfd58b8680f79d6fea716981345e5db6e73493..b1faaeebf887009d8eabc914b21584f4c89f5ecd 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-23.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-23.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-24.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-24.c
index 2f13d2cc62dc5bfb05661258e147cad9271355f9..b80bdde8da86531cc8760e9b6c2d39b0dc5664cb 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-24.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-24.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-25.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-25.c
index 32a8edb0097859061f41b2706418803e3016665a..c0b8b4c330f0c50f2eb8adbfb256b232245eb936 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-25.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-25.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-26.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-26.c
index 897c1ab31bcdaf5e7b41038da5ff7bcde87dbfdf..5366b8bc1af4afbf365d8af6034259b2bb638699 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-26.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-26.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-27.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-27.c
index 2ba5e282f3236ecb5ca8079a185dbfb9b0265dc0..3a3e9bcb110a620a1b139e90f9f2bb811a005942 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-27.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-27.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-28.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-28.c
index d56d264d0c25d790d021997b50ac126c146c4c69..181d0e709c96e2a00bd03f51d09f3ee909e5d111 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-28.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-28.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-3.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-3.c
index f3183426873da417dbab373424fb67f481a71de5..8c67890fc55d64b79060b2301e0d9532c7f22deb 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-3.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-3.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-4.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-4.c
index 4cf5a00319e1e08b9e346ad8570a195c01cd9122..597e066002e9570b0959a322b5e88aa868d797a1 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-4.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-4.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-5.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-5.c
index f708e4a5732e3c34e414bed837b85a87e02b8f1f..02a08cc39a3ea3e3c81d6f6af1b9465e98137eb9 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-5.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-5.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-6.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-6.c
index f3dbffb8ebc2be80ff28b43309e6413b79895dcc..b6cf5ab81b2e4f556170d358aeb92a7797f0e789 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-6.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-6.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-7.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-7.c
index 6e2689698be8dc93a277e5fcdea8de0376e0756d..c7fec261333643bf416a40292759ab596047b1c8 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-7.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-7.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-8.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-8.c
index 6dde53e517b6c273bf0071709e871d5186a8c7bf..a89c1d523db354921f0b1cb5346aeaf16dac7213 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-8.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-8.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-9.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-9.c
index 903c46cbbbfa0d75d9b35b795a585f8691e14eee..f39b32c4c71aed30b802e03d1829be2fc4fe6329 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-9.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-9.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-1.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-1.c
index 830dfb83e6d4fc4865b95929d2e3ce56ce846f8c..6f61bb635486e6ef62700b20d44e5ac9cdfb49bb 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-1.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-10.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-10.c
index 898dd20b0ccc404cce0c4ae18cdf25795667c22f..b42c2b21bd7027f37396f0e6e7e843908e05f868 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-10.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-10.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-11.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-11.c
index 24a3f55d92bd9791f5e681e98481bb84ac9ce3be..8caeed737ad497175fd9e03a5c6d97c91b5c91f2 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-11.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-11.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-12.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-12.c
index f311cbfc12ae13b3f67fd2c3568bca3e6ea5810c..d129caf93b149c719e962eb7fb472dc98aaa2f98 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-12.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-12.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-13.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-13.c
index 2e0fbc5a817058093832eb6d0b2ae10bf3f0090e..830739da19940eaa830f0825b436765b6fcc779c 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-13.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-13.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-14.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-14.c
index 7a0e12f0ff381dffd137a5a49cc55c0dac204f97..e4ff921f68c36c599bbfe710523c013ec9f7e9a8 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-14.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-14.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-15.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-15.c
index f61260780f2cace28bec8d547894e7ffb18cf5f8..f8e6ed5b88c5fd75de3cb39eba92c21e9ca02fc9 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-15.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-15.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-16.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-16.c
index 4dcbf7bd1dfaa4520f27763f6cd3b8a8999bf00e..225749fcbd5f43f719218b7e7fa4d8938a6ff484 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-16.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-16.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-17.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-17.c
index 0e0b67c5c61fc07381b1ae60718c238299837112..1f27a6bc87a641988891bf66dec37400f797ed2d 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-17.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-17.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-18.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-18.c
index 5a5b7d576070333ba9308a3147054f20438eea24..e91a4e405e983395329760ed6642471b890caa91 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-18.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-18.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-19.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-19.c
index 9e1f9c757c05c3c69f2f8399bb29f47fc67aed7f..d0a920f99b00ac2345707ee78dc11f4398c2e2be 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-19.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-19.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-2.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-2.c
index 5ac8e179e73149f4646958682a8f731480d83f2b..27e78920f3958cb66d3d3a0f3a3d4d1c086ff2b7 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-2.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-2.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-20.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-20.c
index 5ac73a979ebc46a369e2be6745e40253dd1edb0b..8d37f7b96b466676fb1f21ecb401a5b7650383e5 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-20.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-20.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-21.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-21.c
index f79559c48cd99a549ce5ebe068194977cc27c5b5..a3817a394ca920786dc379da90815be4ac8862aa 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-21.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-21.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-22.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-22.c
index a423c5dff28bf6aec6b513eb06ecdb7183a6f252..369850ab02c8dcde93f178f0a97f86707ac40845 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-22.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-22.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-23.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-23.c
index 00d2f82c2d04db9fa89efda8ff62def687b6d67b..a8c404dda73729ac8a051cf593b4f9cd6d713697 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-23.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-23.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-24.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-24.c
index 69f21e5cf95311a2dce5cefb26349eab3fd9e61b..ef691ddb1a6422359bc47235e769fc95de247e4b 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-24.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-24.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-25.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-25.c
index 65709cd5f4262d0b063e90d4394356219cdddeda..1345fa0dbd68c35ec98ad3c16f86dc63ec7d5657 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-25.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-25.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-26.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-26.c
index 4bf37250345711114404e7d05e30c76e1dc4455c..d6cbb2bc8190ee95e73e4424bb92e870148ce796 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-26.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-26.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-27.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-27.c
index cacd290168ef269944e7cddbe47c99d750d8800b..364bd69c33539e5cad07669ca240606214e89be3 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-27.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-27.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-28.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-28.c
index 39e747bd89a01ea93c820f1149e171b27348ce1e..5b26167412e87f74de30c4b0236c43835b427371 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-28.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-28.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-3.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-3.c
index dedadcb53517f46e3a8668212b3eeb8c1c0cc155..4cbfc67738aacd797968bb2f76040b51892b773e 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-3.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-3.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-4.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-4.c
index 31be96662a4f6867f7cda51ca1006c0709d68537..7a28e845a4e7ca71bdec5943fcd8622efd56f13b 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-4.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-4.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-5.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-5.c
index 5a48b997a71409abe16b82efc1c6d9ebeb6d3e7c..8ca376e42f2680241d54ea91976f71fdafee095a 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-5.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-5.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-6.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-6.c
index 8ea534918caccb7247489570baf09530a5a59c15..4291d8d6ae8e70ed9f0efd96a9708562d732cfed 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-6.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-6.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-7.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-7.c
index f4fa2696a1dec4dd7aceb767d3c139b67fa30e56..3e6599db4b4f9bde0c2233bee74ab0cde3a6c87d 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-7.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-7.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-8.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-8.c
index 8526ae610d323e276537a0f5cebf4e4ab3a24026..e767b124a99a8b51434774477e200d501a5bfc2a 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-8.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-8.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-9.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-9.c
index 42180a70ab481227622f9ab75d00e13d448b0b74..0d5183ee31490156d3d21df6d4f16443ee091522 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-9.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_phi-9.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-1.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-1.c
index fb1258f826ed713a1819414e2d76b544a5ff18de..e452d85ebdd317a35a3a5c2bb8c0889be68ccf8c 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-1.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32" } */
 
 /* Test insert-vsetvl PASS whether it's able to eliminate vsetvl for same vtype in VLMAX.  */
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-10.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-10.c
index bdfb964cc01472dc55857a380f78120dc062ce84..7503fbe48ad0dfc214afa8b1749a218ef04f8826 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-10.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-10.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-11.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-11.c
index 17055f0f0bf09d7c08e244da27ad8ff9b028d665..6b3439a1e9270109357920a9b9d78b9e17a563f8 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-11.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-11.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-12.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-12.c
index 1383995ac7214834e3f82560aa034d2f9cb01612..3a739e2942d7b87764a5bee934990aa3215997ea 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-12.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-12.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-13.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-13.c
index ba4b5ef7c3b2443223fc23abf893f4262f80e3aa..ac0204fa937afbcc7f6a88725cbcc7258a2bbb19 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-13.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-13.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-14.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-14.c
index 5f04c1929249f23cb6d09bcaa4ae0613152ed307..4a903cfed358edf69dbc55fb1a2ae859e1714b8f 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-14.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-14.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-15.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-15.c
index 8debc17248f3a10cf2dc609b1b5f3b50a0c4566a..9fb73cf05fb04214be641964bfdde645ec50ad15 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-15.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-15.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-16.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-16.c
index c8913d8267d65078130ba63799022d5a6d25408c..e44537e5542dadcd83458ef3df025725cb5e7d6b 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-16.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-16.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-17.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-17.c
index d5f27c614bdd858446a4fb9949245be624ebe2a2..960c9bff7651c2a9ec76e66145f8db14278b77d8 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-17.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-17.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-18.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-18.c
index c676b6b7aefd126a6046034eaa9fe34ef14a1ef7..5f22e8d0e8eb49437d2b10db28343bdfaeea0e0c 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-18.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-18.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-19.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-19.c
index 11f1da32200590d0dd371aebdea10e5fb71cff64..e5f35c0f018cb1058b89389e0f79a6c243b0c562 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-19.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-19.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-2.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-2.c
index 5ee37e99a45dc0885f40ea02c85ffeaeb343094d..b2f967b5990186ea7b213c46934556b5e6cea344 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-2.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-2.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32" } */
 
 /* Test insert-vsetvl PASS whether it's able to eliminate vsetvl for same vtype in VLMAX.  */
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-3.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-3.c
index ed3862753aba99df8437b1ae5e217a400f6a62ee..31ebc133f417d0f3394d8a8d800be2850d24c1fe 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-3.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-3.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32" } */
 
 /* Test insert-vsetvl PASS whether it's able to eliminate vsetvl for same vtype in VLMAX.  */
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-4.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-4.c
index d8f1a0ba04e7cf3bc33fa79372ccea34fca6c747..bac607bf8d6646249697b8c41963f328893086c8 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-4.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-4.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32" } */
 
 /* Test insert-vsetvl PASS whether it's able to eliminate vsetvl for same vtype in VLMAX.  */
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-5.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-5.c
index 293c818729ed21fc7d7c8df4a560b05f9b8c64c7..a620523650a85b4d8c4ff5a8b89d0f522a4e8cc8 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-5.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-5.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32" } */
 
 /* Test insert-vsetvl PASS whether it's able to eliminate vsetvl for same vtype in VLMAX.  */
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-6.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-6.c
index b0473708439dc95f101b7a008fe5099a201c4233..9c293dd0acbff381b2d230a00c5bddb6c6ab15e6 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-6.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-6.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32" } */
 
 /* Test insert-vsetvl PASS whether it's able to eliminate vsetvl for same vtype in VLMAX.  */
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-7.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-7.c
index 04d1930ee3e983a5e85e73720a4fa412fa681f12..355a03084729346a93256f6d9595d2802c0f59ba 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-7.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-7.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32" } */
 
 /* Test insert-vsetvl PASS whether it's able to eliminate vsetvl for same vtype in VLMAX.  */
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-8.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-8.c
index abfbc1b3b78d6bd61cbdaaa49a7df0b8cc4c7653..85668d06db99a757e083f50f529be7fc9c12fa73 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-8.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-8.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32" } */
 
 /* Test insert-vsetvl PASS whether it's able to eliminate vsetvl for same vtype in VLMAX.  */
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-9.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-9.c
index 6528c113a75d0f47e1dc5c4ef29c440d910586bb..71a0ccc611a0782b993bb9f14b8ec27c02d2820c 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-9.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_block-9.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_vtype-1.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_vtype-1.c
index 15b10e6bac603655d1375f2207234e2fe1c69708..f6ecebeb2e1c3887a924cff95699024c2b1b3c8f 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_vtype-1.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_vtype-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -O3" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -O3" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_vtype-2.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_vtype-2.c
index 823e50a2f094a52daa0d4cb8ee5699a9b706e0bc..39576c17e5d3153e126279fe5d76ada570230006 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_vtype-2.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_vtype-2.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_vtype-3.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_vtype-3.c
index 1dac01c678f49825e98a6fbd1b21232993cc6806..f5fb770eac6164bb30f9c6f973ed09450a1392fe 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_vtype-3.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_vtype-3.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_vtype-4.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_vtype-4.c
index 05321bf68b167e9fa1972e00ae0fa81204a98af2..63282f4558b0baa9089a62270646afcaf404bd85 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_vtype-4.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_vtype-4.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_vtype-5.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_vtype-5.c
index 016ad75ac426d61926bffd22869efaad8d3af0b9..d9cdb1119564542bb21d1512b168a34ed5b99643 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_vtype-5.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_vtype-5.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_vtype-6.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_vtype-6.c
index f96b8c5774507e049103d9a83afa2f9b82b0b83c..1400e67c74b16b389ef987fe0a9fc97db831db63 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_vtype-6.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_vtype-6.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_vtype-7.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_vtype-7.c
index c20e7b87016a5ff32d1d40d6ab25f1a00db3476a..4824b75dba82b2d2a9b6455006024e1fdd67dd8a 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_vtype-7.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_vtype-7.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_vtype-8.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_vtype-8.c
index ca6b7fe0951a5e2d35c25564ec7a5c5ea2030bc4..b79885254058c91b2932df0c33f0de1b5b4e8eda 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_vtype-8.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_single_vtype-8.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-1.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-1.c
index 7648b8a2dc836c829c61003ff7f3348de8400b17..d3141223cf3de044f30461a00c06beda0a82c850 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-1.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-10.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-10.c
index 204058a43bce57014978c22bc5dc856f0fa301d8..0532c7d42072770ef7385b2b4c8d8d73013798e2 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-10.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-10.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-11.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-11.c
index 99cf3bd583e07a374e3f6a343fe0127d6aa60f5b..b664c4b67eb1e0a9ad3ef6070e2da6d247c43420 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-11.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-11.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-12.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-12.c
index b79758527b7a8dd903fc89525d98701f854f2e68..04c4b886eecd555ece11a7d41b6b61f86e66a9df 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-12.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-12.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-13.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-13.c
index 29b850832f29e2e06232e8196d8db9047e11cc73..e2deea7414c4eb198576c3012ee8f17db7415436 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-13.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-13.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-14.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-14.c
index 1fc97f8b6f2dbaa23283359c625db9d693ad0cd3..0671bce357b147f22731eb291e39c8812911375b 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-14.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-14.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-15.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-15.c
index f3b37661fbeb241308aa52612b07ba5049557392..1bac9fd337da771d7982ea25cf948629aa1731d9 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-15.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-15.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-16.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-16.c
index a1587e7e20ff3bbacfea8c227824a1c3121b0999..8dddd88999f3d868c68c28f222c61d22681d8d0c 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-16.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-16.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-2.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-2.c
index 9d40a13b06e6206c31762dabf3d280f6cac571cb..c6b39aafcceb407b0ec6b2df5d27ebf04d252fa6 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-2.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-2.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-3.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-3.c
index 00b883f2f38ab079140504f2d7481e3b57e968ef..8ba568060572cb6fcd75a7fe6c8641f88aae4f9d 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-3.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-3.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-4.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-4.c
index ce30f3aac69e7e9ad79a4b497e195173d29c41fc..1404c9dc0d54538327dd843c8d89778b562ee021 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-4.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-4.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-5.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-5.c
index ce30f3aac69e7e9ad79a4b497e195173d29c41fc..1404c9dc0d54538327dd843c8d89778b562ee021 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-5.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-5.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-6.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-6.c
index f7e354314b5a8638875bebe19a64b8569cf86633..609c68dfcbee4efc6e9a3fd23b63ec8a038eb398 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-6.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-6.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-7.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-7.c
index 28c017d6130fc0e40c70d4815521f0260fed1671..043f17737ae3f977abf765370b01f1bea7a14310 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-7.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-7.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-8.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-8.c
index 06bb695f7d12ac5b88810e7906c6ae732099d335..0bedde84005f5c3fb183f9908934965469c46180 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-8.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-8.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-9.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-9.c
index 06bb695f7d12ac5b88810e7906c6ae732099d335..0bedde84005f5c3fb183f9908934965469c46180 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-9.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-9.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-1.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-1.c
index 0e76f676515103da349ec5160b93b6ebd3dacd6f..c3519cedba7bc30a71b572add9e07e38435a6b59 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-1.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -Wno-psabi" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -Wno-psabi" } */
 
 #include "riscv_vector.h"
 
@@ -13,4 +13,4 @@ void f(int8_t *base, int8_t *out, size_t vl, size_t m, vbool64_t mask) {
 }
 
 /* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf8,\s*t[au],\s*m[au]} 1 { target { no-opts "-O0" no-opts "-g" no-opts "-funroll-loops" } } } } */
-/* { dg-final { scan-assembler-times {vsetvli} 1 { target { no-opts "-O0" no-opts "-g" no-opts "-funroll-loops" } } } } */
\ No newline at end of file
+/* { dg-final { scan-assembler-times {vsetvli} 1 { target { no-opts "-O0" no-opts "-g" no-opts "-funroll-loops" } } } } */

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-10.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-10.c
index 3c7e0ec27b65a10af8ffca8aa93fdb06ef1f0a35..9a553097eefaa4ba6243a32dbcea77b6c0cf3e73 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-10.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-10.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-11.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-11.c
index b665bb84eb7d58d3f663dff5b157b4ca4e0bd7fa..81bb251e4b12715fbb8651ceedc7ad789157fcb2 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-11.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-11.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-12.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-12.c
index fc7e1cb249e2ddcf9def359a6cb7080f313db4b1..6fe28134c953f76102848a9f3cfb2a72b1a7f17c 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-12.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-12.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-13.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-13.c
index 1ea248dce889da2ef819ec44cc3bbc25b592d228..765ac30d4217d10037464058414543127b4ada5d 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-13.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-13.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-14.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-14.c
index 40d4af00419773787b6c03e2a2e94bdb56603266..992c2a143e47cc5091166826e532c1009434237e 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-14.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-14.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-15.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-15.c
index a1954e7a09a67ffd9e7e1d1dafd1feaaa1a31b5a..d218d04a75768f7e7d17d1547a8fb51c352e09b2 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-15.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-15.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-16.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-16.c
index 29e05c4982bedcc8d75364bd122b08812ba3d93b..d06203abd949bc78daa9db49b7d34f1e845bc454 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-16.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-16.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-17.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-17.c
index 8a1bbb40fc8a418876ae4979d6d334c9249a4046..fb05c116e8efc2c6cff1761e5f7d8bce73647474 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-17.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-17.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-18.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-18.c
index 5799220ec77decbf8c9f1f5480fc3ca993870d05..ee1501e0f340f3e5ce5e3ce9fa6f0026a4c12a3f 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-18.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-18.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-19.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-19.c
index 87ef3acc24daabe41984b30a3b331eb8a019ac9a..1544f02f65f7b1f3403fe34e2222514146234e36 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-19.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-19.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-2.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-2.c
index ff0171b3ff6c933faf3ee46afe3b1f2710858033..810f9f3cb256c318c1365941e68f256a8b5852ff 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-2.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-2.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-20.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-20.c
index d3f4a271ccfaa38abaf5ec6428059733cf83d83d..854568f3043a012ede34f6cc075827d5312b202a 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-20.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-20.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-21.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-21.c
index 551920c6a72ee5969f72f57f5d41c40aa6089ceb..c134f559b479e307d9cfa6c5a0859861bfd836c5 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-21.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-21.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-22.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-22.c
index 98df431bced67645ea908b5447a0d54f34c6c1ad..f519cd44cd50a46b9ef5009884613655436590a1 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-22.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-22.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-23.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-23.c
index e3d069ff32a8a73a4fa68587425b819d8c3c8570..e2b84d61a114b3a7863a5236c4e3d1bd50155dc6 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-23.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-23.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-24.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-24.c
index 1703c739f5e4d97117cc87ec2c45994384b7a1cc..493ef974cb2522fe0c76c2b77e8dac016b125dda 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-24.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-24.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv -mabi=lp64d" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv64gcv -mabi=lp64d" } */
 
 #include <riscv_vector.h>
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-3.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-3.c
index 13d09fc3fd17602c11a6972240248a6364b61b09..a7539b52840865320567c682c59276b20fe93886 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-3.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-3.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-4.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-4.c
index 41639317d0506a2c88e8784cdd91c91f831674cd..bfa798f2d7fc1390c30ecf43ff40d95aeb62232f 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-4.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-4.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-5.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-5.c
index e84e32b25094619a83e4faf6c7137eaf56befe92..6e1e44fea2ef1cc1af97bcc705230635ddc498a7 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-5.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-5.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-6.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-6.c
index fb7abdeb96865b724d881f053eb3d5aca5ad6c23..4e6cc906a36f008e32109a6d3c00185c28f0a01b 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-6.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-6.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-7.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-7.c
index 5fa2f2bc29476719eda027bdcbf7d797e156a9dc..762558f73b3aec0956facb42ff97ff94a535380b 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-7.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-7.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-8.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-8.c
index 55cc770cfde799d91818bc2c26c3a28ff0b5cf17..0b659fdbe238c19cac10d57a20cd8933c74dc103 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-8.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-8.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-9.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-9.c
index d07152ce7812cc5b12e344bc4d3792c36b93d42c..ef7d0224f98bed728cf109285604cc6e083183d1 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-9.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-9.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl_bug-1.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl_bug-1.c
index 45727a035b48acaf925de2fa0ee3997fbe220ef9..2cd966e4241a8b0b209d30b8bc56eda70e271d9c 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl_bug-1.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl_bug-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvl256b -mabi=lp64 --param=riscv-autovec-lmul=m8 --param=riscv-autovec-preference=fixed-vlmax -O2" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv64gcv_zvl256b -mabi=lp64 --param=riscv-autovec-lmul=m8 --param=riscv-autovec-preference=fixed-vlmax -O2" } */
 
 struct a_struct
 {

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl_bug-2.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl_bug-2.c
index bbc02eab8180ea305e6edb3140f1dab6b8956383..1b9f4d8e1b255b810cabbaf0d41ad3c5165ff3c5 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl_bug-2.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl_bug-2.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvl256b -mabi=lp64d --param=riscv-autovec-lmul=m4 -O3 -fomit-frame-pointer -funroll-loops" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv64gcv_zvl256b -mabi=lp64d --param=riscv-autovec-lmul=m4 -O3 -fomit-frame-pointer -funroll-loops" } */
 
 int safe_lshift_func_int32_t_s_s_left, safe_lshift_func_int32_t_s_s_right,
     safe_sub_func_uint64_t_u_u_ui2, safe_mul_func_uint64_t_u_u_ui2, g_79_2,

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl_int.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl_int.c
index 4cdd58777425b82d2899959654e1d9cba2694c37..f3403645f761990bb17197456c868382163a2032 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl_int.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl_int.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv -mabi=lp64d" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv64gcv -mabi=lp64d" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-1.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-1.c
index 96f169079500dfdf94a61c6c6fe693f178eefeeb..bec3928ff2ffa9ea199c1656f5d044bb159e2cd6 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-1.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-10.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-10.c
index 1204f83e6bd11d6f2134b504793522764807ab07..be509054ea566dfd5f80a2d6f6c1f230b48fe8c8 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-10.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-10.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-11.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-11.c
index 637b0a52295514b7ea85e8b725fc43f7c6314911..3cf6b169aeda1e61294c7b68b7f54642f1b0ac49 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-11.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-11.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-12.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-12.c
index e32994e5212f621503cf39ea04ad76503220ae7b..b9b6f266c9fb3ca30ce600febe86a7dd7b175031 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-12.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-12.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-13.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-13.c
index 0160d732fc38c540207de1a06032b70cd6d4c37d..65a8415207c702fedd890b2ab4e13fb28c272eca 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-13.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-13.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-14.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-14.c
index ae1db0a905fa7cda5f3e86fc476325caa2011057..08fd74f15f2d94d786aaa96bc3ac44928a6a76dc 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-14.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-14.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
 
 #include "riscv_vector.h"
 
@@ -15,4 +15,4 @@ void f(int8_t *base, int8_t *out, size_t vl, size_t m) {
 
 /* { dg-final { scan-assembler-times {\.L[0-9]+\:\s+vle8\.v\s+v[0-9]+,\s*0\s*\([a-x0-9]+\)} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-Oz" no-opts "-g" no-opts "-funroll-loops" } } } } */
 /* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e8,\s*mf8,\s*tu,\s*m[au]} 1 { target { no-opts "-O0" no-opts "-g" no-opts "-funroll-loops" } } } } */
-/* { dg-final { scan-assembler-times {vsetvli} 1 { target { no-opts "-O0" no-opts "-g" no-opts "-funroll-loops" } } } } */
\ No newline at end of file
+/* { dg-final { scan-assembler-times {vsetvli} 1 { target { no-opts "-O0" no-opts "-g" no-opts "-funroll-loops" } } } } */

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-15.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-15.c
index a8497210473125f39b335346be35f831fc7991cc..0143aa130ed61d81efd2653905d82a775de936e6 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-15.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-15.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-16.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-16.c
index 6cce6fe4282ef3f34d84e2aa5c7d65c215c1e26e..fe44fb3e8a3ec009f80456e952f46c2957657ac9 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-16.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-16.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
 
 #include "riscv_vector.h"
 
@@ -11,4 +11,4 @@ void foo(int32_t *in1, int32_t *in2, int32_t *in3, int32_t *out, size_t n, int c
   __riscv_vse32_v_i32m1(out, c, __riscv_vsetvlmax_e8mf2 ());
 }
 
-/* { dg-final { scan-assembler-times {vsetvli} 7 { target { no-opts "-O0" no-opts "-g" no-opts "-funroll-loops" } } } } */
\ No newline at end of file
+/* { dg-final { scan-assembler-times {vsetvli} 7 { target { no-opts "-O0" no-opts "-g" no-opts "-funroll-loops" } } } } */

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-17.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-17.c
index d28d6f866c4cce0aa891f4a15673d276d4332718..7d1f2e13dd001d70271683509545a77945ce8f3d 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-17.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-17.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
 
 #include "riscv_vector.h"
 
@@ -13,4 +13,4 @@ void foo(int32_t *in1, int32_t *in2, int32_t *in3, int32_t *out, size_t n, int c
   }
 }
 
-/* { dg-final { scan-assembler-times {vsetvli} 7 { target { no-opts "-O0" no-opts "-g" no-opts "-funroll-loops" } } } } */
\ No newline at end of file
+/* { dg-final { scan-assembler-times {vsetvli} 7 { target { no-opts "-O0" no-opts "-g" no-opts "-funroll-loops" } } } } */

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-18.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-18.c
index 8baedb0fef75eb13fdc7a0ec3210a63d02e14066..de4ba0af1f2cc4d27d6838322f780afa02bb92c1 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-18.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-18.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-19.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-19.c
index 1d77efb95399469c7e225fc25a0ad568836637fd..91c2a4f69200fcab7d360051c3b85bc54dc22744 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-19.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-19.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-2.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-2.c
index 853ffee14145f82fba19e78f6f7f3c09f772cd20..975ba97d25e1f48d8760856ddaca8191c0955b95 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-2.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-2.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-20.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-20.c
index 1102d7ec8302b7f6421f5ee3c470e377a3bb49cc..bfe575e0efb93cbae625b245f297332ffde72569 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-20.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-20.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
 
 #include "riscv_vector.h"
 
@@ -16,4 +16,4 @@ void foo(int32_t *in1, int32_t *in2, int32_t *in3, int32_t *out, size_t n, int c
   }
 }
 
-/* { dg-final { scan-assembler-times {vsetvli} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-g" no-opts "-funroll-loops" } } } } */
\ No newline at end of file
+/* { dg-final { scan-assembler-times {vsetvli} 1 { target { no-opts "-O0" no-opts "-O1" no-opts "-g" no-opts "-funroll-loops" } } } } */

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-3.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-3.c
index cc0135ffb8d4f5afd05d2d817eeab9aa04100b80..466f3a8d57e578d7e52497f1894040f18f81ee96 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-3.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-3.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-4.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-4.c
index 2a535b5f2a83fe892fc3d0957cd9fc38ead4701d..5acc2ac2f8a3a1da1a3e17e81fd168a19cd862a3 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-4.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-4.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-5.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-5.c
index 0e6b14ee3e9e2e6495c78c797736625ad41ab223..b2e33827e35165f016d4c629eb30418c5ded8b25 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-5.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-5.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-6.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-6.c
index c32f15d8224c5f261a02566d84131acd57f12be9..558690a47138352a962e439c19c3ee0c19afa373 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-6.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-6.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-7.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-7.c
index 15e9953746285b981036667fb69487ad90a627d4..a679f544402cbfef2a6b1390da1f1aaf398fb8ef 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-7.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-7.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-8.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-8.c
index caa2103da5dc2bb4b93217ecb396ad6982429043..d350752df536916f6515cdaa579d448170af49d0 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-8.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-8.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-9.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-9.c
index 1204f83e6bd11d6f2134b504793522764807ab07..be509054ea566dfd5f80a2d6f6c1f230b48fe8c8 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-9.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-9.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2" } */
 
 #include "riscv_vector.h"
 

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/wredsum_vlmax.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/wredsum_vlmax.c
index 5d1126786d393bf270c5076f528f487adce3f016..d36560b2bafdc133fe2c092bab263b0c9f2356df 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/wredsum_vlmax.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/wredsum_vlmax.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvl256b -mabi=lp64d --param=riscv-autovec-preference=fixed-vlmax -O3" } */
+/* { dg-options "--param=riscv-autovec-preference=scalable -march=rv64gcv_zvl256b -mabi=lp64d --param=riscv-autovec-preference=fixed-vlmax -O3" } */
 
 
 #include <stdint-gcc.h>