Build fixes for gcc-2.96 (which does not allow declarations after the

first statement in a block).

git-svn-id: svn://svn.valgrind.org/vex/trunk@1419

diff --git a/VEX/priv/guest-ppc32/ghelpers.c b/VEX/priv/guest-ppc32/ghelpers.c
index d1635666c1020fb9e53a4ffaf7fbc613867d77c5..2558a467466d8afb9884e84d0f6afa1cbd787453 100644 (file)
--- a/VEX/priv/guest-ppc32/ghelpers.c
+++ b/VEX/priv/guest-ppc32/ghelpers.c
@@ -104,19 +104,23 @@ ULong ppc32g_dirtyhelper_MFTB ( void )
 void ppc32g_dirtyhelper_LVS ( VexGuestPPC32State* gst,
                               UInt vD_idx, UInt sh, UInt dirn )
 {
-  vassert( vD_idx <= 31 );
-  vassert( sh     <= 15 );
-  vassert( dirn   <=  1 );
+  static
   UChar ref[32] = { 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
                     0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F,
                     0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17,
                     0x18, 0x19, 0x1A, 0x1B, 0x1C, 0x1D, 0x1E, 0x1F };
+  U128* pU128_src;
+  U128* pU128_dst;
+
+  vassert( vD_idx <= 31 );
+  vassert( sh     <= 15 );
+  vassert( dirn   <=  1 );
   if (dirn == 1) /* shift right */
-    sh = 16-sh;
+     sh = 16-sh;
   /* else shift left  */
 
-  U128* pU128_src = (U128*)&ref[sh];
-  U128* pU128_dst = &gst->guest_VR0 + (vD_idx*sizeof(gst->guest_VR0));
+  pU128_src = (U128*)&ref[sh];
+  pU128_dst = &gst->guest_VR0 + (vD_idx*sizeof(gst->guest_VR0));
 
   (*pU128_dst)[0] = (*pU128_src)[0];
   (*pU128_dst)[1] = (*pU128_src)[1];

diff --git a/VEX/priv/guest-ppc32/toIR.c b/VEX/priv/guest-ppc32/toIR.c
index 08b643ab461417b5a6dcfff3d830a9af58b68fa0..f0a93e45a832e590c67c94233206b850c48da6a4 100644 (file)
--- a/VEX/priv/guest-ppc32/toIR.c
+++ b/VEX/priv/guest-ppc32/toIR.c
@@ -788,11 +788,12 @@ static IRExpr* /* :: Ity_I32 */ getCRbit ( UInt bi )
    bit.  Indexing as per getCRbit. */
 static void putCRbit ( UInt bi, IRExpr* bit )
 {
+   UInt    n, off;
    IRExpr* safe;
    vassert(typeOfIRExpr(irbb->tyenv,bit) == Ity_I32);
    safe = binop(Iop_And32, bit, mkU32(1));
-   UInt n   = bi / 4;
-   UInt off = bi % 4;
+   n   = bi / 4;
+   off = bi % 4;
    vassert(bi < 32);
    if (off == 3) {
       /* This is the SO bit for this CR field */
@@ -1160,8 +1161,6 @@ static IRExpr* /* :: Ity_I32 */ get_XER_CA ( void )
 /* Set the CR6 flags following an AltiVec compare operation. */
 static void set_AV_CR6 ( IRExpr* result )
 {
-   vassert(typeOfIRExpr(irbb->tyenv,result) == Ity_V128);
-
    /* CR6[0:3] = {all_ones, 0, all_zeros, 0}
       all_ones  = (v[0] && v[1] && v[2] && v[3])
       all_zeros = ~(v[0] || v[1] || v[2] || v[3])
@@ -1172,6 +1171,9 @@ static void set_AV_CR6 ( IRExpr* result )
    IRTemp v3 = newTemp(Ity_V128);
    IRTemp rOnes  = newTemp(Ity_I8);
    IRTemp rZeros = newTemp(Ity_I8);
+
+   vassert(typeOfIRExpr(irbb->tyenv,result) == Ity_V128);
+
    assign( v0, result );
    assign( v1, binop(Iop_ShrV128, result, mkU8(32)) );
    assign( v2, binop(Iop_ShrV128, result, mkU8(64)) );
@@ -3274,9 +3276,7 @@ static Bool dis_int_shift ( UInt theInstr )
    UChar flag_Rc = toUChar((theInstr >>  0) & 1);    /* theInstr[0]     */
    
    IRTemp sh_amt = newTemp(Ity_I8);
-   IRTemp rb_b5  = newTemp(Ity_I32);
    IRTemp Rs     = newTemp(Ity_I32);
-   IRTemp Rs_sh  = newTemp(Ity_I32);
    IRTemp Ra     = newTemp(Ity_I32);
    IRTemp Rb     = newTemp(Ity_I32);
    IRTemp sh_amt32   = newTemp(Ity_I32);
@@ -4924,12 +4924,12 @@ static Bool dis_av_procctl ( UInt theInstr )
       break;
 
    case 0x644: { // mtvscr (Move to VSCR, AV p130)
+      IRTemp vB = newTemp(Ity_V128);
       if (vD_addr != 0 || vA_addr != 0) {
          vex_printf("dis_av_procctl(PPC32)(opc2,dst)\n");
          return False;
       }
       DIP("mtvscr v%d\n", vB_addr);
-      IRTemp vB = newTemp(Ity_V128);
       assign( vB, getVReg(vB_addr));
       putSPR( PPC32_SPR_VSCR, unop(Iop_V128to32, mkexpr(vB)) ); 
       break;
@@ -4966,13 +4966,13 @@ static Bool dis_av_load ( UInt theInstr )
    switch (opc2) {
 
    case 0x006: { // lvsl (Load Vector for Shift Left, AV p123)
-      DIP("lvsl v%d,r%d,r%d\n", vD_addr, rA_addr, rB_addr);
       IRExpr** args = mkIRExprVec_3(mkU32(vD_addr), mkexpr(EA), mkU32(0));
       IRDirty* d = unsafeIRDirty_0_N (
                       0/*regparms*/, 
                       "ppc32g_dirtyhelper_LVS",
                       &ppc32g_dirtyhelper_LVS,
                       args );
+      DIP("lvsl v%d,r%d,r%d\n", vD_addr, rA_addr, rB_addr);
       /* declare guest state effects */
       d->needsBBP = True;
       d->nFxState = 1;
@@ -4985,13 +4985,13 @@ static Bool dis_av_load ( UInt theInstr )
       break;
    }
    case 0x026: { // lvsr (Load Vector for Shift Right, AV p125)
-      DIP("lvsr v%d,r%d,r%d\n", vD_addr, rA_addr, rB_addr);
       IRExpr** args = mkIRExprVec_3(mkU32(vD_addr), mkexpr(EA), mkU32(1));
       IRDirty*    d = unsafeIRDirty_0_N (
                          0/*regparms*/, 
                          "ppc32g_dirtyhelper_LVS",
                          &ppc32g_dirtyhelper_LVS,
                          args );
+      DIP("lvsr v%d,r%d,r%d\n", vD_addr, rA_addr, rB_addr);
       /* declare guest state effects */
       d->needsBBP = True;
       d->nFxState = 1;
@@ -5071,9 +5071,9 @@ static Bool dis_av_store ( UInt theInstr )
 
    switch (opc2) {
    case 0x087: { // stvebx (Store Vector Byte Indexed, AV p131)
-      DIP("stvebx v%d,r%d,r%d\n", vS_addr, rA_addr, rB_addr);
       IRTemp eb  = newTemp(Ity_I8);
       IRTemp idx = newTemp(Ity_I8);
+      DIP("stvebx v%d,r%d,r%d\n", vS_addr, rA_addr, rB_addr);
       assign( eb, binop(Iop_And8, mkU8(0xF),
                         unop(Iop_32to8, mkexpr(EA) )) );
       assign( idx, binop(Iop_Shl8, binop(Iop_Sub8, mkU8(15), mkexpr(eb)),
@@ -5098,9 +5098,9 @@ static Bool dis_av_store ( UInt theInstr )
       break;
    }
    case 0x0C7: { // stvewx (Store Vector Word Indexed, AV p133)
-      DIP("stvewx v%d,r%d,r%d\n", vS_addr, rA_addr, rB_addr);
       IRTemp eb  = newTemp(Ity_I8);
       IRTemp idx = newTemp(Ity_I8);
+      DIP("stvewx v%d,r%d,r%d\n", vS_addr, rA_addr, rB_addr);
       assign( EA_aligned, binop( Iop_And32, mkexpr(EA), mkU32(0xFFFFFFFC) ));
       assign( eb, binop(Iop_And8, mkU8(0xF),
                         unop(Iop_32to8, mkexpr(EA_aligned) )) );
@@ -5602,6 +5602,7 @@ static Bool dis_av_multarith ( UInt theInstr )
    UChar vC_addr  = toUChar((theInstr >>  6) & 0x1F); /* theInstr[6:10]  */
    UChar opc2     = toUChar((theInstr >>  0) & 0x3F); /* theInstr[0:5]   */
 
+   IRTemp zeros = newTemp(Ity_V128);
    IRTemp vA = newTemp(Ity_V128);
    IRTemp vB = newTemp(Ity_V128);
    IRTemp vC = newTemp(Ity_V128);
@@ -5614,13 +5615,11 @@ static Bool dis_av_multarith ( UInt theInstr )
       return False;
    }
 
-   IRTemp zeros = newTemp(Ity_V128);
    assign( zeros, unop(Iop_Dup32x4, mkU32(0)) );
 
    switch (opc2) {
    /* Multiply-Add */
    case 0x20: { // vmhaddshs (Multiply High, Add Signed HW Saturate, AV p185)
-      DIP("vmhaddshs v%d,v%d,v%d,v%d\n", vD_addr, vA_addr, vB_addr, vC_addr);
       IRTemp aLo = newTemp(Ity_V128);
       IRTemp bLo = newTemp(Ity_V128);
       IRTemp cLo = newTemp(Ity_V128);
@@ -5630,6 +5629,7 @@ static Bool dis_av_multarith ( UInt theInstr )
       IRTemp cHi = newTemp(Ity_V128);
       IRTemp zHi = newTemp(Ity_V128);
       IRTemp cSigns = newTemp(Ity_V128);
+      DIP("vmhaddshs v%d,v%d,v%d,v%d\n", vD_addr, vA_addr, vB_addr, vC_addr);
       assign( cSigns, binop(Iop_CmpGT16Sx8, mkexpr(zeros), mkexpr(vC)) );
       assign( aLo, binop(Iop_InterleaveLO16x8, mkexpr(zeros),  mkexpr(vA)) );
       assign( bLo, binop(Iop_InterleaveLO16x8, mkexpr(zeros),  mkexpr(vB)) );
@@ -5654,7 +5654,6 @@ static Bool dis_av_multarith ( UInt theInstr )
       break;
    }
    case 0x21: { // vmhraddshs (Multiply High Round, Add Signed HW Saturate, AV p186)
-      DIP("vmhraddshs v%d,v%d,v%d,v%d\n", vD_addr, vA_addr, vB_addr, vC_addr);
       IRTemp zKonst = newTemp(Ity_V128);
       IRTemp aLo = newTemp(Ity_V128);
       IRTemp bLo = newTemp(Ity_V128);
@@ -5665,6 +5664,7 @@ static Bool dis_av_multarith ( UInt theInstr )
       IRTemp cHi = newTemp(Ity_V128);
       IRTemp zHi = newTemp(Ity_V128);
       IRTemp cSigns = newTemp(Ity_V128);
+      DIP("vmhraddshs v%d,v%d,v%d,v%d\n", vD_addr, vA_addr, vB_addr, vC_addr);
       assign( cSigns, binop(Iop_CmpGT16Sx8, mkexpr(zeros), mkexpr(vC)) );
       assign( aLo, binop(Iop_InterleaveLO16x8, mkexpr(zeros),  mkexpr(vA)) );
       assign( bLo, binop(Iop_InterleaveLO16x8, mkexpr(zeros),  mkexpr(vB)) );
@@ -5695,7 +5695,6 @@ static Bool dis_av_multarith ( UInt theInstr )
       break;
    }
    case 0x22: { // vmladduhm (Multiply Low, Add Unsigned HW Modulo, AV p194)
-      DIP("vmladduhm v%d,v%d,v%d,v%d\n", vD_addr, vA_addr, vB_addr, vC_addr);
       IRTemp aLo = newTemp(Ity_V128);
       IRTemp bLo = newTemp(Ity_V128);
       IRTemp cLo = newTemp(Ity_V128);
@@ -5704,6 +5703,7 @@ static Bool dis_av_multarith ( UInt theInstr )
       IRTemp bHi = newTemp(Ity_V128);
       IRTemp cHi = newTemp(Ity_V128);
       IRTemp zHi = newTemp(Ity_V128);
+      DIP("vmladduhm v%d,v%d,v%d,v%d\n", vD_addr, vA_addr, vB_addr, vC_addr);
       assign( aLo, binop(Iop_InterleaveLO16x8, mkexpr(zeros), mkexpr(vA)) );
       assign( bLo, binop(Iop_InterleaveLO16x8, mkexpr(zeros), mkexpr(vB)) );
       assign( cLo, binop(Iop_InterleaveLO16x8, mkexpr(zeros), mkexpr(vC)) );
@@ -5723,7 +5723,6 @@ static Bool dis_av_multarith ( UInt theInstr )
 
    /* Multiply-Sum */
    case 0x24: { // vmsumubm (Multiply Sum Unsigned B Modulo, AV p204)
-      DIP("vmsumubm v%d,v%d,v%d,v%d\n", vD_addr, vA_addr, vB_addr, vC_addr);
       IRTemp zKonst = newTemp(Ity_V128);
       IRTemp odd = newTemp(Ity_V128);
       IRTemp even = newTemp(Ity_V128);
@@ -5731,6 +5730,7 @@ static Bool dis_av_multarith ( UInt theInstr )
       IRTemp odd_even = newTemp(Ity_V128);
       IRTemp even_odd = newTemp(Ity_V128);
       IRTemp even_even = newTemp(Ity_V128);
+      DIP("vmsumubm v%d,v%d,v%d,v%d\n", vD_addr, vA_addr, vB_addr, vC_addr);
       assign( odd,  binop(Iop_MulLo16Ux8, mkexpr(vA), mkexpr(vB)) );
       assign( even, binop(Iop_MulHi16Ux8, mkexpr(vA), mkexpr(vB)) );
       /* zKonst just used to separate the lanes out */
@@ -5754,9 +5754,9 @@ static Bool dis_av_multarith ( UInt theInstr )
       return False;
 
    case 0x26: { // vmsumuhm (Multiply Sum Unsigned HW Modulo, AV p205)
-      DIP("vmsumuhm v%d,v%d,v%d,v%d\n", vD_addr, vA_addr, vB_addr, vC_addr);
       IRTemp odd = newTemp(Ity_V128);
       IRTemp even = newTemp(Ity_V128);
+      DIP("vmsumuhm v%d,v%d,v%d,v%d\n", vD_addr, vA_addr, vB_addr, vC_addr);
       assign( odd,  binop(Iop_MulLo32Ux4, mkexpr(vA), mkexpr(vB)) );
       assign( even, binop(Iop_MulHi32Ux4, mkexpr(vA), mkexpr(vB)) );
       putVReg( vD_addr,
@@ -5770,9 +5770,9 @@ static Bool dis_av_multarith ( UInt theInstr )
       return False;
 
    case 0x28: { // vmsumshm (Multiply Sum Signed HW Modulo, AV p202)
-      DIP("vmsumshm v%d,v%d,v%d,v%d\n", vD_addr, vA_addr, vB_addr, vC_addr);
       IRTemp odd = newTemp(Ity_V128);
       IRTemp even = newTemp(Ity_V128);
+      DIP("vmsumshm v%d,v%d,v%d,v%d\n", vD_addr, vA_addr, vB_addr, vC_addr);
       assign( odd,  binop(Iop_MulLo32Sx4, mkexpr(vA), mkexpr(vB)) );
       assign( even, binop(Iop_MulHi32Sx4, mkexpr(vA), mkexpr(vB)) );
       putVReg( vD_addr,
@@ -5848,8 +5848,8 @@ static Bool dis_av_shift ( UInt theInstr )
       break;
 
    case 0x1C4: { // vsl (Shift Left, AV p239)
-      DIP("vsl v%d,v%d,v%d\n", vD_addr, vA_addr, vB_addr);
       IRTemp sh = newTemp(Ity_I8);
+      DIP("vsl v%d,v%d,v%d\n", vD_addr, vA_addr, vB_addr);
       assign( sh, binop(Iop_And8, mkU8(0x7),
                         unop(Iop_32to8,
                              unop(Iop_V128to32, mkexpr(vB)))) );
@@ -5858,8 +5858,8 @@ static Bool dis_av_shift ( UInt theInstr )
       break;
    }
    case 0x40C: { // vslo (Shift Left by Octet, AV p243)
-      DIP("vslo v%d,v%d,v%d\n", vD_addr, vA_addr, vB_addr);
       IRTemp sh = newTemp(Ity_I8);
+      DIP("vslo v%d,v%d,v%d\n", vD_addr, vA_addr, vB_addr);
       assign( sh, binop(Iop_And8, mkU8(0x78),
                         unop(Iop_32to8,
                              unop(Iop_V128to32, mkexpr(vB)))) );
@@ -5886,8 +5886,8 @@ static Bool dis_av_shift ( UInt theInstr )
       break;
 
    case 0x2C4: { // vsr (Shift Right, AV p251)
-      DIP("vsr v%d,v%d,v%d\n", vD_addr, vA_addr, vB_addr);
       IRTemp sh = newTemp(Ity_I8);
+      DIP("vsr v%d,v%d,v%d\n", vD_addr, vA_addr, vB_addr);
       assign( sh, binop(Iop_And8, mkU8(0x7),
                         unop(Iop_32to8,
                              unop(Iop_V128to32, mkexpr(vB)))) );
@@ -5911,8 +5911,8 @@ static Bool dis_av_shift ( UInt theInstr )
       break;
 
    case 0x44C: { // vsro (Shift Right by Octet, AV p258)
-      DIP("vsro v%d,v%d,v%d\n", vD_addr, vA_addr, vB_addr);
       IRTemp sh = newTemp(Ity_I8);
+      DIP("vsro v%d,v%d,v%d\n", vD_addr, vA_addr, vB_addr);
       assign( sh, binop(Iop_And8, mkU8(0x78),
                         unop(Iop_32to8,
                              unop(Iop_V128to32, mkexpr(vB)))) );
@@ -5968,11 +5968,11 @@ static Bool dis_av_permute ( UInt theInstr )
       return True;
      
    case 0x2B: { // vperm (Permute, AV p218)
-      DIP("vperma v%d,v%d,v%d,v%d\n", vD_addr, vA_addr, vB_addr, vC_addr);
       /* limited to two args for IR, so have to play games... */
       IRTemp a_perm = newTemp(Ity_V128);
       IRTemp b_perm = newTemp(Ity_V128);
       IRTemp mask = newTemp(Ity_V128);
+      DIP("vperma v%d,v%d,v%d,v%d\n", vD_addr, vA_addr, vB_addr, vC_addr);
       assign( a_perm, binop(Iop_Perm, mkexpr(vA), mkexpr(vC)) );
       assign( b_perm, binop(Iop_Perm, mkexpr(vB), mkexpr(vC)) );
       // mask[i8] = (vC[i8]_4 == 1) ? 0xFF : 0x0
@@ -6049,26 +6049,26 @@ static Bool dis_av_permute ( UInt theInstr )
 
    /* Splat */
    case 0x20C: { // vspltb (Splat Byte, AV p245)
-      DIP("vspltb v%d,v%d,%d\n", vD_addr, vB_addr, UIMM_5);
       /* vD = Dup8x16( vB[UIMM_5] ) */
       UChar sh_uimm = (15-UIMM_5)*8;
+      DIP("vspltb v%d,v%d,%d\n", vD_addr, vB_addr, UIMM_5);
       putVReg( vD_addr, unop(Iop_Dup8x16,
            unop(Iop_32to8, unop(Iop_V128to32, 
                 binop(Iop_ShrV128, mkexpr(vB), mkU8(sh_uimm))))) );
       break;
    }
    case 0x24C: { // vsplth (Splat Half Word, AV p246)
-      DIP("vsplth v%d,v%d,%d\n", vD_addr, vB_addr, UIMM_5);
       UChar sh_uimm = (7-UIMM_5)*16;
+      DIP("vsplth v%d,v%d,%d\n", vD_addr, vB_addr, UIMM_5);
       putVReg( vD_addr, unop(Iop_Dup16x8,
            unop(Iop_32to16, unop(Iop_V128to32, 
                 binop(Iop_ShrV128, mkexpr(vB), mkU8(sh_uimm))))) );
       break;
    }
    case 0x28C: { // vspltw (Splat Word, AV p250)
-      DIP("vspltw v%d,v%d,%d\n", vD_addr, vB_addr, UIMM_5);
       /* vD = Dup32x4( vB[UIMM_5] ) */
       UChar sh_uimm = (3-UIMM_5)*32;
+      DIP("vspltw v%d,v%d,%d\n", vD_addr, vB_addr, UIMM_5);
       putVReg( vD_addr, unop(Iop_Dup32x4,
          unop(Iop_V128to32,
               binop(Iop_ShrV128, mkexpr(vB), mkU8(sh_uimm)))) );
@@ -6107,6 +6107,8 @@ static Bool dis_av_pack ( UInt theInstr )
    UChar vB_addr  = toUChar((theInstr >> 11) & 0x1F); /* theInstr[11:15] */
    UInt  opc2     =         (theInstr >>  0) & 0x7FF; /* theInstr[0:10]  */
 
+   IRTemp signs = IRTemp_INVALID;
+   IRTemp zeros = IRTemp_INVALID;
    IRTemp vA = newTemp(Ity_V128);
    IRTemp vB = newTemp(Ity_V128);
    assign( vA, getVReg(vA_addr));
@@ -6142,12 +6144,12 @@ static Bool dis_av_pack ( UInt theInstr )
       return True;
 
    case 0x10E: { // vpkshus (Pack Signed HW Unsigned Saturate, AV p221)
-      DIP("vpkshus v%d,v%d,v%d\n", vD_addr, vA_addr, vB_addr);
       // This insn does a signed->unsigned saturating conversion.
       // Conversion done here, then uses unsigned->unsigned vpk insn:
       //  => UnsignedSaturatingNarrow( x & ~ (x >>s 15) )
       IRTemp vA_tmp = newTemp(Ity_V128);
       IRTemp vB_tmp = newTemp(Ity_V128);
+      DIP("vpkshus v%d,v%d,v%d\n", vD_addr, vA_addr, vB_addr);
       assign( vA_tmp, binop(Iop_AndV128, mkexpr(vA),
                             unop(Iop_NotV128,
                                  binop(Iop_SarN16x8,
@@ -6162,12 +6164,12 @@ static Bool dis_av_pack ( UInt theInstr )
       return True;
    }
    case 0x14E: { // vpkswus (Pack Signed W Unsigned Saturate, AV p223)
-      DIP("vpkswus v%d,v%d,v%d\n", vD_addr, vA_addr, vB_addr);
       // This insn does a signed->unsigned saturating conversion.
       // Conversion done here, then uses unsigned->unsigned vpk insn:
       //  => UnsignedSaturatingNarrow( x & ~ (x >>s 31) )
       IRTemp vA_tmp = newTemp(Ity_V128);
       IRTemp vB_tmp = newTemp(Ity_V128);
+      DIP("vpkswus v%d,v%d,v%d\n", vD_addr, vA_addr, vB_addr);
       assign( vA_tmp, binop(Iop_AndV128, mkexpr(vA),
                             unop(Iop_NotV128,
                                  binop(Iop_SarN32x4,
@@ -6194,7 +6196,6 @@ static Bool dis_av_pack ( UInt theInstr )
       return True;
 
    case 0x30E: { // vpkpx (Pack Pixel, AV p219)
-      DIP("vpkpx v%d,v%d,v%d\n", vD_addr, vA_addr, vB_addr);
       /* CAB: Worth a new primop? */
       /* Using shifts to compact pixel elements, then packing them them */
       IRTemp a1 = newTemp(Ity_V128);
@@ -6205,6 +6206,7 @@ static Bool dis_av_pack ( UInt theInstr )
       IRTemp b2 = newTemp(Ity_V128);
       IRTemp b3 = newTemp(Ity_V128);
       IRTemp b_tmp = newTemp(Ity_V128);
+      DIP("vpkpx v%d,v%d,v%d\n", vD_addr, vA_addr, vB_addr);
       assign( a1, binop(Iop_ShlN16x8,
                         binop(Iop_ShrN32x4, mkexpr(vA), mkU8(19)),
                         mkU8(10)) );
@@ -6244,8 +6246,8 @@ static Bool dis_av_pack ( UInt theInstr )
       return False;
    }
 
-   IRTemp signs = newTemp(Ity_V128);
-   IRTemp zeros = newTemp(Ity_V128);
+   signs = newTemp(Ity_V128);
+   zeros = newTemp(Ity_V128);
    assign( zeros, unop(Iop_Dup32x4, mkU32(0)) );
 
    switch (opc2) {
@@ -6275,7 +6277,6 @@ static Bool dis_av_pack ( UInt theInstr )
       break;
    }
    case 0x34E: { // vupkhpx (Unpack High Pixel16, AV p276)
-      DIP("vupkhpx v%d,v%d\n", vD_addr, vB_addr);
       /* CAB: Worth a new primop? */
       /* Using shifts to isolate pixel elements, then expanding them */
       IRTemp z0  = newTemp(Ity_V128);
@@ -6284,6 +6285,7 @@ static Bool dis_av_pack ( UInt theInstr )
       IRTemp z2  = newTemp(Ity_V128);
       IRTemp z3  = newTemp(Ity_V128);
       IRTemp z23 = newTemp(Ity_V128);
+      DIP("vupkhpx v%d,v%d\n", vD_addr, vB_addr);
       assign( z0,  binop(Iop_ShlN16x8,
                          binop(Iop_SarN16x8, mkexpr(vB), mkU8(15)),
                          mkU8(8)) );
@@ -6308,7 +6310,6 @@ static Bool dis_av_pack ( UInt theInstr )
       break;
    }
    case 0x3CE: { // vupklpx (Unpack Low Pixel16, AV p279)
-      DIP("vupklpx v%d,v%d\n", vD_addr, vB_addr);
       /* identical to vupkhpx, except interleaving LO */
       IRTemp z0  = newTemp(Ity_V128);
       IRTemp z1  = newTemp(Ity_V128);
@@ -6316,6 +6317,7 @@ static Bool dis_av_pack ( UInt theInstr )
       IRTemp z2  = newTemp(Ity_V128);
       IRTemp z3  = newTemp(Ity_V128);
       IRTemp z23 = newTemp(Ity_V128);
+      DIP("vupklpx v%d,v%d\n", vD_addr, vB_addr);
       assign( z0,  binop(Iop_ShlN16x8,
                          binop(Iop_SarN16x8, mkexpr(vB), mkU8(15)),
                          mkU8(8)) );

diff --git a/VEX/priv/host-ppc32/hdefs.c b/VEX/priv/host-ppc32/hdefs.c
index 4dc4ab6e8b94d26991e94da210b010dc4d25a87e..4d6815eac0f4f32de58c0aaab3c070fd267accd1 100644 (file)
--- a/VEX/priv/host-ppc32/hdefs.c
+++ b/VEX/priv/host-ppc32/hdefs.c
@@ -1313,12 +1313,13 @@ void ppPPC32Instr ( PPC32Instr* i )
       return;
 
    case Pin_AvLdSt: {
-      UChar sz = i->Pin.AvLdSt.sz;
+      UChar  sz = i->Pin.AvLdSt.sz;
+      HChar* str_size;
       if (i->Pin.AvLdSt.addr->tag == Pam_IR) {
          ppLoadImm(hregPPC32_GPR30(), i->Pin.AvLdSt.addr->Pam.RR.index);
          vex_printf(" ; ");
       }
-      char* str_size = sz==1 ? "eb" : sz==2 ? "eh" : sz==4 ? "ew" : "";
+      str_size = sz==1 ? "eb" : sz==2 ? "eh" : sz==4 ? "ew" : "";
       if (i->Pin.AvLdSt.isLoad)
          vex_printf("lv%sx ", str_size);
       else
@@ -3121,18 +3122,20 @@ Int emit_PPC32Instr ( UChar* buf, Int nbuf, PPC32Instr* i )
       vassert(sz == 8 || sz == 16 || sz == 32);
 
       if (i->Pin.AvSplat.src->tag == Pvi_Imm) {
+         Char simm5;
          opc2 = (sz == 8) ? 780 : (sz == 16) ? 844 : 908;   // 8,16,32
          /* expects 5-bit-signed-imm */
-         Char simm5 = i->Pin.AvSplat.src->Pvi.Imm5s;
+         simm5 = i->Pin.AvSplat.src->Pvi.Imm5s;
          vassert(simm5 >= -16 && simm5 <= 15);
          simm5 = simm5 & 0x1F;
          p = mkFormVX( p, 4, v_dst, (UInt)simm5, 0, opc2 );
       }
       else {  // Pri_Reg
+         UInt lowest_lane;
          opc2 = (sz == 8) ? 524 : (sz == 16) ? 588 : 652;  // 8,16,32
          vassert(hregClass(i->Pin.AvSplat.src->Pvi.Reg) == HRcVec128);
          v_src = vregNo(i->Pin.AvSplat.src->Pvi.Reg);
-         UInt lowest_lane = (128/sz)-1;
+         lowest_lane = (128/sz)-1;
          p = mkFormVX( p, 4, v_dst, lowest_lane, v_src, opc2 );
       }
       goto done;

diff --git a/VEX/priv/host-ppc32/isel.c b/VEX/priv/host-ppc32/isel.c
index f3665c1830d719ac7efaa03f2793a63c0ce9e132..974d64518fa4c98579f4c662c93e95fc3ea67fc8 100644 (file)
--- a/VEX/priv/host-ppc32/isel.c
+++ b/VEX/priv/host-ppc32/isel.c
@@ -761,13 +761,13 @@ void set_FPU_rounding_mode ( ISelEnv* env, IRExpr* mode )
 */
 static HReg mk_AvDuplicateRI( ISelEnv* env, IRExpr* e )
 {
+   HReg     r_src;
    HReg     dst = newVRegV(env);
    PPC32RI* ri  = iselIntExpr_RI(env, e);
    IRType   ty  = typeOfIRExpr(env->type_env,e);
    UInt     sz  = (ty == Ity_I8) ? 8 : (ty == Ity_I16) ? 16 : 32;
    vassert(ty == Ity_I8 || ty == Ity_I16 || ty == Ity_I32);
 
-   HReg r_src;
    /* special case: immediate */
    if (ri->tag == Pri_Imm) {
       Int simm32 = (Int)ri->Pri.Imm;
@@ -815,13 +815,13 @@ static HReg mk_AvDuplicateRI( ISelEnv* env, IRExpr* e )
    {
       /* CAB: Perhaps faster to store r_src multiple times (sz dependent),
               and simply load the vector? */
-
+      HReg r_aligned16;
       HReg v_src = newVRegV(env);
       PPC32AMode *am_off12;
 
       sub_from_sp( env, 32 );     // Move SP down
       /* Get a 16-aligned address within our stack space */
-      HReg r_aligned16 = get_sp_aligned16( env );
+      r_aligned16 = get_sp_aligned16( env );
       am_off12 = PPC32AMode_IR( 12, r_aligned16);
 
       /* Store r_src in low word of 16-aligned mem */
@@ -1295,13 +1295,14 @@ static HReg iselIntExpr_R_wrk ( ISelEnv* env, IRExpr* e )
       }
 
       case Iop_V128to32: {
+         HReg        r_aligned16;
          HReg        dst  = newVRegI(env);
          HReg        vec  = iselVecExpr(env, e->Iex.Unop.arg);
          PPC32AMode *am_off0, *am_off12;
          sub_from_sp( env, 32 );     // Move SP down 32 bytes
 
          // get a quadword aligned address within our stack space
-         HReg r_aligned16 = get_sp_aligned16( env );
+         r_aligned16 = get_sp_aligned16( env );
          am_off0  = PPC32AMode_IR( 0, r_aligned16 );
          am_off12 = PPC32AMode_IR( 12,r_aligned16 );
 
@@ -1802,16 +1803,14 @@ r_l, PPC32RH_Imm(False,0)));
            || e->Iex.Binop.op == Iop_CmpLT32U
            || e->Iex.Binop.op == Iop_CmpLE32S
            || e->Iex.Binop.op == Iop_CmpLE32U)) {
-      HReg     r1  = iselIntExpr_R(env, e->Iex.Binop.arg1);
-
+      PPC32RH* ri2;
+      HReg r1 = iselIntExpr_R(env, e->Iex.Binop.arg1);
       Bool syned = False;
       if (e->Iex.Binop.op == Iop_CmpLT32S ||
           e->Iex.Binop.op == Iop_CmpLE32S) {
          syned = True;
       }
-
-      PPC32RH* ri2 = iselIntExpr_RH(env, syned, e->Iex.Binop.arg2);
-
+      ri2 = iselIntExpr_RH(env, syned, e->Iex.Binop.arg2);
       addInstr(env, PPC32Instr_Cmp32(syned,7,r1,ri2));
 
       switch (e->Iex.Binop.op) {
@@ -2428,6 +2427,7 @@ static void iselInt64Expr_wrk ( HReg* rHi, HReg* rLo, ISelEnv* env, IRExpr* e )
          /* V128{HI}to64 */
          case Iop_V128HIto64:
          case Iop_V128to64: {
+            HReg r_aligned16;
             Int  off = e->Iex.Unop.op==Iop_V128HIto64 ? 0 : 8;
             HReg tLo = newVRegI(env);
             HReg tHi = newVRegI(env);
@@ -2436,7 +2436,7 @@ static void iselInt64Expr_wrk ( HReg* rHi, HReg* rLo, ISelEnv* env, IRExpr* e )
             sub_from_sp( env, 32 );     // Move SP down 32 bytes
 
             // get a quadword aligned address within our stack space
-            HReg r_aligned16 = get_sp_aligned16( env );
+            r_aligned16 = get_sp_aligned16( env );
             am_off0  = PPC32AMode_IR( 0,     r_aligned16 );
             am_offHI = PPC32AMode_IR( off,   r_aligned16 );
             am_offLO = PPC32AMode_IR( off+4, r_aligned16 );
@@ -3086,20 +3086,21 @@ static HReg iselVecExpr_wrk ( ISelEnv* env, IRExpr* e )
 //..       }
 
       case Iop_32UtoV128: {
+         HReg r_aligned16, r_zeros;
          HReg r_src = iselIntExpr_R(env, e->Iex.Unop.arg);
          HReg   dst = newVRegV(env);
          PPC32AMode *am_off0, *am_off4, *am_off8, *am_off12;
          sub_from_sp( env, 32 );     // Move SP down
 
          /* Get a quadword aligned address within our stack space */
-         HReg r_aligned16 = get_sp_aligned16( env );
+         r_aligned16 = get_sp_aligned16( env );
          am_off0  = PPC32AMode_IR( 0,  r_aligned16);
          am_off4  = PPC32AMode_IR( 4,  r_aligned16);
          am_off8  = PPC32AMode_IR( 8,  r_aligned16);
          am_off12 = PPC32AMode_IR( 12, r_aligned16);
 
-         /* Store zero's */
-         HReg r_zeros = newVRegI(env);
+         /* Store zeros */
+         r_zeros = newVRegI(env);
          addInstr(env, PPC32Instr_LI32(r_zeros, 0x0));
          addInstr(env, PPC32Instr_Store( 4, am_off0, r_zeros ));
          addInstr(env, PPC32Instr_Store( 4, am_off4, r_zeros ));
@@ -3170,14 +3171,14 @@ static HReg iselVecExpr_wrk ( ISelEnv* env, IRExpr* e )
 //..       }
 //.. 
       case Iop_64HLtoV128: {
-         HReg r3, r2, r1, r0;
+         HReg r3, r2, r1, r0, r_aligned16;
          PPC32AMode *am_off0, *am_off4, *am_off8, *am_off12;
          HReg        dst = newVRegV(env);
          /* do this via the stack (easy, convenient, etc) */
          sub_from_sp( env, 32 );        // Move SP down
 
          // get a quadword aligned address within our stack space
-         HReg r_aligned16 = get_sp_aligned16( env );
+         r_aligned16 = get_sp_aligned16( env );
          am_off0  = PPC32AMode_IR( 0,  r_aligned16);
          am_off4  = PPC32AMode_IR( 4,  r_aligned16);
          am_off8  = PPC32AMode_IR( 8,  r_aligned16);