--- /dev/null
+From 8c38d28ba8da98f7102c31d35359b4dbe9d1f329 Mon Sep 17 00:00:00 2001
+From: Tobias Jakobi <tjakobi@math.uni-bielefeld.de>
+Date: Wed, 22 Oct 2014 03:37:08 +0200
+Subject: clocksource: exynos_mct: Fix bitmask regression for exynos4_mct_write
+
+From: Tobias Jakobi <tjakobi@math.uni-bielefeld.de>
+
+commit 8c38d28ba8da98f7102c31d35359b4dbe9d1f329 upstream.
+
+EXYNOS4_MCT_L_MASK is defined as 0xffffff00, so applying this bitmask
+produces a number outside the range 0x00 to 0xff, which always results
+in execution of the default switch statement.
+
+Obviously this is wrong and git history shows that the bitmask inversion
+was incorrectly set during a refactoring of the MCT code.
+
+Fix this by putting the inversion at the correct position again.
+
+Acked-by: Kukjin Kim <kgene.kim@samsung.com>
+Reported-by: GP Orcullo <kinsamanka@gmail.com>
+Reviewed-by: Doug Anderson <dianders@chromium.org>
+Signed-off-by: Tobias Jakobi <tjakobi@math.uni-bielefeld.de>
+Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/clocksource/exynos_mct.c | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+--- a/drivers/clocksource/exynos_mct.c
++++ b/drivers/clocksource/exynos_mct.c
+@@ -97,8 +97,8 @@ static void exynos4_mct_write(unsigned i
+ writel_relaxed(value, reg_base + offset);
+
+ if (likely(offset >= EXYNOS4_MCT_L_BASE(0))) {
+- stat_addr = (offset & ~EXYNOS4_MCT_L_MASK) + MCT_L_WSTAT_OFFSET;
+- switch (offset & EXYNOS4_MCT_L_MASK) {
++ stat_addr = (offset & EXYNOS4_MCT_L_MASK) + MCT_L_WSTAT_OFFSET;
++ switch (offset & ~EXYNOS4_MCT_L_MASK) {
+ case MCT_L_TCON_OFFSET:
+ mask = 1 << 3; /* L_TCON write status */
+ break;
--- /dev/null
+From 91d1179212161f220938198b742c328ad38fd0a3 Mon Sep 17 00:00:00 2001
+From: Gavin Li <git@thegavinli.com>
+Date: Tue, 6 Jan 2015 18:47:23 -0800
+Subject: irqchip: atmel-aic-common: Prevent clobbering of priority when changing IRQ type
+
+From: Gavin Li <git@thegavinli.com>
+
+commit 91d1179212161f220938198b742c328ad38fd0a3 upstream.
+
+This patch makes the bitmask for AIC_SRCTYPE consistent
+with that of its valid values, and prevents the priority
+field at bits 2:0 from being clobbered by an incorrect
+AND with the AIC_SRCTYPE mask.
+
+Signed-off-by: Gavin Li <gavinli@thegavinli.com>
+Acked-by: Boris Brezillon <boris.brezillon@free-electrons.com>
+Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
+Link: https://lkml.kernel.org/r/1420598843-8409-1-git-send-email-gavinli@thegavinli.com
+Signed-off-by: Jason Cooper <jason@lakedaemon.net>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/irqchip/irq-atmel-aic-common.c | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+--- a/drivers/irqchip/irq-atmel-aic-common.c
++++ b/drivers/irqchip/irq-atmel-aic-common.c
+@@ -28,7 +28,7 @@
+ #define AT91_AIC_IRQ_MIN_PRIORITY 0
+ #define AT91_AIC_IRQ_MAX_PRIORITY 7
+
+-#define AT91_AIC_SRCTYPE GENMASK(7, 6)
++#define AT91_AIC_SRCTYPE GENMASK(6, 5)
+ #define AT91_AIC_SRCTYPE_LOW (0 << 5)
+ #define AT91_AIC_SRCTYPE_FALLING (1 << 5)
+ #define AT91_AIC_SRCTYPE_HIGH (2 << 5)
+@@ -74,7 +74,7 @@ int aic_common_set_type(struct irq_data
+ return -EINVAL;
+ }
+
+- *val &= AT91_AIC_SRCTYPE;
++ *val &= ~AT91_AIC_SRCTYPE;
+ *val |= aic_type;
+
+ return 0;
arm-mvebu-completely-disable-hardware-i-o-coherency.patch
bus-mvebu-mbus-fix-support-of-mbus-window-13.patch
fix-deadlock-in-cifs_ioctl_clone.patch
+irqchip-atmel-aic-common-prevent-clobbering-of-priority-when-changing-irq-type.patch
+x86-irq-properly-tag-virtualization-entry-in-proc-interrupts.patch
+clocksource-exynos_mct-fix-bitmask-regression-for-exynos4_mct_write.patch
+x86-hyperv-mark-the-hyper-v-clocksource-as-being-continuous.patch
+x86-tsc-change-fast-tsc-calibration-failed-from-error-to-info.patch
+x86-boot-skip-relocs-when-load-address-unchanged.patch
--- /dev/null
+From f285f4a21c3253887caceed493089ece17579d59 Mon Sep 17 00:00:00 2001
+From: Kees Cook <keescook@chromium.org>
+Date: Thu, 15 Jan 2015 16:51:46 -0800
+Subject: x86, boot: Skip relocs when load address unchanged
+
+From: Kees Cook <keescook@chromium.org>
+
+commit f285f4a21c3253887caceed493089ece17579d59 upstream.
+
+On 64-bit, relocation is not required unless the load address gets
+changed. Without this, relocations do unexpected things when the kernel
+is above 4G.
+
+Reported-by: Baoquan He <bhe@redhat.com>
+Signed-off-by: Kees Cook <keescook@chromium.org>
+Tested-by: Thomas D. <whissi@whissi.de>
+Cc: Vivek Goyal <vgoyal@redhat.com>
+Cc: Jan Beulich <JBeulich@suse.com>
+Cc: Junjie Mao <eternal.n08@gmail.com>
+Cc: Andi Kleen <ak@linux.intel.com>
+Link: http://lkml.kernel.org/r/20150116005146.GA4212@www.outflux.net
+Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ arch/x86/boot/compressed/misc.c | 9 ++++++++-
+ 1 file changed, 8 insertions(+), 1 deletion(-)
+
+--- a/arch/x86/boot/compressed/misc.c
++++ b/arch/x86/boot/compressed/misc.c
+@@ -361,6 +361,8 @@ asmlinkage __visible void *decompress_ke
+ unsigned long output_len,
+ unsigned long run_size)
+ {
++ unsigned char *output_orig = output;
++
+ real_mode = rmode;
+
+ sanitize_boot_params(real_mode);
+@@ -409,7 +411,12 @@ asmlinkage __visible void *decompress_ke
+ debug_putstr("\nDecompressing Linux... ");
+ decompress(input_data, input_len, NULL, NULL, output, NULL, error);
+ parse_elf(output);
+- handle_relocations(output, output_len);
++ /*
++ * 32-bit always performs relocations. 64-bit relocations are only
++ * needed if kASLR has chosen a different load address.
++ */
++ if (!IS_ENABLED(CONFIG_X86_64) || output != output_orig)
++ handle_relocations(output, output_len);
+ debug_putstr("done.\nBooting the kernel.\n");
+ return output;
+ }
--- /dev/null
+From 32c6590d126836a062b3140ed52d898507987017 Mon Sep 17 00:00:00 2001
+From: "K. Y. Srinivasan" <kys@microsoft.com>
+Date: Mon, 12 Jan 2015 16:26:02 -0800
+Subject: x86, hyperv: Mark the Hyper-V clocksource as being continuous
+
+From: "K. Y. Srinivasan" <kys@microsoft.com>
+
+commit 32c6590d126836a062b3140ed52d898507987017 upstream.
+
+The Hyper-V clocksource is continuous; mark it accordingly.
+
+Signed-off-by: K. Y. Srinivasan <kys@microsoft.com>
+Acked-by: jasowang@redhat.com
+Cc: gregkh@linuxfoundation.org
+Cc: devel@linuxdriverproject.org
+Cc: olaf@aepfle.de
+Cc: apw@canonical.com
+Link: http://lkml.kernel.org/r/1421108762-3331-1-git-send-email-kys@microsoft.com
+Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ arch/x86/kernel/cpu/mshyperv.c | 1 +
+ 1 file changed, 1 insertion(+)
+
+--- a/arch/x86/kernel/cpu/mshyperv.c
++++ b/arch/x86/kernel/cpu/mshyperv.c
+@@ -107,6 +107,7 @@ static struct clocksource hyperv_cs = {
+ .rating = 400, /* use this when running on Hyperv*/
+ .read = read_hv_clock,
+ .mask = CLOCKSOURCE_MASK(64),
++ .flags = CLOCK_SOURCE_IS_CONTINUOUS,
+ };
+
+ static void __init ms_hyperv_init_platform(void)
--- /dev/null
+From 4a0d3107d6b19125f21172c2b7d95f9c30ecaf6f Mon Sep 17 00:00:00 2001
+From: Jan Beulich <JBeulich@suse.com>
+Date: Fri, 16 Jan 2015 15:47:07 +0000
+Subject: x86, irq: Properly tag virtualization entry in /proc/interrupts
+
+From: Jan Beulich <JBeulich@suse.com>
+
+commit 4a0d3107d6b19125f21172c2b7d95f9c30ecaf6f upstream.
+
+The mis-naming likely was a copy-and-paste effect.
+
+Signed-off-by: Jan Beulich <jbeulich@suse.com>
+Link: http://lkml.kernel.org/r/54B9408B0200007800055E8B@mail.emea.novell.com
+Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ arch/x86/kernel/irq.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/arch/x86/kernel/irq.c
++++ b/arch/x86/kernel/irq.c
+@@ -127,7 +127,7 @@ int arch_show_interrupts(struct seq_file
+ seq_printf(p, " Machine check polls\n");
+ #endif
+ #if IS_ENABLED(CONFIG_HYPERV) || defined(CONFIG_XEN)
+- seq_printf(p, "%*s: ", prec, "THR");
++ seq_printf(p, "%*s: ", prec, "HYP");
+ for_each_online_cpu(j)
+ seq_printf(p, "%10u ", irq_stats(j)->irq_hv_callback_count);
+ seq_printf(p, " Hypervisor callback interrupts\n");
--- /dev/null
+From 520452172e6b318f3a8bd9d4fe1e25066393de25 Mon Sep 17 00:00:00 2001
+From: Alexandre Demers <alexandre.f.demers@gmail.com>
+Date: Tue, 9 Dec 2014 01:27:50 -0500
+Subject: x86/tsc: Change Fast TSC calibration failed from error to info
+
+From: Alexandre Demers <alexandre.f.demers@gmail.com>
+
+commit 520452172e6b318f3a8bd9d4fe1e25066393de25 upstream.
+
+Many users see this message when booting without knowning that it is
+of no importance and that TSC calibration may have succeeded by
+another way.
+
+As explained by Paul Bolle in
+http://lkml.kernel.org/r/1348488259.1436.22.camel@x61.thuisdomein
+
+ "Fast TSC calibration failed" should not be considered as an error
+ since other calibration methods are being tried afterward. At most,
+ those send a warning if they fail (not an error). So let's change
+ the message from error to warning.
+
+[ tglx: Make if pr_info. It's really not important at all ]
+
+Fixes: c767a54ba065 x86/debug: Add KERN_<LEVEL> to bare printks, convert printks to pr_<level>
+Signed-off-by: Alexandre Demers <alexandre.f.demers@gmail.com>
+Link: http://lkml.kernel.org/r/1418106470-6906-1-git-send-email-alexandre.f.demers@gmail.com
+Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ arch/x86/kernel/tsc.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/arch/x86/kernel/tsc.c
++++ b/arch/x86/kernel/tsc.c
+@@ -617,7 +617,7 @@ static unsigned long quick_pit_calibrate
+ goto success;
+ }
+ }
+- pr_err("Fast TSC calibration failed\n");
++ pr_info("Fast TSC calibration failed\n");
+ return 0;
+
+ success:
projects / thirdparty / kernel / stable-queue.git / commitdiff
