]> git.ipfire.org Git - thirdparty/gcc.git/commitdiff
arc.md (*loadqi_update): Replace use of 'rI' constraint with 'rCm2' constraints to...
authorAndrew Burgess <andrew.burgess@embecosm.com>
Fri, 29 Apr 2016 12:07:31 +0000 (13:07 +0100)
committerJoern Rennecke <amylaar@gcc.gnu.org>
Fri, 29 Apr 2016 12:07:31 +0000 (13:07 +0100)
2016-04-29  Andrew Burgess  <andrew.burgess@embecosm.com>

        * config/arc/arc.md (*loadqi_update): Replace use of 'rI'
        constraint with 'rCm2' constraints to limit possible immediate
        size.
        (*load_zeroextendqisi_update): Likewise.
        (*load_signextendqisi_update): Likewise.
        (*loadhi_update): Likewise.
        (*load_zeroextendhisi_update): Likewise.
        (*load_signextendhisi_update): Likewise.
        (*loadsi_update): Likewise.
        (*loadsf_update): Likewise.

From-SVN: r235636

gcc/ChangeLog
gcc/config/arc/arc.md

index 219d42374f436fd2cea9c32b063ba2d90c2481ab..b98598fa394e1e61162bef90d5779ceee88a28f3 100644 (file)
@@ -1,3 +1,16 @@
+2016-04-29  Andrew Burgess  <andrew.burgess@embecosm.com>
+
+       * config/arc/arc.md (*loadqi_update): Replace use of 'rI'
+       constraint with 'rCm2' constraints to limit possible immediate
+       size.
+       (*load_zeroextendqisi_update): Likewise.
+       (*load_signextendqisi_update): Likewise.
+       (*loadhi_update): Likewise.
+       (*load_zeroextendhisi_update): Likewise.
+       (*load_signextendhisi_update): Likewise.
+       (*loadsi_update): Likewise.
+       (*loadsf_update): Likewise.
+
 2016-04-29  Uros Bizjak  <ubizjak@gmail.com>
 
        * config/i386/predicates.md (constm1_operand): Fix comparison.
index d1a9159411da268e12eb5a54a2f9621720a4c015..c61107f4b41628d9b0e8885646c310b0d1cb6a0c 100644 (file)
   [(set (match_operand:QI 3 "dest_reg_operand" "=r,r")
         (match_operator:QI 4 "any_mem_operand"
          [(plus:SI (match_operand:SI 1 "register_operand" "0,0")
-                   (match_operand:SI 2 "nonmemory_operand" "rI,Cal"))]))
+                   (match_operand:SI 2 "nonmemory_operand" "rCm2,Cal"))]))
    (set (match_operand:SI 0 "dest_reg_operand" "=r,r")
        (plus:SI (match_dup 1) (match_dup 2)))]
   ""
   [(set (match_operand:SI 3 "dest_reg_operand" "=r,r")
        (zero_extend:SI (match_operator:QI 4 "any_mem_operand"
                         [(plus:SI (match_operand:SI 1 "register_operand" "0,0")
-                                  (match_operand:SI 2 "nonmemory_operand" "rI,Cal"))])))
+                                  (match_operand:SI 2 "nonmemory_operand" "rCm2,Cal"))])))
    (set (match_operand:SI 0 "dest_reg_operand" "=r,r")
        (plus:SI (match_dup 1) (match_dup 2)))]
   ""
   [(set (match_operand:SI 3 "dest_reg_operand" "=r,r")
        (sign_extend:SI (match_operator:QI 4 "any_mem_operand"
                         [(plus:SI (match_operand:SI 1 "register_operand" "0,0")
-                                  (match_operand:SI 2 "nonmemory_operand" "rI,Cal"))])))
+                                  (match_operand:SI 2 "nonmemory_operand" "rCm2,Cal"))])))
    (set (match_operand:SI 0 "dest_reg_operand" "=r,r")
        (plus:SI (match_dup 1) (match_dup 2)))]
   ""
   [(set (match_operand:HI 3 "dest_reg_operand" "=r,r")
        (match_operator:HI 4 "any_mem_operand"
         [(plus:SI (match_operand:SI 1 "register_operand" "0,0")
-                  (match_operand:SI 2 "nonmemory_operand" "rI,Cal"))]))
+                  (match_operand:SI 2 "nonmemory_operand" "rCm2,Cal"))]))
    (set (match_operand:SI 0 "dest_reg_operand" "=w,w")
        (plus:SI (match_dup 1) (match_dup 2)))]
   ""
   [(set (match_operand:SI 3 "dest_reg_operand" "=r,r")
        (zero_extend:SI (match_operator:HI 4 "any_mem_operand"
                         [(plus:SI (match_operand:SI 1 "register_operand" "0,0")
-                                  (match_operand:SI 2 "nonmemory_operand" "rI,Cal"))])))
+                                  (match_operand:SI 2 "nonmemory_operand" "rCm2,Cal"))])))
    (set (match_operand:SI 0 "dest_reg_operand" "=r,r")
        (plus:SI (match_dup 1) (match_dup 2)))]
   ""
   [(set (match_operand:SI 3 "dest_reg_operand" "=r,r")
        (sign_extend:SI (match_operator:HI 4 "any_mem_operand"
                         [(plus:SI (match_operand:SI 1 "register_operand" "0,0")
-                                  (match_operand:SI 2 "nonmemory_operand" "rI,Cal"))])))
+                                  (match_operand:SI 2 "nonmemory_operand" "rCm2,Cal"))])))
    (set (match_operand:SI 0 "dest_reg_operand" "=w,w")
        (plus:SI (match_dup 1) (match_dup 2)))]
   ""
   [(set (match_operand:SI 3 "dest_reg_operand" "=r,r")
        (match_operator:SI 4 "any_mem_operand"
         [(plus:SI (match_operand:SI 1 "register_operand" "0,0")
-                  (match_operand:SI 2 "nonmemory_operand" "rI,Cal"))]))
+                  (match_operand:SI 2 "nonmemory_operand" "rCm2,Cal"))]))
    (set (match_operand:SI 0 "dest_reg_operand" "=w,w")
        (plus:SI (match_dup 1) (match_dup 2)))]
   ""
   [(set (match_operand:SF 3 "dest_reg_operand" "=r,r")
        (match_operator:SF 4 "any_mem_operand"
         [(plus:SI (match_operand:SI 1 "register_operand" "0,0")
-                  (match_operand:SI 2 "nonmemory_operand" "rI,Cal"))]))
+                  (match_operand:SI 2 "nonmemory_operand" "rCm2,Cal"))]))
    (set (match_operand:SI 0 "dest_reg_operand" "=w,w")
        (plus:SI (match_dup 1) (match_dup 2)))]
   ""