]> git.ipfire.org Git - thirdparty/qemu.git/commitdiff
target/s390x: Fix ICM with M3=0
authorIlya Leoshkevich <iii@linux.ibm.com>
Mon, 24 Jul 2023 08:15:57 +0000 (10:15 +0200)
committerThomas Huth <thuth@redhat.com>
Mon, 24 Jul 2023 16:44:47 +0000 (18:44 +0200)
When the mask is zero, access exceptions should still be recognized for
1 byte at the second-operand address. CC should be set to 0.

Cc: qemu-stable@nongnu.org
Fixes: e023e832d0ac ("s390x: translate engine for s390x CPU")
Reviewed-by: David Hildenbrand <david@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Ilya Leoshkevich <iii@linux.ibm.com>
Message-Id: <20230724082032.66864-5-iii@linux.ibm.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
target/s390x/tcg/translate.c

index d6e8acee9958f89a4e34be5e78d31d90be584176..244e61ad2ebd52d1f51e6826ffc1276caefbb972 100644 (file)
@@ -2515,6 +2515,12 @@ static DisasJumpType op_icm(DisasContext *s, DisasOps *o)
         ccm = ((1ull << len) - 1) << pos;
         break;
 
+    case 0:
+        /* Recognize access exceptions for the first byte.  */
+        tcg_gen_qemu_ld_i64(tmp, o->in2, get_mem_index(s), MO_UB);
+        gen_op_movi_cc(s, 0);
+        return DISAS_NEXT;
+
     default:
         /* This is going to be a sequence of loads and inserts.  */
         pos = base + 32 - 8;