build fix for queue-3.10/powerpc-mm-use-read-barrier-when-creating-real_pte.patch...

diff --git a/queue-3.10/powerpc-mm-use-read-barrier-when-creating-real_pte.patch b/queue-3.10/powerpc-mm-use-read-barrier-when-creating-real_pte.patch
index 24d419a5ba82a8223abd1fd5def550b3849688e7..3737cf950512e428185b51e8757b577673be83e2 100644 (file)
--- a/queue-3.10/powerpc-mm-use-read-barrier-when-creating-real_pte.patch
+++ b/queue-3.10/powerpc-mm-use-read-barrier-when-creating-real_pte.patch
@@ -20,12 +20,20 @@ Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
 Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
 
 ---
- arch/powerpc/include/asm/pte-hash64-64k.h |   30 +++++++++++++++++++++++++-----
- 1 file changed, 25 insertions(+), 5 deletions(-)
+ arch/powerpc/include/asm/pte-hash64-64k.h |   32 +++++++++++++++++++++++++-----
+ 1 file changed, 27 insertions(+), 5 deletions(-)
 
 --- a/arch/powerpc/include/asm/pte-hash64-64k.h
 +++ b/arch/powerpc/include/asm/pte-hash64-64k.h
-@@ -46,11 +46,31 @@
+@@ -40,17 +40,39 @@
+ 
+ #ifndef __ASSEMBLY__
+ 
++#include <asm/system.h>       /* for smp_rmb() */
++
+ /*
+  * With 64K pages on hash table, we have a special PTE format that
+  * uses a second "half" of the page table to encode sub-page information
   * in order to deal with 64K made of 4K HW pages. Thus we override the
   * generic accessors and iterators here
   */