Fixes for 4.19

Signed-off-by: Sasha Levin <sashal@kernel.org>

diff --git a/queue-4.19/pinctrl-aspeed-fix-confusing-types-in-return-value.patch b/queue-4.19/pinctrl-aspeed-fix-confusing-types-in-return-value.patch
new file mode 100644 (file)
index 0000000..3f308a8
--- /dev/null
+++ b/queue-4.19/pinctrl-aspeed-fix-confusing-types-in-return-value.patch
@@ -0,0 +1,38 @@
+From 0a0375f80dbdaffb7c0039b4f55919720ba9ca1c Mon Sep 17 00:00:00 2001
+From: Sasha Levin <sashal@kernel.org>
+Date: Fri, 20 Jan 2023 09:48:56 +1030
+Subject: pinctrl: aspeed: Fix confusing types in return value
+
+From: Joel Stanley <joel@jms.id.au>
+
+[ Upstream commit 287a344a11f1ebd31055cf9b22c88d7005f108d7 ]
+
+The function signature is int, but we return a bool. Instead return a
+negative errno as the kerneldoc suggests.
+
+Fixes: 4d3d0e4272d8 ("pinctrl: Add core support for Aspeed SoCs")
+Signed-off-by: Joel Stanley <joel@jms.id.au>
+Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
+Link: https://lore.kernel.org/r/20230119231856.52014-1-joel@jms.id.au
+Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
+Signed-off-by: Sasha Levin <sashal@kernel.org>
+---
+ drivers/pinctrl/aspeed/pinctrl-aspeed.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/drivers/pinctrl/aspeed/pinctrl-aspeed.c b/drivers/pinctrl/aspeed/pinctrl-aspeed.c
+index 8dec302dc067a..a95289b5e6bf2 100644
+--- a/drivers/pinctrl/aspeed/pinctrl-aspeed.c
++++ b/drivers/pinctrl/aspeed/pinctrl-aspeed.c
+@@ -295,7 +295,7 @@ static int aspeed_disable_sig(const struct aspeed_sig_expr **exprs,
+       int ret = 0;
+ 
+       if (!exprs)
+-              return true;
++              return -EINVAL;
+ 
+       while (*exprs && !ret) {
+               ret = aspeed_sig_expr_disable(*exprs, maps);
+-- 
+2.39.0
+

diff --git a/queue-4.19/pinctrl-intel-convert-unsigned-to-unsigned-int.patch b/queue-4.19/pinctrl-intel-convert-unsigned-to-unsigned-int.patch
new file mode 100644 (file)
index 0000000..9216c45
--- /dev/null
+++ b/queue-4.19/pinctrl-intel-convert-unsigned-to-unsigned-int.patch
@@ -0,0 +1,455 @@
+From 49c17e11e66af76688b132d33bbc8c5166b1e573 Mon Sep 17 00:00:00 2001
+From: Sasha Levin <sashal@kernel.org>
+Date: Wed, 26 Sep 2018 17:50:26 +0300
+Subject: pinctrl: intel: Convert unsigned to unsigned int
+
+From: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
+
+[ Upstream commit 04035f7f59bd106219d062293234bba683f6db71 ]
+
+Simple type conversion with no functional change implied.
+
+Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
+Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
+Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
+Stable-dep-of: a8520be3ffef ("pinctrl: intel: Restore the pins that used to be in Direct IRQ mode")
+Signed-off-by: Sasha Levin <sashal@kernel.org>
+---
+ drivers/pinctrl/intel/pinctrl-intel.c | 101 +++++++++++++-------------
+ drivers/pinctrl/intel/pinctrl-intel.h |  32 ++++----
+ 2 files changed, 67 insertions(+), 66 deletions(-)
+
+diff --git a/drivers/pinctrl/intel/pinctrl-intel.c b/drivers/pinctrl/intel/pinctrl-intel.c
+index f9eb37bb39051..198121bd89bbf 100644
+--- a/drivers/pinctrl/intel/pinctrl-intel.c
++++ b/drivers/pinctrl/intel/pinctrl-intel.c
+@@ -116,7 +116,7 @@ struct intel_pinctrl {
+ #define padgroup_offset(g, p) ((p) - (g)->base)
+ 
+ static struct intel_community *intel_get_community(struct intel_pinctrl *pctrl,
+-                                                 unsigned pin)
++                                                 unsigned int pin)
+ {
+       struct intel_community *community;
+       int i;
+@@ -134,7 +134,7 @@ static struct intel_community *intel_get_community(struct intel_pinctrl *pctrl,
+ 
+ static const struct intel_padgroup *
+ intel_community_get_padgroup(const struct intel_community *community,
+-                           unsigned pin)
++                           unsigned int pin)
+ {
+       int i;
+ 
+@@ -148,11 +148,11 @@ intel_community_get_padgroup(const struct intel_community *community,
+       return NULL;
+ }
+ 
+-static void __iomem *intel_get_padcfg(struct intel_pinctrl *pctrl, unsigned pin,
+-                                    unsigned reg)
++static void __iomem *intel_get_padcfg(struct intel_pinctrl *pctrl,
++                                    unsigned int pin, unsigned int reg)
+ {
+       const struct intel_community *community;
+-      unsigned padno;
++      unsigned int padno;
+       size_t nregs;
+ 
+       community = intel_get_community(pctrl, pin);
+@@ -168,11 +168,11 @@ static void __iomem *intel_get_padcfg(struct intel_pinctrl *pctrl, unsigned pin,
+       return community->pad_regs + reg + padno * nregs * 4;
+ }
+ 
+-static bool intel_pad_owned_by_host(struct intel_pinctrl *pctrl, unsigned pin)
++static bool intel_pad_owned_by_host(struct intel_pinctrl *pctrl, unsigned int pin)
+ {
+       const struct intel_community *community;
+       const struct intel_padgroup *padgrp;
+-      unsigned gpp, offset, gpp_offset;
++      unsigned int gpp, offset, gpp_offset;
+       void __iomem *padown;
+ 
+       community = intel_get_community(pctrl, pin);
+@@ -193,11 +193,11 @@ static bool intel_pad_owned_by_host(struct intel_pinctrl *pctrl, unsigned pin)
+       return !(readl(padown) & PADOWN_MASK(gpp_offset));
+ }
+ 
+-static bool intel_pad_acpi_mode(struct intel_pinctrl *pctrl, unsigned pin)
++static bool intel_pad_acpi_mode(struct intel_pinctrl *pctrl, unsigned int pin)
+ {
+       const struct intel_community *community;
+       const struct intel_padgroup *padgrp;
+-      unsigned offset, gpp_offset;
++      unsigned int offset, gpp_offset;
+       void __iomem *hostown;
+ 
+       community = intel_get_community(pctrl, pin);
+@@ -217,11 +217,11 @@ static bool intel_pad_acpi_mode(struct intel_pinctrl *pctrl, unsigned pin)
+       return !(readl(hostown) & BIT(gpp_offset));
+ }
+ 
+-static bool intel_pad_locked(struct intel_pinctrl *pctrl, unsigned pin)
++static bool intel_pad_locked(struct intel_pinctrl *pctrl, unsigned int pin)
+ {
+       struct intel_community *community;
+       const struct intel_padgroup *padgrp;
+-      unsigned offset, gpp_offset;
++      unsigned int offset, gpp_offset;
+       u32 value;
+ 
+       community = intel_get_community(pctrl, pin);
+@@ -254,7 +254,7 @@ static bool intel_pad_locked(struct intel_pinctrl *pctrl, unsigned pin)
+       return false;
+ }
+ 
+-static bool intel_pad_usable(struct intel_pinctrl *pctrl, unsigned pin)
++static bool intel_pad_usable(struct intel_pinctrl *pctrl, unsigned int pin)
+ {
+       return intel_pad_owned_by_host(pctrl, pin) &&
+               !intel_pad_locked(pctrl, pin);
+@@ -268,15 +268,15 @@ static int intel_get_groups_count(struct pinctrl_dev *pctldev)
+ }
+ 
+ static const char *intel_get_group_name(struct pinctrl_dev *pctldev,
+-                                    unsigned group)
++                                    unsigned int group)
+ {
+       struct intel_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev);
+ 
+       return pctrl->soc->groups[group].name;
+ }
+ 
+-static int intel_get_group_pins(struct pinctrl_dev *pctldev, unsigned group,
+-                            const unsigned **pins, unsigned *npins)
++static int intel_get_group_pins(struct pinctrl_dev *pctldev, unsigned int group,
++                            const unsigned int **pins, unsigned int *npins)
+ {
+       struct intel_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev);
+ 
+@@ -286,7 +286,7 @@ static int intel_get_group_pins(struct pinctrl_dev *pctldev, unsigned group,
+ }
+ 
+ static void intel_pin_dbg_show(struct pinctrl_dev *pctldev, struct seq_file *s,
+-                             unsigned pin)
++                             unsigned int pin)
+ {
+       struct intel_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev);
+       void __iomem *padcfg;
+@@ -345,7 +345,7 @@ static int intel_get_functions_count(struct pinctrl_dev *pctldev)
+ }
+ 
+ static const char *intel_get_function_name(struct pinctrl_dev *pctldev,
+-                                         unsigned function)
++                                         unsigned int function)
+ {
+       struct intel_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev);
+ 
+@@ -353,9 +353,9 @@ static const char *intel_get_function_name(struct pinctrl_dev *pctldev,
+ }
+ 
+ static int intel_get_function_groups(struct pinctrl_dev *pctldev,
+-                                   unsigned function,
++                                   unsigned int function,
+                                    const char * const **groups,
+-                                   unsigned * const ngroups)
++                                   unsigned int * const ngroups)
+ {
+       struct intel_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev);
+ 
+@@ -364,8 +364,8 @@ static int intel_get_function_groups(struct pinctrl_dev *pctldev,
+       return 0;
+ }
+ 
+-static int intel_pinmux_set_mux(struct pinctrl_dev *pctldev, unsigned function,
+-                              unsigned group)
++static int intel_pinmux_set_mux(struct pinctrl_dev *pctldev,
++                              unsigned int function, unsigned int group)
+ {
+       struct intel_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev);
+       const struct intel_pingroup *grp = &pctrl->soc->groups[group];
+@@ -447,7 +447,7 @@ static void intel_gpio_set_gpio_mode(void __iomem *padcfg0)
+ 
+ static int intel_gpio_request_enable(struct pinctrl_dev *pctldev,
+                                    struct pinctrl_gpio_range *range,
+-                                   unsigned pin)
++                                   unsigned int pin)
+ {
+       struct intel_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev);
+       void __iomem *padcfg0;
+@@ -485,7 +485,7 @@ static int intel_gpio_request_enable(struct pinctrl_dev *pctldev,
+ 
+ static int intel_gpio_set_direction(struct pinctrl_dev *pctldev,
+                                   struct pinctrl_gpio_range *range,
+-                                  unsigned pin, bool input)
++                                  unsigned int pin, bool input)
+ {
+       struct intel_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev);
+       void __iomem *padcfg0;
+@@ -510,7 +510,7 @@ static const struct pinmux_ops intel_pinmux_ops = {
+       .gpio_set_direction = intel_gpio_set_direction,
+ };
+ 
+-static int intel_config_get(struct pinctrl_dev *pctldev, unsigned pin,
++static int intel_config_get(struct pinctrl_dev *pctldev, unsigned int pin,
+                           unsigned long *config)
+ {
+       struct intel_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev);
+@@ -599,11 +599,11 @@ static int intel_config_get(struct pinctrl_dev *pctldev, unsigned pin,
+       return 0;
+ }
+ 
+-static int intel_config_set_pull(struct intel_pinctrl *pctrl, unsigned pin,
++static int intel_config_set_pull(struct intel_pinctrl *pctrl, unsigned int pin,
+                                unsigned long config)
+ {
+-      unsigned param = pinconf_to_config_param(config);
+-      unsigned arg = pinconf_to_config_argument(config);
++      unsigned int param = pinconf_to_config_param(config);
++      unsigned int arg = pinconf_to_config_argument(config);
+       const struct intel_community *community;
+       void __iomem *padcfg1;
+       unsigned long flags;
+@@ -685,8 +685,8 @@ static int intel_config_set_pull(struct intel_pinctrl *pctrl, unsigned pin,
+       return ret;
+ }
+ 
+-static int intel_config_set_debounce(struct intel_pinctrl *pctrl, unsigned pin,
+-                                   unsigned debounce)
++static int intel_config_set_debounce(struct intel_pinctrl *pctrl,
++                                   unsigned int pin, unsigned int debounce)
+ {
+       void __iomem *padcfg0, *padcfg2;
+       unsigned long flags;
+@@ -732,8 +732,8 @@ static int intel_config_set_debounce(struct intel_pinctrl *pctrl, unsigned pin,
+       return ret;
+ }
+ 
+-static int intel_config_set(struct pinctrl_dev *pctldev, unsigned pin,
+-                        unsigned long *configs, unsigned nconfigs)
++static int intel_config_set(struct pinctrl_dev *pctldev, unsigned int pin,
++                        unsigned long *configs, unsigned int nconfigs)
+ {
+       struct intel_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev);
+       int i, ret;
+@@ -790,7 +790,7 @@ static const struct pinctrl_desc intel_pinctrl_desc = {
+  * automatically translated to pinctrl pin number. This function can be
+  * used to find out the corresponding pinctrl pin.
+  */
+-static int intel_gpio_to_pin(struct intel_pinctrl *pctrl, unsigned offset,
++static int intel_gpio_to_pin(struct intel_pinctrl *pctrl, unsigned int offset,
+                            const struct intel_community **community,
+                            const struct intel_padgroup **padgrp)
+ {
+@@ -824,7 +824,7 @@ static int intel_gpio_to_pin(struct intel_pinctrl *pctrl, unsigned offset,
+       return -EINVAL;
+ }
+ 
+-static int intel_gpio_get(struct gpio_chip *chip, unsigned offset)
++static int intel_gpio_get(struct gpio_chip *chip, unsigned int offset)
+ {
+       struct intel_pinctrl *pctrl = gpiochip_get_data(chip);
+       void __iomem *reg;
+@@ -846,7 +846,8 @@ static int intel_gpio_get(struct gpio_chip *chip, unsigned offset)
+       return !!(padcfg0 & PADCFG0_GPIORXSTATE);
+ }
+ 
+-static void intel_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
++static void intel_gpio_set(struct gpio_chip *chip, unsigned int offset,
++                         int value)
+ {
+       struct intel_pinctrl *pctrl = gpiochip_get_data(chip);
+       unsigned long flags;
+@@ -895,12 +896,12 @@ static int intel_gpio_get_direction(struct gpio_chip *chip, unsigned int offset)
+       return !!(padcfg0 & PADCFG0_GPIOTXDIS);
+ }
+ 
+-static int intel_gpio_direction_input(struct gpio_chip *chip, unsigned offset)
++static int intel_gpio_direction_input(struct gpio_chip *chip, unsigned int offset)
+ {
+       return pinctrl_gpio_direction_input(chip->base + offset);
+ }
+ 
+-static int intel_gpio_direction_output(struct gpio_chip *chip, unsigned offset,
++static int intel_gpio_direction_output(struct gpio_chip *chip, unsigned int offset,
+                                      int value)
+ {
+       intel_gpio_set(chip, offset, value);
+@@ -929,7 +930,7 @@ static void intel_gpio_irq_ack(struct irq_data *d)
+ 
+       pin = intel_gpio_to_pin(pctrl, irqd_to_hwirq(d), &community, &padgrp);
+       if (pin >= 0) {
+-              unsigned gpp, gpp_offset, is_offset;
++              unsigned int gpp, gpp_offset, is_offset;
+ 
+               gpp = padgrp->reg_num;
+               gpp_offset = padgroup_offset(padgrp, pin);
+@@ -951,7 +952,7 @@ static void intel_gpio_irq_enable(struct irq_data *d)
+ 
+       pin = intel_gpio_to_pin(pctrl, irqd_to_hwirq(d), &community, &padgrp);
+       if (pin >= 0) {
+-              unsigned gpp, gpp_offset, is_offset;
++              unsigned int gpp, gpp_offset, is_offset;
+               unsigned long flags;
+               u32 value;
+ 
+@@ -980,7 +981,7 @@ static void intel_gpio_irq_mask_unmask(struct irq_data *d, bool mask)
+ 
+       pin = intel_gpio_to_pin(pctrl, irqd_to_hwirq(d), &community, &padgrp);
+       if (pin >= 0) {
+-              unsigned gpp, gpp_offset;
++              unsigned int gpp, gpp_offset;
+               unsigned long flags;
+               void __iomem *reg;
+               u32 value;
+@@ -1011,11 +1012,11 @@ static void intel_gpio_irq_unmask(struct irq_data *d)
+       intel_gpio_irq_mask_unmask(d, false);
+ }
+ 
+-static int intel_gpio_irq_type(struct irq_data *d, unsigned type)
++static int intel_gpio_irq_type(struct irq_data *d, unsigned int type)
+ {
+       struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
+       struct intel_pinctrl *pctrl = gpiochip_get_data(gc);
+-      unsigned pin = intel_gpio_to_pin(pctrl, irqd_to_hwirq(d), NULL, NULL);
++      unsigned int pin = intel_gpio_to_pin(pctrl, irqd_to_hwirq(d), NULL, NULL);
+       unsigned long flags;
+       void __iomem *reg;
+       u32 value;
+@@ -1072,7 +1073,7 @@ static int intel_gpio_irq_wake(struct irq_data *d, unsigned int on)
+ {
+       struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
+       struct intel_pinctrl *pctrl = gpiochip_get_data(gc);
+-      unsigned pin = intel_gpio_to_pin(pctrl, irqd_to_hwirq(d), NULL, NULL);
++      unsigned int pin = intel_gpio_to_pin(pctrl, irqd_to_hwirq(d), NULL, NULL);
+ 
+       if (on)
+               enable_irq_wake(pctrl->irq);
+@@ -1167,7 +1168,7 @@ static int intel_gpio_add_pin_ranges(struct intel_pinctrl *pctrl,
+ static unsigned intel_gpio_ngpio(const struct intel_pinctrl *pctrl)
+ {
+       const struct intel_community *community;
+-      unsigned ngpio = 0;
++      unsigned int ngpio = 0;
+       int i, j;
+ 
+       for (i = 0; i < pctrl->ncommunities; i++) {
+@@ -1243,8 +1244,8 @@ static int intel_pinctrl_add_padgroups(struct intel_pinctrl *pctrl,
+                                      struct intel_community *community)
+ {
+       struct intel_padgroup *gpps;
+-      unsigned npins = community->npins;
+-      unsigned padown_num = 0;
++      unsigned int npins = community->npins;
++      unsigned int padown_num = 0;
+       size_t ngpps, i;
+ 
+       if (community->gpps)
+@@ -1260,7 +1261,7 @@ static int intel_pinctrl_add_padgroups(struct intel_pinctrl *pctrl,
+               if (community->gpps) {
+                       gpps[i] = community->gpps[i];
+               } else {
+-                      unsigned gpp_size = community->gpp_size;
++                      unsigned int gpp_size = community->gpp_size;
+ 
+                       gpps[i].reg_num = i;
+                       gpps[i].base = community->pin_base + i * gpp_size;
+@@ -1431,7 +1432,7 @@ int intel_pinctrl_probe(struct platform_device *pdev,
+ EXPORT_SYMBOL_GPL(intel_pinctrl_probe);
+ 
+ #ifdef CONFIG_PM_SLEEP
+-static bool intel_pinctrl_should_save(struct intel_pinctrl *pctrl, unsigned pin)
++static bool intel_pinctrl_should_save(struct intel_pinctrl *pctrl, unsigned int pin)
+ {
+       const struct pin_desc *pd = pin_desc_get(pctrl->pctldev, pin);
+       u32 value;
+@@ -1502,7 +1503,7 @@ int intel_pinctrl_suspend(struct device *dev)
+       for (i = 0; i < pctrl->ncommunities; i++) {
+               struct intel_community *community = &pctrl->communities[i];
+               void __iomem *base;
+-              unsigned gpp;
++              unsigned int gpp;
+ 
+               base = community->regs + community->ie_offset;
+               for (gpp = 0; gpp < community->ngpps; gpp++)
+@@ -1520,7 +1521,7 @@ static void intel_gpio_irq_init(struct intel_pinctrl *pctrl)
+       for (i = 0; i < pctrl->ncommunities; i++) {
+               const struct intel_community *community;
+               void __iomem *base;
+-              unsigned gpp;
++              unsigned int gpp;
+ 
+               community = &pctrl->communities[i];
+               base = community->regs;
+@@ -1584,7 +1585,7 @@ int intel_pinctrl_resume(struct device *dev)
+       for (i = 0; i < pctrl->ncommunities; i++) {
+               struct intel_community *community = &pctrl->communities[i];
+               void __iomem *base;
+-              unsigned gpp;
++              unsigned int gpp;
+ 
+               base = community->regs + community->ie_offset;
+               for (gpp = 0; gpp < community->ngpps; gpp++) {
+diff --git a/drivers/pinctrl/intel/pinctrl-intel.h b/drivers/pinctrl/intel/pinctrl-intel.h
+index 1785abf157e4b..737a545b448f0 100644
+--- a/drivers/pinctrl/intel/pinctrl-intel.h
++++ b/drivers/pinctrl/intel/pinctrl-intel.h
+@@ -25,10 +25,10 @@ struct device;
+  */
+ struct intel_pingroup {
+       const char *name;
+-      const unsigned *pins;
++      const unsigned int *pins;
+       size_t npins;
+       unsigned short mode;
+-      const unsigned *modes;
++      const unsigned int *modes;
+ };
+ 
+ /**
+@@ -56,11 +56,11 @@ struct intel_function {
+  * to specify them.
+  */
+ struct intel_padgroup {
+-      unsigned reg_num;
+-      unsigned base;
+-      unsigned size;
++      unsigned int reg_num;
++      unsigned int base;
++      unsigned int size;
+       int gpio_base;
+-      unsigned padown_num;
++      unsigned int padown_num;
+ };
+ 
+ /**
+@@ -96,17 +96,17 @@ struct intel_padgroup {
+  * pass custom @gpps and @ngpps instead.
+  */
+ struct intel_community {
+-      unsigned barno;
+-      unsigned padown_offset;
+-      unsigned padcfglock_offset;
+-      unsigned hostown_offset;
+-      unsigned is_offset;
+-      unsigned ie_offset;
+-      unsigned pin_base;
+-      unsigned gpp_size;
+-      unsigned gpp_num_padown_regs;
++      unsigned int barno;
++      unsigned int padown_offset;
++      unsigned int padcfglock_offset;
++      unsigned int hostown_offset;
++      unsigned int is_offset;
++      unsigned int ie_offset;
++      unsigned int pin_base;
++      unsigned int gpp_size;
++      unsigned int gpp_num_padown_regs;
+       size_t npins;
+-      unsigned features;
++      unsigned int features;
+       const struct intel_padgroup *gpps;
+       size_t ngpps;
+       /* Reserved for the core driver */
+-- 
+2.39.0
+

diff --git a/queue-4.19/pinctrl-intel-restore-the-pins-that-used-to-be-in-di.patch b/queue-4.19/pinctrl-intel-restore-the-pins-that-used-to-be-in-di.patch
new file mode 100644 (file)
index 0000000..98f4320
--- /dev/null
+++ b/queue-4.19/pinctrl-intel-restore-the-pins-that-used-to-be-in-di.patch
@@ -0,0 +1,69 @@
+From 69fcc9d9a8d8157ffe5de144cac5d41441f95f80 Mon Sep 17 00:00:00 2001
+From: Sasha Levin <sashal@kernel.org>
+Date: Mon, 6 Feb 2023 16:15:59 +0200
+Subject: pinctrl: intel: Restore the pins that used to be in Direct IRQ mode
+
+From: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
+
+[ Upstream commit a8520be3ffef3d25b53bf171a7ebe17ee0154175 ]
+
+If the firmware mangled the register contents too much,
+check the saved value for the Direct IRQ mode. If it
+matches, we will restore the pin state.
+
+Reported-by: Jim Minter <jimminter@microsoft.com>
+Fixes: 6989ea4881c8 ("pinctrl: intel: Save and restore pins in "direct IRQ" mode")
+Tested-by: Jim Minter <jimminter@microsoft.com>
+Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
+Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
+Link: https://lore.kernel.org/r/20230206141558.20916-1-andriy.shevchenko@linux.intel.com
+Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
+Signed-off-by: Sasha Levin <sashal@kernel.org>
+---
+ drivers/pinctrl/intel/pinctrl-intel.c | 16 +++++++++++++---
+ 1 file changed, 13 insertions(+), 3 deletions(-)
+
+diff --git a/drivers/pinctrl/intel/pinctrl-intel.c b/drivers/pinctrl/intel/pinctrl-intel.c
+index 198121bd89bbf..b786d9797f404 100644
+--- a/drivers/pinctrl/intel/pinctrl-intel.c
++++ b/drivers/pinctrl/intel/pinctrl-intel.c
+@@ -1432,6 +1432,12 @@ int intel_pinctrl_probe(struct platform_device *pdev,
+ EXPORT_SYMBOL_GPL(intel_pinctrl_probe);
+ 
+ #ifdef CONFIG_PM_SLEEP
++static bool __intel_gpio_is_direct_irq(u32 value)
++{
++      return (value & PADCFG0_GPIROUTIOXAPIC) && (value & PADCFG0_GPIOTXDIS) &&
++             (__intel_gpio_get_gpio_mode(value) == PADCFG0_PMODE_GPIO);
++}
++
+ static bool intel_pinctrl_should_save(struct intel_pinctrl *pctrl, unsigned int pin)
+ {
+       const struct pin_desc *pd = pin_desc_get(pctrl->pctldev, pin);
+@@ -1465,8 +1471,7 @@ static bool intel_pinctrl_should_save(struct intel_pinctrl *pctrl, unsigned int
+        * See https://bugzilla.kernel.org/show_bug.cgi?id=214749.
+        */
+       value = readl(intel_get_padcfg(pctrl, pin, PADCFG0));
+-      if ((value & PADCFG0_GPIROUTIOXAPIC) && (value & PADCFG0_GPIOTXDIS) &&
+-          (__intel_gpio_get_gpio_mode(value) == PADCFG0_PMODE_GPIO))
++      if (__intel_gpio_is_direct_irq(value))
+               return true;
+ 
+       return false;
+@@ -1551,7 +1556,12 @@ int intel_pinctrl_resume(struct device *dev)
+               void __iomem *padcfg;
+               u32 val;
+ 
+-              if (!intel_pinctrl_should_save(pctrl, desc->number))
++              if (!(intel_pinctrl_should_save(pctrl, desc->number) ||
++                    /*
++                     * If the firmware mangled the register contents too much,
++                     * check the saved value for the Direct IRQ mode.
++                     */
++                    __intel_gpio_is_direct_irq(pads[i].padcfg0)))
+                       continue;
+ 
+               padcfg = intel_get_padcfg(pctrl, desc->number, PADCFG0);
+-- 
+2.39.0
+

diff --git a/queue-4.19/pinctrl-single-fix-potential-null-dereference.patch b/queue-4.19/pinctrl-single-fix-potential-null-dereference.patch
new file mode 100644 (file)
index 0000000..a2a8cc0
--- /dev/null
+++ b/queue-4.19/pinctrl-single-fix-potential-null-dereference.patch
@@ -0,0 +1,41 @@
+From f488ccf8a6fbefe8cd556e4579ea69d759f5e0ae Mon Sep 17 00:00:00 2001
+From: Sasha Levin <sashal@kernel.org>
+Date: Fri, 18 Nov 2022 13:43:32 +0300
+Subject: pinctrl: single: fix potential NULL dereference
+
+From: Maxim Korotkov <korotkov.maxim.s@gmail.com>
+
+[ Upstream commit d2d73e6d4822140445ad4a7b1c6091e0f5fe703b ]
+
+Added checking of pointer "function" in pcs_set_mux().
+pinmux_generic_get_function() can return NULL and the pointer
+"function" was dereferenced without checking against NULL.
+
+Found by Linux Verification Center (linuxtesting.org) with SVACE.
+
+Fixes: 571aec4df5b7 ("pinctrl: single: Use generic pinmux helpers for managing functions")
+Signed-off-by: Maxim Korotkov <korotkov.maxim.s@gmail.com>
+Reviewed-by: Tony Lindgren <tony@atomide.com>
+Link: https://lore.kernel.org/r/20221118104332.943-1-korotkov.maxim.s@gmail.com
+Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
+Signed-off-by: Sasha Levin <sashal@kernel.org>
+---
+ drivers/pinctrl/pinctrl-single.c | 2 ++
+ 1 file changed, 2 insertions(+)
+
+diff --git a/drivers/pinctrl/pinctrl-single.c b/drivers/pinctrl/pinctrl-single.c
+index 2b50030ad97e0..4143cafbf7e73 100644
+--- a/drivers/pinctrl/pinctrl-single.c
++++ b/drivers/pinctrl/pinctrl-single.c
+@@ -345,6 +345,8 @@ static int pcs_set_mux(struct pinctrl_dev *pctldev, unsigned fselector,
+       if (!pcs->fmask)
+               return 0;
+       function = pinmux_generic_get_function(pctldev, fselector);
++      if (!function)
++              return -EINVAL;
+       func = function->data;
+       if (!func)
+               return -EINVAL;
+-- 
+2.39.0
+

diff --git a/queue-4.19/series b/queue-4.19/series
index 228e4cf23e3c2eb88fbf19c62cd6b5a012d02e66..5c3ed3a32e5c5d534c23211d984c906e0b109c22 100644 (file)
--- a/queue-4.19/series
+++ b/queue-4.19/series
@@ -49,3 +49,7 @@ net-phy-meson-gxl-use-mmd-access-dummy-stubs-for-gxl.patch
 rds-rds_rm_zerocopy_callback-use-list_first_entry.patch
 selftests-forwarding-lib-quote-the-sysctl-values.patch
 alsa-pci-lx6464es-fix-a-debug-loop.patch
+pinctrl-aspeed-fix-confusing-types-in-return-value.patch
+pinctrl-single-fix-potential-null-dereference.patch
+pinctrl-intel-convert-unsigned-to-unsigned-int.patch
+pinctrl-intel-restore-the-pins-that-used-to-be-in-di.patch