aarch64: Add system registers for 2024 MPAM extension

This patch adds support for new system registers introduced in the
2024 MPAM extension (Memory Partitioning and Monitoring):

Available in Armv9.3-A:
  MPAMBW0_EL1,
  MPAMBW1_EL1,
  MPAMBW1_EL12,
  MPAMBW2_EL2,
  MPAMBW3_EL3,
  MPAMBWCAP_EL2,
  MPAMBWIDR_EL1

Available in Armv9.3-A with SME:
  MPAMBWSM_EL1

The details can be found in [1].

[1]: https://developer.arm.com/documentation/ddi0601/latest

diff --git a/gas/testsuite/gas/aarch64/sysreg/armv9_3-a-sme-sysregs.d b/gas/testsuite/gas/aarch64/sysreg/armv9_3-a-sme-sysregs.d
new file mode 100644 (file)
index 0000000..a40995c
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sysreg/armv9_3-a-sme-sysregs.d
@@ -0,0 +1,10 @@
+#as: -march=armv9.3-a+sme
+#objdump: -dr
+
+.*:     file format .*
+
+Disassembly of section \.text:
+
+0+ <.*>:
+.*:    d538a5e0        mrs     x0, mpambwsm_el1
+.*:    d518a5e0        msr     mpambwsm_el1, x0

diff --git a/gas/testsuite/gas/aarch64/sysreg/armv9_3-a-sme-sysregs.s b/gas/testsuite/gas/aarch64/sysreg/armv9_3-a-sme-sysregs.s
new file mode 100644 (file)
index 0000000..e5ac128
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sysreg/armv9_3-a-sme-sysregs.s
@@ -0,0 +1,2 @@
+       mrs     x0, mpambwsm_el1
+       msr     mpambwsm_el1, x0

diff --git a/gas/testsuite/gas/aarch64/sysreg/armv9_3-a-sysregs.d b/gas/testsuite/gas/aarch64/sysreg/armv9_3-a-sysregs.d
new file mode 100644 (file)
index 0000000..46a05d2
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sysreg/armv9_3-a-sysregs.d
@@ -0,0 +1,21 @@
+#as: -march=armv9.3-a
+#objdump: -dr
+
+.*:     file format .*
+
+Disassembly of section \.text:
+
+0+ <.*>:
+[^:]+:\s+d538a5a0      mrs     x0, mpambw0_el1
+[^:]+:\s+d518a5a0      msr     mpambw0_el1, x0
+[^:]+:\s+d538a580      mrs     x0, mpambw1_el1
+[^:]+:\s+d518a580      msr     mpambw1_el1, x0
+[^:]+:\s+d53da580      mrs     x0, mpambw1_el12
+[^:]+:\s+d51da580      msr     mpambw1_el12, x0
+[^:]+:\s+d53ca580      mrs     x0, mpambw2_el2
+[^:]+:\s+d51ca580      msr     mpambw2_el2, x0
+[^:]+:\s+d53ea580      mrs     x0, mpambw3_el3
+[^:]+:\s+d51ea580      msr     mpambw3_el3, x0
+[^:]+:\s+d53ca5c0      mrs     x0, mpambwcap_el2
+[^:]+:\s+d51ca5c0      msr     mpambwcap_el2, x0
+[^:]+:\s+d538a4a0      mrs     x0, mpambwidr_el1

diff --git a/gas/testsuite/gas/aarch64/sysreg/armv9_3-a-sysregs.s b/gas/testsuite/gas/aarch64/sysreg/armv9_3-a-sysregs.s
new file mode 100644 (file)
index 0000000..546bdbf
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sysreg/armv9_3-a-sysregs.s
@@ -0,0 +1,13 @@
+       mrs     x0, mpambw0_el1
+       msr     mpambw0_el1, x0
+       mrs     x0, mpambw1_el1
+       msr     mpambw1_el1, x0
+       mrs     x0, mpambw1_el12
+       msr     mpambw1_el12, x0
+       mrs     x0, mpambw2_el2
+       msr     mpambw2_el2, x0
+       mrs     x0, mpambw3_el3
+       msr     mpambw3_el3, x0
+       mrs     x0, mpambwcap_el2
+       msr     mpambwcap_el2, x0
+       mrs     x0, mpambwidr_el1

diff --git a/gas/testsuite/gas/aarch64/sysreg/mpam-bad.d b/gas/testsuite/gas/aarch64/sysreg/mpam-bad.d
new file mode 100644 (file)
index 0000000..c3ec372
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sysreg/mpam-bad.d
@@ -0,0 +1,3 @@
+#as: -march=armv9.3-a
+#source: mpam-bad.s
+#error_output: mpam-bad.l

diff --git a/gas/testsuite/gas/aarch64/sysreg/mpam-bad.l b/gas/testsuite/gas/aarch64/sysreg/mpam-bad.l
new file mode 100644 (file)
index 0000000..34e9197
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sysreg/mpam-bad.l
@@ -0,0 +1,4 @@
+.*: Assembler messages:
+.*: Warning: specified register cannot be written to at operand 1 -- `msr mpambwidr_el1,x0'
+.*: Error: selected processor does not support system register name 'mpambwsm_el1'
+.*: Error: selected processor does not support system register name 'mpambwsm_el1'

diff --git a/gas/testsuite/gas/aarch64/sysreg/mpam-bad.s b/gas/testsuite/gas/aarch64/sysreg/mpam-bad.s
new file mode 100644 (file)
index 0000000..2a0f94f
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/sysreg/mpam-bad.s
@@ -0,0 +1,6 @@
+/* This is read-only register */
+msr mpambwidr_el1, x0
+
+/* This register is not available without +sme flag */
+mrs x0, mpambwsm_el1
+msr mpambwsm_el1, x0

diff --git a/opcodes/aarch64-sys-regs.def b/opcodes/aarch64-sys-regs.def
index d1ae109940cdf9d94ecfeffb334c5670e7629ca5..964c0325d72961eeb23e6db9f29f1f6b74336917 100644 (file)
--- a/opcodes/aarch64-sys-regs.def
+++ b/opcodes/aarch64-sys-regs.def
@@ -591,6 +591,14 @@
   SYSREG ("mpam1_el12",                CPENC (3,5,10,5,0),     0,                      AARCH64_NO_FEATURES)
   SYSREG ("mpam2_el2",         CPENC (3,4,10,5,0),     0,                      AARCH64_NO_FEATURES)
   SYSREG ("mpam3_el3",         CPENC (3,6,10,5,0),     0,                      AARCH64_NO_FEATURES)
+  SYSREG ("mpambw0_el1",       CPENC (3,0,10,5,5),     F_ARCHEXT,              AARCH64_FEATURE (V9_3A))
+  SYSREG ("mpambw1_el1",       CPENC (3,0,10,5,4),     F_ARCHEXT,              AARCH64_FEATURE (V9_3A))
+  SYSREG ("mpambw1_el12",      CPENC (3,5,10,5,4),     F_ARCHEXT,              AARCH64_FEATURE (V9_3A))
+  SYSREG ("mpambw2_el2",       CPENC (3,4,10,5,4),     F_ARCHEXT,              AARCH64_FEATURE (V9_3A))
+  SYSREG ("mpambw3_el3",       CPENC (3,6,10,5,4),     F_ARCHEXT,              AARCH64_FEATURE (V9_3A))
+  SYSREG ("mpambwcap_el2",     CPENC (3,4,10,5,6),     F_ARCHEXT,              AARCH64_FEATURE (V9_3A))
+  SYSREG ("mpambwidr_el1",     CPENC (3,0,10,4,5),     F_REG_READ|F_ARCHEXT,   AARCH64_FEATURE (V9_3A))
+  SYSREG ("mpambwsm_el1",      CPENC (3,0,10,5,7),     F_ARCHEXT,              AARCH64_FEATURES (2, SME, V9_3A))
   SYSREG ("mpamhcr_el2",       CPENC (3,4,10,4,0),     0,                      AARCH64_NO_FEATURES)
   SYSREG ("mpamidr_el1",       CPENC (3,0,10,4,4),     F_REG_READ,             AARCH64_NO_FEATURES)
   SYSREG ("mpamsm_el1",                CPENC (3,0,10,5,3),     F_ARCHEXT,              AARCH64_FEATURE (SME))